KERSEMI IRFZ44VPBF

IRFZ44VPbF
Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Optimized for SMPS Applications
Lead-Free
Description
D
VDSS = 60V
RDS(on) = 16.5mΩ
G
ID = 55A
S
Advanced HEXFET® Power MOSFETs from International
Rectifier utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220 contribute
to its wide acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
Max.
Units
55
39
220
115
0.77
± 20
115
55
11
4.5
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
Max.
Units
–––
0.50
–––
1.3
–––
62
°C/W
1
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11/10/03
IRFZ44VPbF
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
60
–––
–––
2.0
24
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.062
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
13
97
40
57
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
1812
393
103
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
16.5 mΩ VGS = 10V, ID = 31A 4.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 31A
25
VDS = 60V, VGS = 0V
µA
250
VDS = 48V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
67
ID = 51A
18
nC
VDS = 48V
25
VGS = 10V, See Fig. 6 and 13 –––
VDD = 30V
–––
ID = 51A
ns
–––
RG = 9.1Ω
–––
RD = 0.6Ω, See Fig. 10 Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
55
––– –––
showing the
A
G
integral reverse
––– ––– 220
S
p-n junction diode.
––– ––– 2.5
V
TJ = 25°C, IS = 51A, VGS = 0V ––– 70 105
ns
TJ = 25°C, IF = 51A
––– 146 219
nC
di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
ISD ≤ 51A, di/dt ≤ 227A/µs, VDD ≤ V(BR)DSS,
Starting TJ = 25°C, L = 89µH
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
TJ ≤ 175°C
RG = 25Ω, IAS = 51A. (See Figure 12)
2
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IRFZ44VPBF
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
100
100
10
4.5V
1
20µs PULSE WIDTH
TJ = 25 °C
0.1
0.1
1
10
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 175 ° C
10
V DS= 25V
20µs PULSE WIDTH
6
7
8
9
10
11
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
10
100
Fig 2. Typical Output Characteristics
TJ = 25 ° C
5
1
VDS , Drain-to-Source Voltage (V)
1000
4
20µs PULSE WIDTH
TJ = 175 °C
1
0.1
100
Fig 1. Typical Output Characteristics
100
4.5V
10
VDS , Drain-to-Source Voltage (V)
1
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
TOP
12
3.0
ID = 55A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( ° C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
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IRFZ44VPbF
4000
VGS , Gate-to-Source Voltage (V)
Crss = Cgd
Coss = Cds + Cgd
3000
C, Capacitance(pF)
20
VGS = 0V,
f = 1 MHZ
Cis = Cgs + Cgd, Cds SHORTED
2000
Ciss
1000
Coss
ID = 51A
16
12
8
4
Crss
0
1
10
0
100
0
20
40
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
80
100
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
TJ = 175 ° C
ID , Drain Current (A)
100
10us
100
TJ = 25 ° C
10
1
0.1
0.2
60
QG , Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
ISD , Reverse Drain Current (A)
V DS= 48V
V DS= 30V
V DS= 12V
VGS = 0 V
0.7
1.2
1.7
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
2.2
100us
10
1
1ms
TC = 25 °C
TJ = 175 °C
Single Pulse
1
10ms
10
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
4
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IRFZ44VPBF
VGS
50
ID , Drain Current (A)
RD
VDS
60
D.U.T.
RG
+
V
DD
-
40
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
30
Fig 10a. Switching Time Test Circuit
20
VDS
90%
10
0
25
50
75
100
125
150
TC , Case Temperature ( ° C)
175
10%
VGS
td(on)
Fig 9. Maximum Drain Current Vs.
Case Temperature
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response(Z thJC )
10
1
D = 0.50
0.20
0.10
0.1
PDM
0.05
t1
SINGLE PULSE
(THERMAL RESPONSE)
0.02
0.01
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
5
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15V
L
VDS
DRIVER
D.U.T
RG
+
- VDD
IAS
20V
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
IRFZ44VPbF
250
ID
21A
36A
BOTTOM 51A
TOP
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J, Junction Temperature ( ° C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
10 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
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IRFZ44VPBF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
•
•
•
•
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
7
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IRFZ44VPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
1
2
3
4- DRAIN
14.09 (.555)
13.47 (.530)
4- COLLECTOR
4.06 (.160)
3.55 (.140)
3X
3X
LEAD ASSIGNMENTS
IGBTs, CoPACK
1 - GATE
2 - DRAIN
1- GATE
1- GATE
3 - SOURCE 2- COLLECTOR
2- DRAIN
3- EMITTER
3- SOURCE
4 - DRAIN
HEXFET
1.40 (.055)
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
ASSEMBLED O N WW 19, 1997
IN THE ASSEMBLY LINE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INTERNATIO NAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
8
PART NUMBER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
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