MDT1020 u 4 oscillator start-up time : 150 µs, 20 ms, 40 ms, 80 ms 1. General Description This ROM-Based 8-bit micro-controller uses a fully static CMOS design technology combines higher speed and smaller size with the low power and high noise immunity of CMOS. On chip memory system includes 2.0 K bytes of ROM, and 80 bytes of static RAM. 2. Features The followings are some of the features on the hardware and software : u Fully CMOS static design u 8-bit data bus u On chip ROM size : 2 K words u Internal RAM size : 80 bytes (72 general purpose, 8 special registers) u 36 single word instructions u 14-bit instructions u 2-level stacks u Operating voltage : 2.3 V ~ 6.3 V u Operating frequency : 0 ~ 20 MHz u The fastest execution time is 200 ns under 20 MHz in all single cycle instructions except the branch instruction. u Addressing modes include direct, indirect and relative addressing modes u Power-on Reset u Power Edge-detector Reset u Sleep mode for power saving u 8-bit real time clock/counter(RTCC) with 8-bit programmable prescaler u 4 types of oscillator can be selected by code options : RC－Low cost RC oscillator LFXT－Low frequency crystal oscillator XTAL－Standard crystal oscillator HFXT－High frequency crystal oscillator u On-chip RC oscillator based Watchdog Timer(WDT) can be operated freely u Pull up resistors for the following pins : PA0~PA3, PB0~PB7,PC0~PC7, /MCLR, RTCC u Pull down resistors for the following pins : PA0~PA3, PB0~PB7, PC0~PC7, RTCC u 20 I/O pins with their own independent direction control 3. Applications The application areas of this MDT1020 range from appliance motor control and high speed automotive to low power remote transmitters/receivers, pointing devices, and telecommunications processors, such as Remote controller, small instruments, chargers, toy, automobile and PC peripheral … etc. This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.1 2005/6 Ver1.4 MDT1020 4. Pin Assignment RTCC Vdd N/C Vss N/C PA0 PA1 PA2 PA3 PB0 PB1 PB2 PB3 PB4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 /MCLR OSC1 OSC2 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PB7 PB6 PB5 5. Pin Function Description Pin Name I/O Function Description PA0~PA3 I/O Port A, TTL input level PB0~PB7 I/O Port B, TTL input level PC0~PC7 I/O Port C, TTL input level RTCC I Real Time Clock/Counter, Schmitt Trigger input levels /MCLR I Master Clear, Schmitt Trigger input levels OSC1 I Oscillator Input OSC2 O Oscillator Output Vdd Power supply Vss Ground This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.2 2005/6 Ver1.4 MDT1020 6. Memory Map (A) Register Map Address Description 00 Indirect Addressing Register 01 RTCC 02 PC 03 STATUS 04 MSR 05 Port A 06 Port B 07 Port C 08~0F Internal RAM, General Purpose Register 10~1F Internal Memory Select Register 30~3F Internal Memory Select Register 50~5F Internal Memory Select Register 70~7F Internal Memory Select Register (1) IAR ( Indirect Address Register) : R0 (2) RTCC (Real Time Counter/Counter Register) : R1 This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.3 2005/6 Ver1.4 MDT1020 (3) PC (Program Counter) : R2 Write PC, CALL --- always 0 LJUMP, JUMP, LCALL --- from instruction word RTWI, RET --- from STACK A10 A9 A8 A7~A0 Write PC, JUMP, CALL --- from SATUS b6 b5 LJUMP, LCALL --- from instruction word RTWI, RET --- from STACK Write PC --- from ALU LJUMP, JUMP, LCALL, CALL --- from instruction word RTWI, RET --- from STACK (4) STATUS (Status register) : R3 Bit Symbol Function 0 C Carry bit 1 HC Half Carry bit 2 Z Zero bit 3 PF Power loss Flag bit 4 TF Time overflow Flag bit page Page select bit : 6—5 00 : 000H --- 1FFH 01 : 200H --- 3FFH 10 : 400H --- 5FFH 11 : 600H --- 7FFH 7 —— General purpose bits This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.4 2005/6 Ver1.4 MDT1020 (5) MSR (Memory Select Register) : R4 Memory Select Register : 00 : 10~1F 01 : 30~3F 10 : 50~5F 11 : 70~7F b7 b6 b5 b4 b3 b2 b1 Read only “1” Indirect Addressing Mode (6) PORT A : R5 PA3~PA0, I/O Register (7) PORT B : R6 PB7~PB0, I/O Register (8) PORT C : R7 PC7~PC0, I/O Register (9) TMR (Time Mode Register) Bit Symbol Function Prescaler Value 2—0 PS2—0 3 PSC 4 TCE 5 TCS RTCC rate WDT rate 0 0 0 1:2 1:1 0 0 1 1:4 1:2 0 1 0 1:8 1:4 0 1 1 1 : 16 1:8 1 0 0 1 : 32 1 : 16 1 0 1 1 : 64 1 : 32 1 1 0 1 : 128 1 : 64 1 1 1 1 : 256 1 : 128 Prescaler assignment bit : 0 — RTCC 1 — Watchdog Timer RTCC signal Edge : 0 — Increment on low-to-high transition on RTCC pin 1 — Increment on high-to-low transition on RTCC pin RTCC signal set : 0 — Internal instruction cycle clock 1 — Transition on RTCC pin (10) CPIO A, CPIO B, CPIO C (Control Port I/O Mode Register) This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.5 2005/6 Ver1.4 b0 MDT1020 The CPIO register is “write-only” ＝“0”, I/O pin in output mode; ＝“1”, I/O pin in input mode. (11) Configuration ROM : Bit 1 Bit 0 0 0 RC 0 1 LFXT Oscillator 1 0 XTAL Oscillator 1 1 HFXT Oscillator Bit 3 Bit 2 0 0 150 µs 0 1 20 ms 1 0 40 ms 1 1 80 ms Bit 4 Oscillator Type Oscillator Oscillator Start-up Time Watchdog Timer control 0 Watchdog timer disable all the time 1 Watchdog timer enable all the time (B) Program Memory Address Description 000-7FF Program memory 7FF The starting address of the power on, external reset or WDT 7. Reset Condition for all Registers Register Address Power-On Reset /MCLR or WDT Reset CPIO A －－ 1111 1111 1111 1111 CPIO B －－ 1111 1111 1111 1111 CPIO C －－ 1111 1111 1111 1111 TMR －－ --11 1111 --11 1111 Register Address Power-On Reset /MCLR or WDT Reset This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.6 2005/6 Ver1.4 MDT1020 IAR 00h － － RTCC 01h xxxx xxxx uuuu uuuu PC 02h 1111 1111 1111 1111 STATUS 03h 0001 1xxx 000# #uuu MSR 04h 100x xxxx 100u uuuu PORT A 05h - - - - xxxx - - - - uuuu PORT B 06h xxxx xxxx uuuu uuuu PORT C 07h xxxx xxxx uuuu uuuu Note ： u＝unchanged， x＝unknown， - ＝unimplemented， read as “0” #＝value depends on the condition of the following table Status： bit 4 Status： bit 3 Condition /MCLR reset (not during SLEEP) u u /MCLR reset during SLEEP 1 0 WDT reset (not during SLEEP) 0 1 WDT reset during SLEEP 0 0 8. Instruction Set Mnemonic Operands Instruction Code Function Operating Status 010000 00000000 NOP No operation None 010000 00000001 CLRWT Clear Watchdog timer 0→WT TF， PF 010000 00000010 SLEEP Sleep mode 0→WT,stop OSC TF， PF 010000 00000011 TMODE Load W to TMODE register W→TMODE None 010000 00000100 RET Return Stack→PC None Control I/O port register W→CPIO Store W to register W→R Load register R→t Z Load immediate to W I→W None [R(0~3) ↔ R(4~7)]→t None 010000 00000rrr CPIO R 010001 1rrrrrrr STWR 011000 trrrrrrr LDR 111010 iiiiiiii LDWI 010111 trrrrrrr SWAPR R， t Swap halves register 011001 trrrrrrr INCR R R， t I R， t Increment register 011010 trrrrrrr INCRSZ R， t Increment register， skip if zero Mnemonic Instruction Code Function Operands r P.7 None R + 1→t Z R + 1→t None Operating This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw None 2005/6 Ver1.4 Status MDT1020 011011 trrrrrrr ADDWR R， t Add W and register W + R→t 011100 trrrrrrr SUBWR R, t Subtract W from register R ﹣W→t (R+/W+1 C,HC,Z →t) 011101 trrrrrrr DECR R, t Decrement register R ﹣1→t Z 011110 trrrrrrr DECRSZ R, t R ﹣1→t None 010010 trrrrrrr ANDWR R, t Decrement register, skip if zero AND W and register R ∩ W→t Z 110100 iiiiiiii ANDWI AND W and immediate i ∩ W→W Z 010011 trrrrrrr IORWR R, t Inclu. OR W and register R ∪ W→t Z 110101 iiiiiiii IORWI i Inclu. OR W and immediate i ∪ W→W Z 010100 trrrrrrr XORWR R, t Exclu. OR W and register R ♁ W→t Z 110110 iiiiiiii XORWI Exclu. OR W and immediate i ♁ W→W Z 011111 trrrrrrr COMR R, t Complement register /R→t Z 010110 trrrrrrr RRR R, t Rotate right register R(n)→R(n-1), C→ R(7),R(0)→C C 010101 trrrrrrr RLR R, t Rotate left register R(n)→r(n+1), C→R(0),R(7)→C C 010000 1xxxxxxx CLRW Clear working register 0→W Z 010001 0rrrrrrr CLRR Clear register 0→R Z 0000bb brrrrrrr BCR R, b Bit clear 0→R(b) None 0010bb brrrrrrr BSR R, b Bit set 1→R(b) None 0001bb brrrrrrr BTSC R, b Bit Test, skip if clear Skip if R(b)=0 None 0011bb brrrrrrr BTSS R, b Bit Test, skip if set Skip if R(b)=1 None 100nnn nnnnnnnn LCALL n Long CALL subroutine n→PC, PC+1→Stack None 101nnn nnnnnnnn LJUMP n Long JUMP to address n→PC None n Call subroutine n→PC, PC+1→Stack None Return, place immediate to W Stack→PC, i→W None JUMP to address n→PC None i i R 110000 nnnnnnnn CALL 110001 iiiiiiii RTWI 11001n nnnnnnnn JUMP i n C,HC,Z Note : W WT TMODE CPIO TF PF PC OSC : : : : : : : : Working register Watchdog timer TMODE mode register Control I/O port register Timer overflow flag Power loss flag Program Counter Oscillator b t : : 0 1 R : C : HC : Z : Bit position Target : Working register : General register General register address Carry flag Half carry Zero flag This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.8 2005/6 Ver1.4 MDT1020 Inclu. Exclu. AND Inclusive ‘∪’ Exclusive ‘♁’ Logic AND ‘∩’ : : : / x i n : : : : Complement Don’t care Immediate data ( 8 bits ) Immediate address 9. Electrical Characteristics (A) Operating Voltage & Frequency Vdd ﹕2.3 V ~ 6.3 V Frequency﹕0 Hz ~ 20 MHz (B) Input Voltage @ V dd＝5.0 V, Temperature＝25 ℃ Vil Vih Port Min. Max. PA, PB, PC Vss 1.0 V RTCC, /MCLR Vss 0.8 V PA, PB, PC 2.0 V Vdd RTCC, /MCLR 3.4 V Vdd ＊Threshold Voltage : Port A, Port B, Port C V th＝1.3 V RTCC, /MCLR V il ＝1.3 V, V ih ＝3.0 V (Schmitt Trigger) (C) Output Voltage @ V dd＝5.0 V, Temperature＝25 ℃, the typical value as followings : PA, PB, PC Port Ioh＝－20.0 mA Voh＝3.60 V Iol ＝20.0 mA Vol ＝0.35 V Ioh＝－5.0 mA Voh＝4.70 V Iol ＝5.0 mA Vol ＝0.08 V This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.9 2005/6 Ver1.4 MDT1020 (D) Leakage Current @ V dd＝5.0 V, Temperature＝25 ℃, the typical value as followings : Iil － 1.0 µA (Max.) Iih ＋ 1.0 µA (Max.) (E) Sleep Current @WDT－Disable, Temperature＝25 ℃, the typical value as followings : Vdd＝2.3 V ~ 6.3 V, dI d＜0.1 µA @WDT－Enable, Temperature＝25 ℃, the typical value as followings : Vdd＝2.3 V Idd＜1.0 µA Vdd＝3.0 V Idd＝2.0 µA Vdd＝4.0 V Idd＝5.0 µA Vdd＝5.0 V Idd＝10.0 µA Vdd＝6.3 V Idd＝20.0 µA (F) Operating Current / Voltage Temperature＝25℃, the typical value as followings : (i) OSC Type＝RC ; WDT－Enable; @ V dd＝5.0 V Cext. (F) 3P 20P Rext. (Ohm) Frequency (Hz) Current (A) 4.7 K 11.76 M 1.90 m 10.0 K 7.40 M 1.12 m 47.0 K 1.96 M 315.00 µ 100.0 K 952.50 K 175.00 µ 300.0 K 310.00 K 90.00 µ 470.0 K 196.1 K 75.00 µ 4.7 K 6.45 M 950.0 µ 10.0 K 3.70 M 540.0 µ 47.0 K 869.60 K 160.0 µ 100.0 K 416.80 K 105.0 µ 300.0 K 137.90 K 65.0 µ 470.0 K 88.88 K 60.0 µ This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.10 2005/6 Ver1.4 MDT1020 Cext. (F) 100P 300P Rext. (Ohm) Frequency (Hz) Current (A) 4.7 K 2.00 M 325.0 µ 10.0 K 1.11 M 190.0 µ 47.0 K 256.40 K 80.0 µ 100.0 K 121.20 K 65.0 µ 300.0 K 40.00 K 55.0 µ 470.0 K 25.60 K 50.0 µ 4.7 K 833.20 K 160.0 µ 10.0 K 454.00 K 105.0 µ 47.0 K 105.30 K 65.0 µ 100.0 K 50.00 K 55.0 µ 300.0 K 16.60 K 50.0 µ 470.0 K 10.50 K 49.0 µ (ii) OSC Type＝LF (C=20 p); WDT－Disable Voltage/Frequency 32 K 455 K 1M Sleep X ＜0.1 µA 2.3 V 4.0 µA 3.0 V 7.0 µA 48.0 µA X ＜0.1 µA 4.0 V 10.0 µA 70.0 µA 150.0 µA ＜0.1 µA 5.0 V 15.0 µA 105.0 µA 210.0 µA ＜0.1 µA 6.3 V 30.0 µA 150.0 µA 290.0 µA ＜0.1 µA X (iii) OSC Type＝XT (C=10 p); WDT－Enable Voltage/Frequency 1M 4M 10 M Sleep 2.1 V 70.0 µA 220.0 µA 500.00 µA ＜0.1 µA 3.0 V 130.0 µA 365.0 µA 820.00 µA 2.0 µA 4.0 V 250.0 µA 560.0 µA 1.20 mA 5.0 µA 5.0 V 470.0 µA 780.0 µA 1.70 mA 10.0 µA 6.3 V 530.0 µA 1.2 mA 2.30 mA 20.0 µA This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.11 2005/6 Ver1.4 MDT1020 (iv) OSC Type＝HF (C=10 p); WDT－Enable Voltage/Frequency 4M 10 M 20 M Sleep 2.1 V 230.0 µA 530.00 µA 970.00 µA ＜0.1 µA 3.0 V 400.0 µA 890.00 µA 1.60 mA 2.0 µA 4.0 V 620.0 µA 1.30 mA 2.40 mA 5.0 µA 5.0 V 890.0 µA 1.90 mA 3.40 mA 10.0 µA 6.3 V 1.3 mA 2.60 mA 5.00 mA 20.0 µA (G) Pull Resistance @ Input Mode : V dd＝3.0 V PORT RTCC /MCLR Rhi ＝370.0 KOhm Pull-High Resistance Pull-Low Resistance Pull-High Resistance Pull-Low Resistance Pull-High Resistance Rhi ＝370.0 KOhm Pull-High Resistance Rhi ＝170.0 KOhm Pull-Low Resistance Rlo ＝170.0 KOhm Pull-High Resistance Rhi ＝170.0 KOhm Pull-Low Resistance Rlo ＝170.0 KOhm Pull-High Resistance Rhi ＝170.0 KOhm Rlo ＝370.0 KOhm Rhi ＝370.0 KOhm Rlo ＝370.0 KOhm @ Input Mode : V dd＝5.0 V PORT RTCC /MCLR p.s. : It is only a reference value for the Pull High/Low Resistance, and the accurate value of the Resistance depends on the various parameter of the Process. But the variation of the value will be not more than 20%. This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.12 2005/6 Ver1.4 MDT1020 (H) Power Edge-detector Reset Voltage (Not in Sleep Mode), @ V dd＝5.0 V Vpr≦1.1~1.3 V Vpr ﹕Vdd (Power Supply) (I) The basic WDT time-out cycle time @Temperature＝25 ℃, the typical value as followings : Voltage (V) Basic WDT time-out cycle time (ms) 2.3 29.84 3.0 26.88 4.0 23.91 5.0 20.70 6.3 18.98 This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.13 2005/6 Ver1.4 MDT1020 10. Port A ,Port B and Port C Equivalent Circuit Working Register D QB Data I/P I/O Control Latch I/O Control CK MOS Pull-Hi (Long Channel) Information Sheet Pull Hi/Lo Selection Q Port I/O Pin D MOS Pull-Down (Long Channel) Data O/P Latch Write CK Q Data Bus D QB Read Data I/P Latch Input Resistor TTL Input Level CK This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.14 2005/6 Ver1.4 MDT1020 11. MCLRB and RTCC Input Equivalent Circuit MOS Pull Hi (Long Channel) R≒ 1K MCLRB Schmitt Trigger Information Sheet Pull Hi/Lo Selection MOS Pull Hi (Long Channel) R≒ 1K RTCC Schmitt Trigger MOS Pull Low (Long Channel) Information Sheet Pull Hi/Lo Selection This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.15 2005/6 Ver1.4 MDT1020 12. Block Diagram RAM 72×8 ROM 2048×14 Stack Two Levels Port PA0~PA3 4 bits Port A 11 bits 11 bits Program Counters 14 bits Instruction Register Special Register OSC1 OSC2 MCLR Oscillator Circuit D0~D7 Instruction Decoder Port B Port PB0~PB7 8 bits Control Circuit Data 8-bit Power on Reset Power Down Reset Working Register Status Register ALU Port PC0~PC7 8 bits Port C 8-bit Timer/Counter WDT/OST Timer Prescale RTCC This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.16 2005/6 Ver1.4 MDT1020 13. Capacitor Selection For Crystal Oscillator (a) With built-in Oscillation Capacitors ( Default for HF,XT,LF ) @ Vdd＝2.3V~5.5 V , C1=C2=10P~15P This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.17 2005/6 Ver1.4 MDT1020 (b) Without built-in Oscillation Capacitors @ Vdd＝3.0 V~ 5.0 V Osc. Type HF XT LF Resonator Freq. C1 C2 20 MHz 5 pF ~10 pF 10 pF~30 pF 10 MHz 10 pF ~50 pF 20 pF ~100 pF 4 MHz 10 pF ~50 pF 20 pF ~100 pF 10 MHz 10 pF ~30 pF 10 pF ~50 pF 4 MHz 10 pF ~50 pF 20 pF ~100 pF 1 MHz 10 pF ~30 pF 20 pF ~50 pF 1 MHz 3 pF ~5 pF 3 pF ~5 pF 455 K 10 pF ~30 pF 20 pF ~50 pF 32 K 10 pF ~20 pF 15 pF ~30 pF This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.18 2005/6 Ver1.4