NHD‐3.12‐25664UMY3 OLED Display Module NHD‐ 3.12‐ 25664‐ UM‐ Y‐ 3‐ Newhaven Display 3.12” diagonal size 256 x 64 pixel resolution Model – includes Multi‐Font chip Emitting Color: Yellow +3V power supply Functions and Features • • • • • • 256 x 64 pixel resolution Built‐in SSD1322 controller Parallel or serial MPU interface Single, low voltage power supply RoHS compliant Multi‐Language Fonts built‐in Newhaven Display International, Inc. 2511 Technology Drive, Suite 101 Elgin IL, 60124 Ph: 847‐844‐8795 Fax: 847‐844‐8796 www.newhavendisplay.com [email protected] [email protected] [1] Table of Contents 1. Document Revision History 2. Mechanical Drawing 3. Interface Description 3.1. Parallel Interface 3.2. Serial Interface 3.3. MPU Interface Pin Selections 3.4. MPU Interface Pin Assignment Summery 4. Wiring Diagrams 5. Electrical Characteristics 6. Optical Characteristics 7. Font Content Address Table 8. Supported Languages 9. OLED controller Instruction Table 10. OLED controller to MPU interface 10.1. 6800‐MPU Parallel Interface 10.2. 8080‐MPU Parallel Interface 10.3. Serial Interface (4‐wire) 10.4. Serial Interface (3‐wire) 11. Example OLED Initialization Program code 12. Multi‐Font IC to MPU interface 12.1. Serial Interface 12.2. Communication Protocol 12.3. Timing Characteristics 13. Font Tables (see file: www.newhavendisplay.com/app_notes/MultiFont.pdf ) 14. Font Data Arrangement Format (see file: www.newhavendisplay.com/app_notes/MultiFont.pdf ) 15. Calculation of Font Addresses (see file: www.newhavendisplay.com/app_notes/MultiFont.pdf ) 16. Multi‐Font program code example 17. Quality Information 1. Document Revision History Revision 0 1 Date 10/15/2012 11/5/2012 Description Preliminary Release Initial Product Release [2] Changed by ‐ ‐ L A I 2. Mechanical Drawing 1 2 3 4 Rev 5 16 A T N 15.6 C7 φ 6.34 E D I B F N C D O C 2 11.6 MAX Date 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 VSS VDD NC D/C R/W (/WR) E (/RD) DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 /RES /CS BS1 BS0 MF_SCLK MF_SI /MF_CS2 MF_SO Date 11/21/12 3 4 Gen. Tolerance Unit ±0.3mm mm 5 Model: NHD-3.12-25664UMY3 6 The drawing contained herein is the exclusive property of Newhaven Display International, Inc. and shall not be copied, reproduced, and/or disclosed in any format without permission. [3] A B PIN ASSIGNMENT C7 Notes: 1. Color: Yellow 2. Controller IC: SSD1322 3. Interface: 8-bit 68xx/80xx Parallel, 4-wire SPI 4. RoHS Compliant 1 6 Description C D 3. Interface Description 3.1. Parallel Interface: Pin No. Symbol External Connection Power Supply Power Supply ‐ MPU MPU 1 2 3 4 5 VSS VDD NC D/C R/W or /WR 6 E or /RD MPU 7‐14 15 16 17 18 19 20 21 22 DB0 – DB7 /RES /CS BS1 BS0 MF_SCLK MF_SI /MF_CS2 MF_SO MPU MPU MPU MPU MPU MPU MPU MPU MPU Function Description Ground Supply Voltage for OLED and logic. No Connect Register select signal. D/C=0: Command, D/C=1: Data 6800‐interface: Read/Write select signal, R/W=1: Read R/W: =0: Write 8080‐interface: Active LOW Write signal. 6800‐interface: Operation enable signal. Falling edge triggered. 8080‐interface: Active LOW Read signal. 8‐bit Bi‐directional data bus lines. Active LOW Reset signal. Active LOW Chip Enable signal. MPU Interface Select signal. MPU Interface Select signal. Multi‐font IC Serial Clock Input Multi‐font IC Serial Data Input Multi‐font IC Active LOW Chip Enable signal. Multi‐font IC Serial Data Output 3.2. Serial Interface: Pin No. Symbol 1 2 3 4 5‐6 7 8 9 10‐14 15 16 17 18 19 20 21 22 VSS VDD NC D/C VSS SCLK SDIN NC VSS /RES /CS BS1 BS0 MF_SCLK MF_SI /MF_CS2 MF_SO External Connection Power Supply Power Supply ‐ MPU Power Supply MPU MPU ‐ Power Supply MPU MPU MPU MPU MPU MPU MPU MPU Function Description Ground Supply Voltage for OLED and logic. No Connect Register select signal. D/C=0: Command, D/C=1: Data Ground Serial Clock signal. Serial Data Input signal. No Connect Ground Active LOW Reset signal. Active LOW Chip Enable signal. MPU Interface Select signal. MPU Interface Select signal. Multi‐font IC Serial Clock Input Multi‐font IC Serial Data Input Multi‐font IC Active LOW Chip Enable signal. Multi‐font IC Serial Data Output [4] 3.3. MPU Interface Pin Selections Pin Name BS1 BS0 6800 Parallel 8‐bit interface 8080 Parallel 8‐bit interface 1 1 1 0 3‐wire Serial Interface 0 1 4‐wire Serial Interface 0 0 3.4. Bus Interface 8‐bit 6800 8‐bit 8080 3‐wire SPI 4‐wire SPI MPU Interface Pin Assignment Summery Data/Command Interface D7 D6 D5 D4 D3 D2 D1 D[7:0] D[7:0] Tie LOW NC SDIN Tie LOW NC SDIN D0 SCLK SCLK [5] E R/W E R/W /RD /WR Tie LOW Tie LOW Control Signals /CS D/C /CS D/C /CS D/C /CS Tie LOW /CS D/C /RES /RES /RES /RES /RES 4. Wiring Diagrams [6] [7] 5. Electrical Characteristics Item Operating Temperature Range Storage Temperature Range Symbol Top Tst Supply Voltage Supply Current (logic) VDD IDD Supply Current (display) ICC Sleep Mode Current “H” Level input “L” Level input “H” Level output “L” Level output Condition Absolute Max Absolute Max Ta=25°C, VDD=2.8V VDD=2.8V, 50% ON VDD=2.8V, 100% ON IDD+ICCSLEEP Vih Vil Voh Vol Min. ‐20 ‐40 Typ. ‐ ‐ Max. +70 +90 Unit ⁰C ⁰C 2.4 ‐ ‐ ‐ ‐ 0.8*VDD VSS 0.9*VDD VSS 2.8 1.8 28.1 47.7 25 ‐ ‐ ‐ ‐ 3.5 18 35.1 59.7 140 VDD 0.2*VDD VDD 0.1VDD V mA mA mA µA V V V V 6. Optical Characteristics Item Viewing Angle – Vertical (top) Viewing Angle – Vertical (bottom) Viewing Angle – Horizontal (left) Viewing Angle – Horizontal (right) Contrast Ratio Response Time (rise) Response Time (fall) Brightness Lifetime Symbol AV AV AH AH Cr Tr Tf Condition Min. 80 80 80 80 2000:1 ‐ ‐ 60 40,000 Typ. ‐ ‐ ‐ ‐ ‐ 10 10 80 ‐ Max. ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ Unit ⁰ ⁰ ⁰ ⁰ ‐ us us cd/m2 Hrs ‐ ‐ 50% checkerboard Ta=25°C, 50% checkerboard Note: Lifetime at typical temperature is based on accelerated high‐temperature operation. Lifetime is tested at average 50% pixels on and is rated as Hours until Half‐Brightness. The Display OFF command can be used to extend the lifetime of the display. Luminance of active pixels will degrade faster than inactive pixels. Residual (burn‐in) images may occur. To avoid this, every pixel should be illuminated uniformly. [8] 7. Font Content Address Table # Type Font Content Character Set 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 ASCII 5x7 ASCII 7x8 ASCII 8x16 BOLD ASCII Width‐adjusted Arial ASCII 8x16 Latin 8x16 Latin 8x16 Latin 8x16 Latin 8x16 Latin 8x16 Greek 8x16 Cyrillic 8x16 Hebrew 8x16 Thai Width‐adjusted Latin Width‐adjusted Latin Width‐adjusted Latin Width‐adjusted Latin Width‐adjusted Latin Width‐adjusted Greek Width‐adjusted Cyrillic Width‐adjusted Arabic GB2312 KSC5605 JIS0208 5x7 ISO8859 LCM 5x10 ASCII ASCII ASCII ASCII Basic Supplement Extended A Extended B Extended Additional Basic Basic Basic Basic Basic Supplement Extended A Extended B Extended Additional Basic Basic Basic UNICODE CJK LCM [9] Number of Characters 96 96 96 96 96 96 128 80 96 96 208 112 128 96 96 128 80 96 96 208 576 7,614 6,500 7,999 1,792 1,792 Base Address (decimal) 0 768 1,536 3,072 6,336 7,872 9,408 11,456 12,736 14,272 15,808 19,136 20,928 22,976 26,240 29,504 33,856 36,576 39,840 43,104 50,176 69,760 379,744 490,624 946,992 961,328 Base Address (hex) 000000 000300 000600 000C00 0018C0 001EC0 0024C0 002CC0 0031C0 0037C0 003DC0 004AC0 0051C0 0059C0 006680 007340 008440 008EE0 009BA0 00A860 00C400 011080 05CB60 077C80 0E7330 0EAB30 8. Supported Languages Language Family Area Europe Country United Kingdom Ireland USA Canada North America South Africa Language Family Language English Area Country Language Europe France Belgium Monaco French French, Dutch French, Italian North America Haiti French English English, French Belize Jamaica Trinidad and Tobago Bahamas Antigua and Barbuda Dominica St. Vincent St. Lucia Grenada St. Kitts‐Nevis English Guyana English Latin (French) Africa Australia New Zealand Tonga Latin (English) Australia Fiji Palau Solomon Vanuatu Kiribati Nauru Marshall Islands South Africa Zimbabwe Gambia English Europe English, Dutch Sierra Leone Africa Europe South America Latin (Portuguese) Africa Liberia Ghana Nigeria Uganda Zambia Malawi Seychelles Mauritius Botswana Namibia Lesotho Portugal Europe Cape Verde Guinea‐Bissau Sao Tome and Principe Angola Mozambique Germany Austria Luxembourg Latin (Dutch) Europe South English Latin (Spanish) South America Brazil Switzerland Latin (German) North America Liechtenstein Holland Surinam French Spanish, Catalan Spanish Spanish Spanish Paraguay Portuguese Africa German German, French German German, French German Latin (Nordic Europe) Dutch [10] Senegal Mali Burkina Faso Guinea Cote d’Ivoire Togo Benin Niger Cameroon Chad Central African Republic Djibouti Burundi Republic of Democratic Congo Congo Gabon Comoros Madagascar Spain Andorra Mexico Guatemala Costa Rica Panama Dominican Republic El Salvador Honduras Nicaragua Puerto Rico Cuba Venezuela Colombia Peru Argentina Ecuador Chile Uruguay Europe Bolivia New Guinea Ceuta and Melilla Denmark Norway Sweden Danish Norwegian Swedish Faroes Faroese Greenland Greenlandic Iceland Icelandic Finland Estonia Latvia Finnish, Swedish Estonian Latvian Spanish America Latin (Central Europe) Latin (Southern Europe) Latin (Southeast Asia) Europe Europe Asia Czech Slovakia Poland Hungary Romania Slovenia Croatia Italy San Marino Vatican Turkey Malta Albania Vietnam Malaysia Brunei Indonesia East Timor Philippines Arabic (Africa) Arabic (Asia) Africa Asia Egypt Tunisia Libya Morocco Algeria Sudan Somalia Djibouti Mauritania Syria United Arab Emirates Lebanon Yemen Kuwait Qatar Bahrain Oman Jordan Iraq Saudi Arabia Palestine Iran Pakistan Afghanistan Czech Slovak Polish Hungarian Romanian Slovenian Crotian Cyrillic (Eastern Europe) Italian Turkish Maltese Albanian Vietnamese Cyrillic (Asia) Asia Indonesian Greek Europe English, Tagalog Latin (Africa) Africa Malaysian Arabic Arabic Hebrew Thai Japan Korea Asia Asia Asia Asia China Asia Farsi Urdu, Arabic Pashto [11] Europe Lithuania Russia Belarus Ukraine Bulgaria Moldova Yugoslavia Barbados Macedonia Azerbaijan Kirghizstan Tajikistan Turkmenistan Uzbekistan Kazakhstan Mongolia Greece Cyprus Kenya Tanzania Israel Thailand Japan Korea China Singapore Lithuanian Russian Russian Ukrainian Bulgarian Russian Serbian Macedonian Azeri Kyrgyz Tajik Turkmen Uzbek Kazakh Mongolian Greek Kiswahili Hebrew Thai Japanese Korean Chinese 9. OLED controller Instruction Table (Built‐In SSD1322 Controller/Driver) Instruction Enable Grayscale Table Set Column Address Write RAM Command Read RAM Command Set Row Address Set Remap Set Display Start Line Set Display Offset Display Mode Enable Partial Display Exit Partial Display Function Selection D/C 0 HEX 00 DB7 0 DB6 0 Code DB5 DB4 0 0 DB3 0 DB2 0 DB1 0 DB0 0 0 1 1 0 15 A[6:0] B[6:0] 5C 0 * * 0 0 A6 B6 1 0 A5 B5 0 1 A4 B4 1 0 A3 B3 1 1 A2 B2 1 0 A1 B1 0 1 A0 B0 0 0 5D 0 1 0 1 1 1 0 1 0 1 1 0 1 1 75 A[6:0] B[6:0] A0 A[5:0] B[4] 0 * * 1 0 * 1 A6 B6 0 0 * 1 A5 B5 1 A5 0 1 A4 B4 0 A4 B4 0 A3 B3 0 0 0 1 A2 B2 0 A2 0 0 A1 B1 0 A1 0 1 A0 B0 0 A0 1 0 1 0 1 0 A1 A[6:0] A2 A[6:0] A4/A7 1 * 1 * 1 0 A6 0 A6 0 1 A5 1 A5 1 0 A4 0 A4 0 0 A3 0 A3 0 0 A2 0 A2 X2 0 A1 1 A1 X1 1 A0 0 A0 X0 0 1 1 0 0 A8 A[6:0] B[6:0] A9 AB 1 0 0 1 1 0 A6 B6 0 0 1 A5 B5 1 1 0 A4 B4 0 0 1 A3 B3 1 1 0 A2 B2 0 0 0 A1 B1 0 1 0 A0 B0 1 1 [12] Description Enable the Grayscale table settings. (see command 0xB8) Set column start and end address A[6:0]: Column start address. Range: 0‐119d B[6:0]: Column end address. Range: 0‐119d RESET value 0 119d Enable MCU to write Data into RAM Enable MCU to read Data from RAM Set row start and end address A[6:0]: Row start address. Range: 0‐127d B[6:0]: Row end address. Range: 0‐127d 0 127d A[0] = 0; Horizontal Address Increment A[0] = 1; Vertical Address Increment A[1] = 0; Disable Column Address remap A[1] = 1; Enable Column Address remap A[2] = 0; Disable Nibble remap A[2] = 1; Enable Nibble remap A[4] = 0; Scan from COM0 to COM[N‐1] A[4] = 1; Scan from COM[N‐1] to COM0 A[5] = 0; Disable COM split Odd/Even A[5] = 1; Enable COM split Odd/Even B[4] = 0; Disable Dual COM mode B[4] = 1; Enable Dual COM mode Note: A[5] must be 0 if B[4] is 1. Set display RAM display start line register from 0‐127. 0 Set vertical shift by COM from 0~127. 0 0xA4 = Entire display OFF 0xA5 = Entire display ON, all pixels Grayscale level 15 0xA6 = Normal display 0xA7 = Inverse display Turns ON partial mode. A[6:0] = Address of start row B[6:0] = Address of end row (B[6:0] > A[6:0]) Exit Partial Display mode A[0] = 0; External VDD 0 0 0 0 0 0 0xA6 1 0 A[0] AE~AF 0 1 0 0 0 1 0 0 0 1 0 1 0 1 A0 X0 A[0] = 1; Internal VDD regulator 0xAE = Sleep Mode ON (display OFF) 0xAF = Sleep Mode OFF (display ON) 1 0 1 0 1 B1 A[7:0] B3 A[7:0] 1 A7 1 A7 0 A6 0 A6 1 A5 1 A5 1 A4 1 A4 0 A3 0 A3 0 A2 0 A2 0 A1 1 A1 1 A0 1 A0 A[3:0] = P1. Phase 1 period of 5‐31 DCLK clocks A[7:4] = P2. Phase 2 period of 3‐15 DCLK clocks 9 7 Set GPIO 0 1 B5 A[3:0] 1 * 0 * 1 * 1 * 0 A3 1 A2 0 A1 1 A0 Set Second Precharge Period Set Grayscale Table 0 1 0 1 1 1 1 1 1 1 B6 A[3:0] B8 A1[7:0] A2[7:0] . . . A14[7:0] A15[7:0] 1 * 1 A15 A25 . . . A145 A155 1 * 1 A14 A24 . . . A144 A154 0 A3 1 A13 A23 . . . A143 A153 1 A2 0 A12 A22 . . . A142 A152 1 A1 0 A11 A21 . . . A141 A151 0 A0 0 A10 A20 . . . A140 A150 0 B9 1 1 1 0 0 1 Set Sleep Mode ON/OFF Set Phase Length Set Display Clock Divide Ratio / Oscillator Frequency Select Default Linear Gray Scale Table 1 0 * * 0 1 A17 A16 A27 A26 . . . . . . A147 A146 A157 A156 1 0 [13] A[3:0] = 0000; divide by 1 A[3:0] = 0001; divide by 2 A[3:0] = 0010; divide by 4 A[3:0] = 0011; divide by 8 A[3:0] = 0100; divide by 16 A[3:0] = 0101; divide by 32 A[3:0] = 0110; divide by 64 A[3:0] = 0111; divide by 128 A[3:0] = 1000; divide by 256 A[3:0] = 1001; divide by 512 A[3:0] = 1010; divide by 1024 A[3:0] >= 1011; invalid A[7:4] = Set the Oscillator Frequency. Frequency increases with the value of A[7:4]. Range 0000b~1111b. A[1:0] = 00; GPIO0 input disabled A[1:0] = 01; GPIO0 input enabled A[1:0] = 10; GPIO0 output LOW A[1:0] = 11; GPIO0 output HIGH A[3:2] = 00; GPIO1 input disabled A[3:2] = 01; GPIO1 input enabled A[3:2] = 10; GPIO1 output LOW A[3:2] = 11; GPIO1 output HIGH Sets the second precharge period A[3:0] = DCLKs 0 1100b 10b 10b 1000b Sets the gray scale pulse width in units of DCLK. Range 0‐180d. A1[7:0] = Gamma Setting for GS1 A2[7:0] = Gamma Setting for GS2 . . . A14[7:0] = Gamma Setting for GS14 A15[7:0] = Gamma Setting for GS15 Note: 0 < GS1 < GS2 < GS3 … < GS14 < GS15 The setting must be followed by command 0x00. Sets Linear Grayscale table GS0 pulse width = 0 GS0 pulse width = 0 Set Precharge Voltage 0 1 BB A[4:0] 1 * 0 * 1 * 1 A4 1 A3 0 A2 1 A1 1 A0 Set VCOMH Voltage 0 1 BE A[3:0] 1 * 0 * 1 * 1 * 1 A3 1 A2 1 A1 0 A0 Set Contrast Control Master Contrast Control 0 1 0 1 C1 A[7:0] C7 A[3:0] 1 A7 1 * 1 A6 1 * 0 A5 0 * 0 A4 0 * 0 A3 0 A3 0 A2 1 A2 0 A1 1 A1 1 A0 1 A0 Set Multiplex Ratio Set Command Lock 0 1 0 1 CA A[6:0] FD A[2] 1 * 1 0 1 A6 1 0 0 A5 1 0 0 A4 1 1 1 A3 1 0 0 A2 1 A2 1 A1 0 1 0 A0 1 0 GS0 pulse width = 8 GS0 pulse width = 16 . . . GS0 pulse width = 104 GS0 pulse width = 112 Set precharge voltage level. A[4:0] = 0x00; 0.20*VCC . . A[4:0] = 0x3E; 0.60*VCC Sets the VCOMH voltage level A[3:0] = 0x00; 0.72*VCC . . A[3:0] = 0x04; 0.8*VCC . . A[3:0] = 0x07; 0.86*VCC Double byte command to select 1 out of 256 contrast steps. Contrast increases as the value increases. A[3:0] = 0x00; Reduce output for all colors to 1/16 A[3:0] = 0x01; Reduce output for all colors to 2/16 . . A[3:0] = 0x0E; Reduce output for all colors to 15/16 A[3:0] = 0x0F; no change Set MUX ratio to N+1 MUX N=A[6:0]; from 16MUX to 128MUX (0 to 14 are invalid) A[2] = 0; Unlock OLED to enable commands A[2] = 1; Lock OLED from entering commands For detailed instruction information, see datasheet: http://www.newhavendisplay.com/app_notes/SSD1322.pdf [14] 0x17 0x04 0x7F 0x0f 127d 0x12 10.OLED Controller ‐> MPU Interface For detailed timing information, see datasheet: http://www.newhavendisplay.com/app_notes/SSD1322.pdf 10.1. 6800‐MPU Parallel Interface The parallel interface consists of 8 bi‐directional data pins, R/W, D/C, E, and /CS. A LOW on R/W indicates write operation, and HIGH on R/W indicates read operation. A LOW on D/C indicates “Command” read or write, and HIGH on D/C indicates “Data” read or write. The E input serves as data latch signal, while /CS is LOW. Data is latched at the falling edge of E signal. Function Write Command Read Status Write Data Read Data E ↓ ↓ ↓ ↓ R/W 0 1 0 1 /CS 0 0 0 0 D/C 0 0 1 1 10.2. 8080‐MPU Parallel Interface The parallel interface consists of 8 bi‐directional data pins, /RD, /WR, D/C, and /CS. A LOW on D/C indicates “Command” read or write, and HIGH on D/C indicates “Data” read or write. A rising edge of /RS input serves as a data read latch signal while /CS is LOW. A rising edge of /WR input serves as a data/command write latch signal while /CS is LOW. Function Write Command Read Status Write Data Read Data /RD /WR 1 ↑ ↑ 1 ↑ 1 ↑ 1 /CS 0 0 0 0 D/C 0 0 1 1 Alternatively, /RD and /WR can be kept stable while /CS serves as the data/command latch signal. Function Write Command Read Status Write Data Read Data /RD /WR 1 0 1 0 0 1 1 0 /CS ↑ ↑ ↑ ↑ D/C 0 0 1 1 [15] 10.3. Serial Interface (4‐wire) The 4‐wire serial interface consists of serial clock SCLK, serial data SDIN, D/C, and /CS. D0 acts as SCLK and D1 acts as SDIN. D2 should be left open. D3~D7, E, and R/W should be connected to GND. Function Write Command Write Data /RD Tie LOW Tie LOW /WR Tie LOW Tie LOW /CS 0 0 D/C 0 1 D0 ↑ ↑ SDIN is shifted into an 8‐bit shift register on every rising edge of SCLK in the order of D7, D6,…D0. D/C is sampled on every eighth clock and the data byte in the shift register is written to the GDRAM or command register in the same clock. Note: Read is not available in serial mode. 10.4. Serial Interface (3‐wire) The 3‐wire serial interface consists of serial clock SCLK, serial data SDIN, and /CS. D0 acts as SCLK and D1 acts as SDIN. D2 should be left open. D3~D7, E, R/W, and D/C should be connected to GND. Function Write Command Write Data /RD Tie LOW Tie LOW /WR Tie LOW Tie LOW /CS 0 0 D/C Tie LOW Tie LOW D0 ↑ ↑ SDIN is shifted into an 9‐bit shift register on every rising edge of SCLK in the order of D/C, D7, D6,…D0. D/C (first bit of the sequential data) will determine if the following data byte is written to the Display Data RAM (D/C = 1) or the command register (D/C = 0). Note: Read is not available in serial mode. For detailed protocol information, see datasheet: http://www.newhavendisplay.com/app_notes/SSD1322.pdf [16] 11.Example Initialization Sequence: Set_Command_Lock(0x12); // Unlock Basic Commands (0x12/0x16) Set_Display_On_Off(0x00); // Display Off (0x00/0x01) Set_Column_Address(0x1C,0x5B); Set_Row_Address(0x00,0x3F); Set_Display_Clock(0x91); // Set Clock as 80 Frames/Sec Set_Multiplex_Ratio(0x3F); // 1/64 Duty (0x0F~0x3F) Set_Display_Offset(0x00); // Shift Mapping RAM Counter (0x00~0x3F) Set_Start_Line(0x00); // Set Mapping RAM Display Start Line (0x00~0x7F) Set_Remap_Format(0x14); // Set Horizontal Address Increment // Column Address 0 Mapped to SEG0 // Disable Nibble Remap // Scan from COM[N‐1] to COM0 // Disable COM Split Odd Even // Enable Dual COM Line Mode Set_GPIO(0x00); // Disable GPIO Pins Input Set_Function_Selection(0x01); // Enable Internal VDD Regulator Set_Display_Enhancement_A(0xA0,0xFD); // Enable External VSL Set_Contrast_Current(0x9F); // Set Segment Output Current Set_Master_Current(0x0F); // Set Scale Factor of Segment Output Current Control //Set_Gray_Scale_Table(); // Set Pulse Width for Gray Scale Table Set_Linear_Gray_Scale_Table(); //set default linear gray scale table Set_Phase_Length(0xE2); // Set Phase 1 as 5 Clocks & Phase 2 as 14 Clocks Set_Display_Enhancement_B(0x20); // Enhance Driving Scheme Capability (0x00/0x20) Set_Precharge_Voltage(0x1F); // Set Pre‐Charge Voltage Level as 0.60*VCC Set_Precharge_Period(0x08); // Set Second Pre‐Charge Period as 8 Clocks Set_VCOMH(0x07); // Set Common Pins Deselect Voltage Level as 0.86*VCC Set_Display_Mode(0x02); // Normal Display Mode (0x00/0x01/0x02/0x03) Set_Partial_Display(0x01,0x00,0x00); // Disable Partial Display Set_Display_On_Off(0x01); [17] 12.Multi‐Font IC ‐> MPU Interface 12.1. Serial Interface The serial interface consists of serial clock MF_SCLK, serial data in MF_SI, serial data out MF_SO, chip enable /MF_CS2. Function Send Font Address Read Font Data MF_SCLK ↑ ↓ MF_SI DATA X MF_SO X DATA /MF_CS2 0 0 The Multi‐Font device is enabled by a high‐to‐low transition on /MF_CS2. /MF_CS2 must remain LOW for the duration of any command‐in or data‐out sequence. The Font Address is shifted in on the MF_SI line on the rising edge of MF_SCLK. The Font Data is shifted out on the MF_SO line on the falling edge of MF_SCLK. [18] 12.2. Communication Protocol Font data can be accessed and read by using the READ command instruction. Instruction READ Description Read Data (30MHz MAX) Instruction Code 0Bh Address Bytes 3 Dummy Bytes 1 Data Bytes 1 ~ ∞ READ mode supports up to 30MHz frequency on MF_SCLK. READ mode outputs the data starting from the specified address location. The data output stream is continuous through all addresses until terminated by a low‐to‐high transition on /MF_CS2. The internal address pointer will automatically increment after each byte is read. READ instruction is initiated by executing an 8‐bit command [0x0B] on the MF_SI line, followed by the desired font address bits [A23‐A0], and followed by an 8‐bit dummy write [0x00]. The font data will then be output on MF_SO line, MSB first. /MF_CS2 must remain active LOW for the duration of the read cycle. [19] 12.3. Timing Characteristics Symbol Fc tCH tCL tCLCH tCHCL tSLCH tCHSL tDVCH tCHDX tCHSH tSHCH tSHSL tSHQZ tCLQV tCLQX Parameter Clock Frequency Clock High Time Clock Low Time Clock Rise Time Clock Fall Time /MF_CS2 Active Setup Time /MF_CS2 Not Active Hold Time Data IN Setup Time Data IN Hold Time /MF_CS2 Active Hold Time /MF_CS2 Not Active Setup Time /MF_CS2 Deselect Time Output Disable Time Clock Low to Output Valid Output Hold Time Condition peak to peak peak to peak relative to MF_SCLK relative to MF_SCLK relative to MF_SCLK relative to MF_SCLK 13.Font Tables see file: www.newhavendisplay.com/app_notes/MultiFont.pdf 14.Font Data Arrangement see file: www.newhavendisplay.com/app_notes/MultiFont.pdf 15.Calculation of Font Addresses see file: www.newhavendisplay.com/app_notes/MultiFont.pdf 16.Multi‐Font program code example [20] Min. ‐ 15 15 0.1 0.1 5 5 2 5 5 5 100 ‐ ‐ 0 Max. 30 ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ 9 9 ‐ Unit MHz ns ns V/ns V/ns ns ns ns ns ns ns ns ns ns ns 17.Quality Information Test Item Content of Test High Temperature storage Test the endurance of the display at high storage temperature. Test the endurance of the display at low storage temperature. Test the endurance of the display by applying electric stress (voltage & current) at high temperature. Test the endurance of the display by applying electric stress (voltage & current) at low temperature. Test the endurance of the display by applying electric stress (voltage & current) at high temperature with high humidity. Test the endurance of the display by applying electric stress (voltage & current) during a cycle of low and high temperatures. Test the endurance of the display by applying vibration to simulate transportation and use. Low Temperature storage High Temperature Operation Low Temperature Operation High Temperature / Humidity Operation Thermal Shock resistance Vibration test Atmospheric Pressure test Static electricity test Test Condition Test the endurance of the display by applying atmospheric pressure to simulate transportation by air. Test the endurance of the display by applying electric static discharge. Note +90⁰C , 240hrs 2 ‐40⁰C , 240hrs 1,2 +85⁰C 240hrs 2 ‐40⁰C , 240hrs 1,2 +60⁰C , 90% RH , 240hrs 1,2 ‐40⁰C,30min ‐> 25⁰C,5min ‐> 85⁰C,30min = 1 cycle 100 cycles 10‐22Hz , 15mm amplitude. 22‐500Hz, 1.5G 30min in each of 3 directions X,Y,Z 115mbar, 40hrs 3 VS=800V, RS=1.5kΩ, CS=100pF One time 3 Note 1: No condensation to be observed. Note 2: Conducted after 2 hours of storage at 25⁰C, 0%RH. Note 3: Test performed on product itself, not inside a container. Evaluation Criteria: 1: Display is fully functional during operational tests and after all tests, at room temperature. 2: No observable defects. 3: Luminance >50% of initial value. 4: Current consumption within 50% of initial value Precautions for using OLEDs/LCDs/LCMs See Precautions at www.newhavendisplay.com/specs/precautions.pdf Warranty Information and Terms & Conditions http://www.newhavendisplay.com/index.php?main_page=terms Newhaven Display International, Inc. reserves the right to alter this product or specification at any time without notification. [21]