PAM PAM2306D

PAM2306D
Dual High-Efficiency PWM Step-Down DC-DC Coverter
Features
General Description
n Efficiency up to 96%
n Only 40µA (Typ. per Channel) Quiescent
Current
n Output Current: Up to 1A per Channel
n Internal Synchronous Rectifier
n 1.5MHz Switching Frequency
n Soft Start
n Under-Voltage Lockout
n Short Circuit Protection
n Thermal Shutdown
n Small 12L WDFN3x3 Package
n Pb-Free Package and RoHS Compliant
The PAM2306D is a dual step-down currentmode, DC-DC converter. At heavy load, the
constant-fr equency PWM control performs
excellent stability and transient response. To
ensure the longest battery life in portable
applications, the PAM2306D provides a powersaving Pulse-Skipping Modulation (PSM) mode to
r ed uc e q ui e sc e nt c u r r en t un de r li gh t l oa d
operation.
The PAM2306D supports a range of input
voltages from 2.5V to 5.5V, allowing the use of a
single Li+/Li-polymer cell, multiple Alkaline/NiMH
cell, USB, and other standard power sources. The
dual output voltages are available for adjustmen t.
All versions employ internal power switch and
synchronous rectifier for to minimize external part
c o u n t a n d r e a l i z e h i g h e ff i c i e n c y. D u r i n g
shutdown, the input is disconnected from the
output and the shutdown current is less than
0.1 μA. Other key features include under-voltage
lockout to prevent deep battery discharge.
Applications
n
n
n
n
n
Cellular Phone
Portable Electronics
Personal Information Appliances
Wireless and DSL Modems
MP3 Players
Typical Application
C OUT2
10μF
L2
VOUT2
V IN2
PAM2306D
1 V IN2
2
C IN2
4.7μF
3
R12
4
5
CFw1
100 pF
R11
6
EN2 12
LX2
NC2
G ND
FB2
FB1
G ND
NC1
LX1
E N1
V IN1
R21
C FW2
100 pF
11
10
9
R22
8
C IN1
4.7 μF
7
V IN1
L1
V OUT1
C OUT1
10μF
(
VOUTx = VREF 1 + Rx1
Rx2
)
Power Analog Microelectronics, Inc
www.poweranalog.com
02/2012 Rev1.1
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PAM2306D
Dual High-Efficiency PWM Step-Down DC-DC Coverter
Block Diagram
1 . 5M
OSC
+
SLOPE
COMP
VINx
IAMP
-
OSC
FBx
R1
MAIN
SWITCH( PCH )
S Q
FREQ
SHIFT
EA
+
R2
COMP
SWITCHING
LOGIC
AND
RS LATCH
BLANKING
CIRCUIT
R Q
ANTI SHOOTTHRU
SYNCHRONOUS
RECTIFIER ( NCH )
VIN
E Nx
0. 6VREF
+
IRCMP
SHUTDOWN
L Xx
GND
-
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02/2012 Rev1.1
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PAM2306D
Dual High-Efficiency PWM Step-Down DC-DC Coverter
Pin Configuration and Marking Information
TOP VIEW
WDFN-12L 3x3
VIN2
1
12
E N2
LX2
2
11
N C2
GND
3
10
F B2
F B1
4
9
GND
N C1
5
8
LX1
EN 1 6
7
VIN1
v 1: Output Voltage 1
v 2: Output Voltage 2
(refer to “Ordering
Information”)
X: Internal Code
Y: Year
W: Week
GND
(Exposed Pad)
Pin No.
1
2
3,9,
Exposed Pad
4
5,11
Pin Name
VIN2
LX2
GND
Pin Function
Power Input of Channel 2.
Pin f or Switching of Channel 2.
Ground.The exposed pad must be soldered to a large PCB and connected to
GND f or maximum power dissipation.
FB1
NC1,NC2
Feedback of Channel 1.
No Connection
6
EN1
Chip Enable of Channel 1 (Active High).VEN1 ≤VIN1.
7
8
VIN1
LX1
Power Input of Channel 1.
Pin for Switching of Channel 1.
10
12
FB2
EN2
Feedback of Channel 2.
Chip Enable of Channel 2 (Active High).VEN2 ≤VIN2.
Power Analog Microelectronics, Inc
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02/2012 Rev1.1
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PAM2306D
Dual High-Efficiency PWM Step-Down DC-DC Coverter
Absolute Maximum Ratings
These are stress ratings only and functional operation is not implied . Exposure to absolute
maximum ratings for prolonged time periods may affect device reliability . All voltages are with
respect to ground.
Input Voltage...................................-0.3V to 6.5V
E N1, FB1, LX1, EN2, FB 2 and LX2 Pin Voltage.......
-0.3V to (V IN+0.3V)
Maximum Junction Temperature..................150°C
Storage Temperature Range...........-65°C to 150°C
Soldering Temperature.....................260°C, 10sec
Recommended Operating Conditions
Supply Voltage..................................2.5V to 5.5V
Ambient Temperature Range............-40 °C to 85 °C
Junction Temperature Range..........-40°C to 125 °C
Thermal Information
Parameter
Symbol
Package
Maximum
Unit
Thermal Resis tance (Junction to ambient)
θJA
WDFN 3x3-12
60
°C/W
Thermal Res istance (Junc tion to case)
θJ C
WDFN 3x3-12
8.5
°C/W
Power Dissipation
PD
WDFN 3x3-12
1.66
W
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02/2012 Rev1.1
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PAM2306D
Dual High-Efficiency PWM Step-Down DC-DC Coverter
Electrical Characteristic
O
TA =25 C, VIN =3.6V, VO =1.8V, CIN =10µF, CO =10µF, L=2.2µH, unless otherwise noted.
PARAMETER
SYMBOL
Test Conditions
MIN
TYP
Input Voltage Range
VIN
2.5
Regulated Feedback Voltage
V FB
0.588
Reference Voltage Line Regulation
ΔVF B
Regulated Output Voltage Accuary
VO
IO = 100mA
Peak Inductor Current
IPK
V IN=3V ,V FB = 0.5V or V O=90%
1.5
0.6
MAX
UNITS
5.5
V
0.612
V
0.3
-3
% /V
+3
%
A
Output Voltage Line Regulation
LNR
V IN = 2.5V to 5V, IO=10mA
0.2
Output Voltage Load Regulation
LDR
IO=1mA to 1A
1.5
Quiescent Current (per channel)
IQ
No load
40
70
µA
Shutdown Current (per channel)
ISD
V EN = 0V
0.1
1
µA
1.5
1.8
MHz
Oscillator Frequenc y
fOSC
V O = 100%
1.2
V FB = 0V or V O = 0V
IDS =100mA
0.5
% /V
%
500
kHz
P MOSFET
0.3
0.45
Ω
N MOSFET
0.35
0.5
Ω
±0.01
1
µA
Drain-Sourc e On-State Resistance
RDS(O N)
SW Leakage Current (per channel)
ILSW
EN Threshold High
V EH
EN Threshold Low
V EL
EN Leak age Current
IEN
±0.01
µA
Over Temperature Protection
OTP
150
°C
OTP Hys teresis
OTH
30
°C
1.5
V
0.3
V
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02/2012 Rev1.1
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PAM2306D
Dual High-Efficiency PWM Step-Down DC-DC Coverter
Typical Performance Characteristics
TA =25 °C , CIN =10μF, CO =10μF, L=4.7 μH, unless otherwise noted.
Efficiency vs Output Current (Vo=1.2V)
Efficiency vs Input Voltage (Vo=1.2V)
100
95
90
90
85
80
80
70
75
60
Vin=3.6V
Vin=4.2V
Vin=5.0V
50
70
40
1
10
100
Io=10mA
Io=100mA
Io=1000mA
65
60
2.5
1000
3.0
3.5
4.0
4.5
5.0
5.5
Input Voltage(V)
Output Current(mA)
Efficiency vs Output Current (Vo=1.5V )
Efficiency vs Input Voltage (Vo=1.5V)
100
95
90
90
85
80
80
70
75
60
70
Vin=3.6V
Vin=4.2V
Vin=5.0V
50
65
60
2.5
40
1
10
100
Io=10mA
Io=100mA
Io=1000mA
1000
3.0
3.5
Output Current(mA)
4.0
4.5
Input Voltage(V)
5.0
5.5
Eifficiency vs Input Voltage (Vo=1.8V)
Efficiency vs Output Current (Vo=1.8V)
100
95
90
90
85
80
80
70
75
60
70
Vin=3.6V
Vin=4.2V
Vin=5.0V
50
65
60
2.0
40
1
10
100
Io=10mA
Io=100mA
Io=1000mA
1000
Output Current(mA)
3.0
4.0
5.0
6.0
Input Voltage(V)
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02/2012 Rev1.1
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PAM2306D
Dual High-Efficiency PWM Step-Down DC-DC Coverter
Typical Performance Characteristics
TA =25 °C , CIN =10μF, CO =10μF, L=4.7 μH, unless otherwise noted.
Efficiency vs Output Current (Vo=2.5V)
Efficiency vs Input Voltage (Vo=2.5V)
100
96
92
90
88
80
84
80
70
76
60
72
Vin=3.6V
Vin=4.2V
Vin=5.0V
50
64
40
1
10
100
Output Current(mA)
60
2.5
1000
100
95
95
90
90
85
85
80
80
75
75
5.5
65
60
4.0
60
10
100
Output Current(mA)
Io=10mA
Io=100mA
Io=1000mA
70
Vin=4.2V
Vin=5.0V
Vin=5.5V
1
4.5
Efficiency vs Input Voltage (Vo=3.3V)
100
65
3.5
Input Voltage(V)
Efficiency vs Output Current (Vo=3.3V )
70
Io=10mA
Io=100mA
Io=1000mA
68
1000
4.5
5.0
Input Voltage(V)
5.5
Rdson vs Input Voltage
Quiescent Current vs Input Voltage
43
0.36
42
0.34
41
Vout=1.2V
Vout=2.5V
Vout=3.3V
0.32
40
0.3
39
0.28
38
Vout=1.2V
Vout=1.8V
Vout=3.3V
37
0.26
36
2.5
3
3.5
4
4.5
Input Votage(V)
5
0.24
2.5
5.5
3
3.5
4
4.5
Input Votage(V)
5
5.5
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02/2012 Rev1.1
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PAM2306D
Dual High-Efficiency PWM Step-Down DC-DC Coverter
Typical Performance Characteristics
TA =25 °C , CIN =10μF, CO =10μF,,Vo=1.2V, L=4.7 μH, unless otherwise noted.
Reference Voltage vs Load Current
Output Voltage vs Load Current
614
1. 235
612
1. 230
610
1. 225
608
1. 220
606
1. 215
604
602
1. 210
Vin=3.6V
Vin=4.2V
Vin=5.0V
600
Vin=3.6V
Vin=4.2V
Vin=5.0V
1. 205
598
1. 200
0
200
400
6 00
800
0
1000
200
400
600
800
1000
Output Current(m A )
Output Current(mA)
Oscillator Frequency vs Supply Voltage
Oscillator Frequency vs Temperature
1.58
1.8
Vo=1.2V
1.7
1.56
1.6
1.5
1.54
1.4
1.52
1.3
1.2
1.50
2
3
4
5
Supply Voltage(V)
6
7
20
40
60
80
100
120
140
Temperature(℃)
Load Transient
Io=0-1A, Vo=3.3V, Vin=5V
Load Transient
Io=0-1A, Vo=1.2V, Vin=5V
Output
Current
Output
Current
Output
Voltage
Output
Voltage
Power Analog Microelectronics, Inc
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02/2012 Rev1.1
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PAM2306D
Dual High-Efficiency PWM Step-Down DC-DC Coverter
Application Information
The basic PAM2306D application circuit is
shown in Page 1. External component selection
is determined by the load requirement, selecting
L first and then Cin and Cout.
The selection of Cout is driven by the required
effective series resistance (ESR).
Typically, once the ESR requirement for Cout
has been met, the RMS current rating generally
far exceeds the I RIPPLE (P-P) requirement. The
output ripple △ Vout is determined by:
Inductor Selection
For most applications, the value of the inductor
will fall in the range of 1µH to 4.7µH. Its value is
chosen based on the desired ripple current.
Large value inductors lower ripple current and
small value inductors result in higher ripple
currents. Higher V IN or Vout also increases the
ripple current as shown in equation 1. A
reasonable starting point for setting ripple
current is △I L = 400mA (40% of 1A).
DIL =
1
 VOUT 
V OUT 
1
(f )(L )
 V IN 
1 

V VOUT @VI L 
ESR+

8fCO UT 

Where f = operating frequency, C OUT=output
capacitance and Δ I L = ripple current in the
inductor. For a fixed output voltage, the output
ripple is highest at maximum input voltage since
ΔIL increases with input voltage.
(1)
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are
now becoming available in smaller case sizes.
Their high ripple current, high voltage rating and
low ESR make them ideal for switching regulator
applications. Using ceramic capacitors can
achieve very low output ripple and small circuit
size.
The DC current rating of the inductor should be
at least equal to the maximum load current plus
half the ripple current to prevent core saturation.
Thus, a 1.4A rated inductor should be enough for
most applications (1A + 400mA). For better
efficiency, choose a low DC-resis tance inductor.
Vo
1.2V
1.5V
1.8V
2.5V
3.3V
L
2.2µH
2.2µH
2.2µH
4.7µH
4.7µH
When choosing the input and output ceramic
capacitors, choose the X5R or X7R dielectric
formulations. These dielectrics have the best
temperature and voltage charac teristics of all
the ceramics for a given value and size.
C IN and C OUT Selection
Thermal consideration
In continuous mode, the source current of the top
MOSFET is a square wave of duty cycle
Vout/Vin. To prevent large voltage transients, a
low ESR input capacitor sized for the maximum
RMS current must be used. The maximum RMS
capacitor current is given by:
Thermal protection limits power dissipation in
the PAM2306D. When the junction temperature
exceeds 150°C, the OTP (Over Temperature
Protection) starts the thermal shutdown and
turns the pass transistor off. The pass transistor
resumes operation after the junction
temperature drops below 120°C.
2

VOUT (VIN - VO UT )


C IN required IRMS @ IOMAX
VIN
1
For continuous operation, the junction
temperature should be maintained below 125°C.
The power dissipation is defined as:
This formula has a maximum at V IN =2Vout,
w h e r e IR MS = IOU T / 2 . T h i s s i m p l e w o r s t - c a s e
condition is com monly used for design because
even significant deviations do not offer much
relief. Note that the capacitor manufacturer's
ripple current ratings are often based on 2000
hours of life. This makes it advisable to further
derate the capacitor, or choose a capacitor rated
at a higher temperature than required. Consult
the manufac turer if there is any question.
PD =IO
2
VORDSONH + (VIN -VO )RDSONL
VIN
+ (tSW FSIO +IQ )VIN
IQ is the step-down converter quiescent current.
The term tsw is used to estimate the full load
step-down converter switching losses.
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PAM2306D
Dual High-Efficiency PWM Step-Down DC-DC Coverter
For the condition where the step-down converter
is in dropout at 100% duty cycle, the total device
dis sipation reduces to:
100% Duty Cycle Operation
As the input voltage approaches the output
voltage, the converter turns the P-chan nel
transistor continuously on. In this mode the
output voltage is equal to the input voltage minus
th e voltag e d rop ac ros s the P - c hannel
transistor:
2
PD =IO R DSONH +IQ VIN
Since RDS(ON) , quiescent current, and switching
losses all vary with input voltage, the total losses
should be investigated over the complete input
voltage range. The maximum power dissipation
de pend s on th e ther ma l r esi sta nc e of IC
package, PCB layout, the rate of surrounding
airflow and temperature difference between
junction and ambient. The maximum power
dissipation can be calculated by the following
formula:
PD =
V OUT = V IN –I LOAD (R dson + R L )
where Rdson = P-channel switch ON resistance,
IL O A D = O ut pu t c u rr e n t, RL = I nd uc t or DC
resistance
UVLO and Soft-Start
TJ(MAX) -TA
The reference and the circuit remain reset until
the VIN crosses its UVLO threshold.
θJA
Where TJ(max) is the maximum allowable
junction temperature 125°C.T A is the ambient
temperature and θJA is the thermal resistance
from the junction to the ambient. Based on the
standard JEDEC for a two layers thermal test
board, the thermal resistance θJA of WDFN3X3 is
60°C/W. The maximum power dissipation at T A =
25°C can be calculated by following formula:
The PAM2306D has an internal soft-start circuit
that limits the in-rush current during start-up.
This prevents possible voltage drops of the input
voltage and eliminates the output voltage
overshoot. The soft-start acts as a digital circuit
to increase the switch current in several steps to
the P-channel current limit (1500mA).
Short Circuit Protection
P D=(125°C-25°C)/60°C/W=1.66W
The switch peak current is limited cycle-by-cycle
to a typical value of 1500mA. In the event of an
output voltage short circuit, the device operates
with a frequency of 400kHz and minimum duty
cycle, therefore the average input current is
typically 200mA.
Setting the Output Voltage
The internal reference is 0.6V (Typical). The
output voltage is calculated as below:
 R1 
V O=0.6×1+
 R2 


Thermal Shutdown
When the die temperature exceeds 150°C, a
reset occurs and the reset remains until the
temperature decrease to 120°C, at which time
the circuit can be restarted.
The output voltage is given by Table 1.
Table 1: Resistor selection for output voltage
setting
Vo
R1
R2
1.2V
100k
100k
1.5V
150k
100k
1.8V
200k
100k
2.5V
380k
120k
3.3V
540k
120k
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PAM2306D
Dual High-Efficiency PWM Step-Down DC-DC Coverter
PCB Layout Check List
When laying out the printed circuit board, the following checklist should be used to ensure proper
operation of the PAM2306D. These items are also illustrated graphically in Figure 1. Check the following
in your layout:
1. The power traces, consisting of the GND trace, the SW trace and the VIN trace should be kept short,
direct and wide.
2. Does the FB pin connect directly to the feedback resistors? The resistive divider R1/R2 must be c onnected between the (+) plate of COUT and ground.
3. Does the (+) plate of CIN connect to VIN as closely as possible? This capacitor provides the AC
current to the internal power MOSFETs.
4. Keep the switching node, SW, away from the sensitive FB node.
5. Keep the (–) plates of C IN and C OUT as close as possible.
Top
Bottom
Figure 1 :PAM2306D Suggested Layout
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02/2012 Rev1.1
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PAM2306D
Dual High-Efficiency PWM Step-Down DC-DC Coverter
Ordering Information
PAM 2306D X X v 1 v 2
Output Voltage 2
Output Voltage 1
Number of Pins
Package Type
Package Type
Number of Pins
Y: WDFN 3x3
P: 12
Part Number
PAM2306DYPv1 v2
Marking
2306Dv1 v2
X XXYW
Output Voltage
v1
v2
A: Adj
A: Adj
Package Type
Standard Package
WDFN3x3-12
3,000 Units/Tape&Reel
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02/2012 Rev1.1
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PAM2306D
Dual High-Efficiency PWM Step-Down DC-DC Coverter
Outline Dimensions
3x3 mm WDFN 12
2
1
2
1
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note :The configuration of the Pin #1 identifier isoptional,
but must be located within the zone indicated.
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.150
0.250
0.006
0.010
D
2.950
3.050
0.116
0.120
D2
2.300
2.650
0.091
0.104
E
2.950
3.050
0.116
0.120
E2
1.400
1.750
0.055
0.069
e
L
0.450
0.350
0.018
0.450
0.014
0.018
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