PAM2319 Dual High-Efficiency PWM Step-Down DC-DC Coverter Features General Description n Supply Voltage:2.7V to 5.5V n Output Voltage: Vo1 ADJ/1000mA Vo2 ADJ/2000mA n Low Quiescent Current: Channel 1: 40uA; Channel 2: 55uA n High Efficiency: n Switching Frequency: 3MHz(Channel 1) 2.5MHz(Channel 2) n Internal Synchronous Rectifier n Soft Start n Under-Voltage Lockout n Short Circuit Protection n Thermal Shutdown n Small WDFN3X3-12L Pb-Free/Halogen Free Package n RoHS/REACH Compliant The PAM2319 is a dual step-down current-mode, DC-DC converter. At heavy load, the constantf r e q u en c y P W M c o n tr o l p e r f o r m s e x c e l l e nt stability and transient response. To ensure the longest battery life in portable applications, the PA M 2 3 1 9 p r o v i d e s a p o w e r - s a v i n g P u l s e Skipping Modulation (PSM) mode to reduce quiescent current under light load operation. The PAM2319 supports a range of input voltages from 2.7V to 5.5V, allowing the use of a single Li+/Li-polymer cell, multiple Alkaline/NiMH cell, USB, and other standard power sources. The dual output voltages are adjustable from 1.0V to 3.3V . Both channels employ internal power switch and synchronous rectifier to minimize external part c o u n t a n d r e a l i z e h i g h e f f i c i e n c y. D u r i n g shutdown, the input is disconnected from the output and the shutdown current is less than 0.1μA. Other key features include under-voltage lockout,soft-start,short circuit protection and thermal shutdown. Applications n Portable Electronics n Personal Information Appliances n Wireless and DSL Modems Typical Application L1 VIN 2.7 V--5 .5V 1 (6 )SW1 VIN1( 4) 2 1 .0u H C in Vo1 Co 1 C in 1 1 uF R 11 300k 10u F C fw1 10 0 pF 1 .8 V/1 00 0 m A C fw2 10 0 pF 1 .2 V/2 00 0 m A 1 0 uF 0 0 (7 )FB 1 EN 1(9 ) 0 R 12 150k PAM23 19 VIN2 (2 ) 0 L2 ( 12) SW2 C i n2 1uF 1 2 Vo 2 1 .0 uH Co 2 R 21 150k 10 uF 0 EN 2 (1 0) (1 )FB2 0 R 22 150k (5 )PGN D1 (8)AGND 1 (3)AGND 2 (1 1)P GN D2 0 0 0 0 0 Figure 1. Adjustable Voltage Regulator Power Analog Microelectronics, Inc www.poweranalog.com 12/2011 Rev1.1 1 PAM2319 Dual High-Efficiency PWM Step-Down DC-DC Coverter Block Diagram 3MHz /2.5MHz OSC + SLOPE COMP VIN IAMP - OSC FREQ SHIFT EA + FBx COMP EN MAIN SWITCH( PCH ) S Q SWITCHING LOGIC AND RS LATCH BLANKING CIRCUIT R Q 0. 6VREF ANTI SHOOTTHRU + IRCMP - SWx SYNCHRONOUS RECTIFIER( NCH) GND Note: 1. This block diagram above just shows one channel. Power Analog Microelectronics, Inc www.poweranalog.com 12/2011 Rev1.1 2 PAM2319 Dual High-Efficiency PWM Step-Down DC-DC Coverter Pin Configuration and Marking Information TOP VIEW WDFN-12L 3x3 FB2 1 12 VIN2 2 11 BN: Product Code of PAM2319 v1 : Output Voltage 1 v2 : Output Voltage 2 (refer to “Ordering Information”) X: Internal Code Y: Year W: Week SW2 3 10 E N2 VIN1 4 9 PGND1 5 8 SW1 6 7 EN 1 FB 1 GND (Exposed Pad) Pin Description QFN3x3 Name 1 FB2 Channel 2 feedback pin internally set to 0.6V. 2 VIN2 Input voltage pin of channel 2. 3 AGND2 4 VIN1 5 PGND1 6 SW1 7 FB1 8 AGND1 9 EN1 Enable control input. Pull logic high to enable Vo1. Pull logic low to disable. 10 EN2 Enable control input. Pull logic high to enable Vo2. Pull logic low to disable. 11 PGND2 12 SW2 Exposed PAD Function Signal ground of channel 2 for small signal components. Input voltage pin of channel 1. Main power ground pin of channel 1 Channel 1 switching pin. The drains of the internal main and s ynchronous power MOSFET. Channel 1 feedback pin internally set to 0.6V. Signal ground of channel 1 for small signal components. Main power ground pin of channel 2 Channel 2 switching pin. The drains of the internal main and s ynchronous power MOSFET. Connect to GND Power Analog Microelectronics, Inc www.poweranalog.com 12/2011 Rev1.1 3 PAM2319 Dual High-Efficiency PWM Step-Down DC-DC Coverter Absolute Maximum Ratings These are stress ratings only and functional operation is not implied . Exposure to absolute maximum ratings for prolonged time periods may affect device reliability . All voltages are with respect to ground. Input Voltage...................................-0.3V to 6.5V E N1, FB1, SW1, EN2, FB 2 and SW2 Pin Voltage.... -0.3V to (V IN+0.3V) Maximum Junction Temperature..................150°C Storage Temperature Range...........-65°C to 150°C Soldering Temperature.....................260°C, 10sec Recommended Operating Conditions Supply Voltage..................................2.7V to 5.5V Ambient Temperature Range............-40 °C to 85 °C Junction Temperature Range..........-40°C to 125 °C Thermal Information Parameter Symbol Package Maximum Unit Thermal Resistanc e (Junction to ambient) θJA WDFN 3x3-12L 60 °C/W Thermal Resistance (Junction to case) θJC WDFN 3x3-12L 8.5 °C/W Power Analog Microelectronics, Inc www.poweranalog.com 12/2011 Rev1.1 4 PAM2319 Dual High-Efficiency PWM Step-Down DC-DC Coverter Electrical Characteristic O TA =25 C, VIN =3.3V, VO =1.8V, CIN =10µF, CO =10µF, L=1.0µH, unless otherwise noted. Channel 1 PARAMETER Input Voltage Range UVLO Threshold SYMBOL Test Conditions VIN V UVLO MIN TYP 2.7 V IN Rising 2.4 Hysteresis 240 V IN Falling MAX UNITS 5.5 V 2.5 V mV 1.8 0.588 V Regulated Feedback Voltage V FB 0.6 Reference Voltage Line Regulation ΔVF B Regulated Output Voltage Acc uracy VO IO = 100mA Peak Inductor Current IPK V O=90% 1.5 0.2 0.612 0.3 Output Voltage Line Regulation LNR V IN = 2.7V to 5V, IO=10mA Output Voltage Load Regulation LDR IO=1mA to 1000mA -3 % /V +3 -2 V % A 0.5 % /V 2 % Quiescent Current IQ No load 40 80 µA Shutdown Current ISD V EN = 0V 0.1 1 µA Oscillator Frequenc y Drain-Sourc e On-State Resistance SW Leakage Current Efficiency PSM Threshold fOSC RDS(O N) V O = 100% 3 MHz V FB = 0V or V O = 0V 1 MHz P MOSFET 0.35 0.45 Ω N MOSFET 0.35 0.45 Ω ±0.01 1 µA ILSW η ITH EN Threshold High V EH EN Threshold Low V EL EN Leak age Current IEN Output1, Io=500mA,VIN=3.3V Vin=3.3V 84 % 100 mA 1.5 V 0.3 From EN1 to Output V ±0.01 µA 2 mS Soft-start T ON Over Temperature Protection OTP 150 °C OTP Hys teresis OTH 30 °C Power Analog Microelectronics, Inc www.poweranalog.com 12/2011 Rev1.1 5 PAM2319 Dual High-Efficiency PWM Step-Down DC-DC Coverter Electrical Characteristic O TA =25 C, VIN =3.3V, VO =1.2V, CIN =10µF, CO =10µF, L=1.0µH, unless otherwise noted. Channel 2 PARAMETER Input Voltage Range UVLO Threshold SYMBOL Test Conditions V IN VUVLO VIN Rising 2.6 Hysteresis 250 V FB Reference Voltage Line Regulation ΔV FB Regulated Output Voltage Accurac y VO Peak Inductor Current IPK TYP 2.7 VIN Falling Regulated Feedback Voltage MIN MAX UNITS 5.5 V 2.7 V mV 2 0.588 V 0.6 0.612 0.3 IO = 100mA -3 %/V +3 3 Output Voltage Line Regulation LNR VIN = 2.7V to 5V, IO=10mA Output Voltage Load Regulation LDR IO=0mA to 2000mA 0.2 -2 V % A 0.5 %/V 2 % Quiescent Current IQ No load 55 100 µA Shutdown Current ISD VEN = 0V 0.1 1 µA VO = 100% 2.5 MHz P MOSFET 0.11 Ω N MOSFET 0.085 Ω Oscillator Frequency Drain-Sourc e On-State Resistance SW Leakage Current Efficiency fOSC RDS(O N) ILSW η PSM Threshold ITH EN Threshold High VEH EN Threshold Low VEL EN Leak age Current IEN ±0.01 Io= 500mA,VIN=3.3V 1 87 Vin=3.3V 250 % 450 1.5 mA V 0.3 From EN2 to Output µA V ±0.01 µA 250 uS Soft-start T ON Over Temperature Protection OTP 150 °C OTP Hysteresis OTH 30 °C Power Analog Microelectronics, Inc www.poweranalog.com 12/2011 Rev1.1 6 PAM2319 Dual High-Efficiency PWM Step-Down DC-DC Coverter Typical Performance Characteristics TA =25 °C ,VO =1.8V, CIN =10µF, CO =10µF, L=1.0µH,unless otherwise noted. Channel 1 Efficiency vs Output Current Output Voltage vs Output Current 100 1.82 1.819 90 1.818 1.817 80 1.816 70 1.815 1.814 60 1.813 Vin=3.3V Vin=4.2V Vin=5V 50 Vin=3.3V 1.812 Vin=4.2V 1.811 40 Vin=5V 1.81 1 10 100 Output Current(mA) 1000 0 100 200 300 400 500 600 700 800 900 1000 Output Current(m A) Feedback Voltage vs Output Current Quiescent Current vs Input Voltage 606 50 605 45 40 604 35 603 30 602 25 20 601 15 600 V in=3.3V 10 V in=4.2V 599 5 V in=5V 0 598 0 2 00 40 0 60 0 80 0 2.5 10 00 Outpu t Cu rre nt(mA) R DS(ON) vs Input Voltage 3 3.5 4 4.5 Input Voltage(V) 5 5.5 6 Load Transient 0. 40 0. 35 PMOS 0. 30 Output Current 0. 25 0. 20 0. 15 Output Voltage 0. 10 0. 05 0. 00 2.5 3 3.5 4 4.5 Input Voltage(V) 5 5. 5 6 Vin=3.3V,Vo=1.8V,Io=0~1A,f=1kHz Power Analog Microelectronics, Inc www.poweranalog.com 12/2011 Rev1.1 7 PAM2319 Dual High-Efficiency PWM Step-Down DC-DC Coverter Typical Performance Characteristics TA =25 °C ,VO =1.2V, CIN =10µF, CO =10µF, L=1.0µH,unless otherwise noted. Channel 2 Efficiency vs Output Current Output Voltage vs Output Current 100 1.22 1 .2 16 90 1 .2 12 1 .2 08 80 1 .2 04 1.2 70 1 .1 96 60 1 .1 92 V in =3.3V 1 .1 88 Vin=3.3V Vin=4.2V Vin=5V 50 V in =4.2V 1 .1 84 V in =5V 1.18 40 1 10 100 1000 0 10000 50 0 Output Current(mA) Feedback Voltage vs Output Current 1 00 0 Outpu t Cu rre nt(m A) 1 500 200 0 Quiescent Current vs Input Voltage 70 6 15 60 6 10 50 6 05 40 30 6 00 20 5 95 Vin= 3.3V 10 Vin= 4.2V Vin= 5V 0 5 90 0 50 0 1 000 150 0 20 00 2.5 Outp ut C urre nt(mA) R DS(ON) vs Input Voltage 3 3.5 4 4.5 Input Voltage(V) 5 5.5 6 Load Transient 0.14 0.12 0.1 Output Current 0.08 0.06 Output Voltage 0.04 P MOS 0.02 NMOS 0 2.5 3 3.5 4 4.5 5 5.5 6 Vin=3.3V,Vo=1.2V,Io=0~2A,f=1kHz Input Voltage(V) Power Analog Microelectronics, Inc www.poweranalog.com 12/2011 Rev1.1 8 PAM2319 Dual High-Efficiency PWM Step-Down DC-DC Coverter Application Information The basic PAM2319 application circuit is shown on Page 1. External component selection is determined by the load requirement, selecting L first and then Cin and Cout. far exceeds the I RIPPLE (P-P) requirement. The output ripple △Vout is determined by: Inductor Selection W h e r e f = o pe r at i n g fr e q u e n c y, C O U T = ou t p u t capacitance and Δ I L = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since ΔIL increases with input voltage. △Vout =△I L(ESR+1/8fC OUT) For most applications, the value of the inductor will fall in the range of 0.47µH to 2µH. Its value is chosen based on the desired ripple current. Large value inductors lower ripple current and small value inductors result in higher ripple currents. Higher V IN or Vout also increases the ripple current as shown in equation.For channel 1, 1A reasonable starting point for setting ripple current is △ I L = 400mA (40% of 1A) and for channel 2,2A setting ripple current is 800mA. 1 V OUT DIL = VOUT 1(1) (f )(L ) VIN Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Using ceramic capacitors can achieve very low output ripple and small circuit size. The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus,for channel1, a 1.4A rated inductor should be enough for most applications (1A + 400mA); and for channel 2, 2.8A rated inductor sho uld be enough.For the better efficiency, choose a low DC-resis tance inductor. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage charac teristics of all the ceramics for a given value and size. Thermal consideration C IN and C OUT Selection Thermal protection limits power dissipation in the PAM2319. When the junction temperature exceeds 150°C, the OTP (Over Temperature Protection) starts the thermal shutdown and turns the pass transistor off. The pass transistor resumes operation after the junction temperature drops below 120°C. In continuous mode, the source current of the top MOSFET is a square wave of duty cycle Vout/Vin. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: 1 2 VO UT (VIN - VO UT ) C IN required IRMS @ IOMAX VIN For continuous operation, the junction temperature should be maintained below 125°C. The power dissipation is defined as: This formula has a maximum at V IN =2Vout, w h e r e IR MS = IOU T / 2 . T h i s s i m p l e w o r s t - c a s e condition is com monly used for design because even significant deviations do not offer much relief. Note that the capacitor manufacturer's ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Consult the manufac turer if there is any question. The selection of Cout is driven by the required effective series resistance (ESR). PD =IO 2 VO RDSONH + (VIN -VO )RD SONL VIN + (tSW FSIO +IQ )VIN IQ is the step-down converter quiescent current. The term tsw is used to estimate the full load step-down converter switching losses. For the condition where the step-down converter is in dropout at 100% duty cycle, the total device dis sipation reduces to: 2 PD =IO RDSONH +IQ VIN Typically, once the ESR requirement for Cout has been met, the RMS current rating generally Power Analog Microelectronics, Inc www.poweranalog.com 12/2011 Rev1.1 9 PAM2319 Dual High-Efficiency PWM Step-Down DC-DC Coverter Since R DS(ON), quiescent current, and switching losses all vary with input voltage, the total losses should be investigated over the complete input voltage range. The maximum power dissipation de pend s on th e ther ma l r esi sta nc e of IC package, PCB layout, the rate of surrounding airflow and temperature difference between junction and ambient. The maximum power dissipation can be calculated by the following formula: TJ(MAX) -TA PD = θJA In this mode, the device has two states, working state and idle state. First, the device enters into wor k in g s tat e c ont ro ll ed by in ter n al e r ro r amplifier.When the feedback voltage gets higher than internal reference voltage, the device will enter into low I Q idle state with most of internal blocks disabled. The output voltage will be reduced by loading or leakage current. When the feedback voltage gets lower than the internal reference voltage, the convertor will start a working state again. 100% Duty Cycle Operation Where TJ(max) is the maximum allowable junction temperature 125°C.T A is the ambient tempera ture and θJA is the thermal resistance from the junction to the ambient. Based on the standard JEDEC for a two layers thermal test board, the thermal resistance θJA of WDFN3X3 is 60°C/W. The maximum power dissipation at T A = 25°C can be calculated by following formula: As the input voltage approaches the output voltage, the converter turns the P-chan nel transistor continuously on. In this mode the output voltage is equal to the input voltage minus th e voltag e d rop ac ros s the P - c hannel transistor: V OUT = V IN –I LOAD (R dson + R L ) P D =(125°C-25°C)/60°C/W=1.67W Setting the Output Voltage where R dson = P-channel switch ON resistance, I L O A D = O ut pu t c u rr e n t, R L = I nd uc t or DC resistance. The internal reference is 0.6V (Typical). The output voltage is calculated as below: UVLO and Soft-Start R1 VO=0.6×1+ R2 The reference and the circuit remain reset un til the VIN crosses its UVLO threshold. The PAM2319 has an internal soft-start circuit that limits the in-rush current during start-up. This prevents possible voltage drops of the input voltage and eliminates the output voltage overshoot. The output voltage is given by Table 1. Table 1: Resistor selection for output voltage setting Vo R1 R2 1.2V 150k 150k Thermal Shutdown 1.5V 150k 100k 1.8V 300k 150k 2.5V 380k 120k When the die temperature exceeds 150°C, a reset occurs and the reset remains until the temperature decrease to 120°C, at which time the circuit can be restarted. 3.3V 680k 150k Pulse Skipping Mode (PSM) Description When load current decreases, the peak swi tch current in Power-PMOS will be lower than skip current threshold and the device will enter into Pulse Skipping Mode. Power Analog Microelectronics, Inc www.poweranalog.com 12/2011 Rev1.1 10 PAM2319 Dual High-Efficiency PWM Step-Down DC-DC Coverter Short Circuit Protection copper area can't be large in the component side, so we can use multiple vias connect to other side of the PCB. 9. Avoid using vias in the high-current paths. If vias are unavoidable, use multiple vias in parallel to reduce resistance and inductance. Channel 1: The swich peak current is limited cycle-by-cycle to a typical vaule in the event of an output voltage short circuit. The device operates with a frequency of 1MHz and minimum duty clycle. Therefore the average input current is typical 350mA(Vin=3.3V). Channel 2: When the converter output is shorted or the device is overloaded,each high-side MOSFET current-limit event (3A typ) turns off the high-side MOSFET and turns on the low-side MOSFET. A internal counter is used to count the each cur rent-limit event. The counter is reset after consecutive high-side MOSFETs turn on without r ea c hi ng cu r r en t li m it . If th e c u rr e nt -l i mi t condition persists, the counter fills up. The control logic then stops both high-side and lowside MOSFETs and waits for a hiccup period, before attemping a new soft-start sequence. The counter bits is decided by Vfb voltage. If Vfb ≤ 0 .2, the counter is 3-bit counter; if Vfb>0.2 the counter is 6-bit counter. The typical hicuup made duty cycle is 1.7%. The hiccup mode is disable during soft-start time. PCB Layout Check List When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the PAM2319. Check the following in your layout: 1. The input capacitor should be close to IC as close as possible. 2. Minimize the switching loop area to avoid excessive switching noise. 3. Two parts GND should be separately layout to avoid disturbing by each other. 4. Must put a small decoupling capacitor between Vin2 Pin and AGND2 Pin. 5. Vo2 output capacitor should be close to output connector to minimize PCB trace resistance affect on ripple voltage. Recommend use two output capacitor, one close to inductor and IC, another close to output connector. 6. PGND1 Pin should not directly connect to the thermal pad (PGND), it should connect to input capacitor GND then to other GND. 7. AGND should connect to PGND at input capacitor GND. 8. For the good thermal dissipation, PAM2316 has a heat dissipate pad in the bottom side, it should be soldered to PCB surface. For the Power Analog Microelectronics, Inc www.poweranalog.com 12/2011 Rev1.1 11 PAM2319 Dual High-Efficiency PWM Step-Down DC-DC Coverter Ordering Information PAM 2319 X X v 1 v 2 Output Voltage 2 Output Voltage 1 Package Type Pin Configuration Pin Configuration A Type Part Number PAM2319AYAA Output Voltage Package Type v1 Y: WDFN 3x3 A: Adj Marking BNAA XXX YW v2 A: Adj Package Type Standard Package WDFN3x3-12L 3,000 Units/Tape&Reel Power Analog Microelectronics, Inc www.poweranalog.com 12/2011 Rev1.1 12 PAM2319 Dual High-Efficiency PWM Step-Down DC-DC Coverter Outline Dimensions 3x3 mm WDFN 12 2 1 2 1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note :The configuration of the Pin #1 identifier isoptional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 D 2.950 3.050 0.116 0.120 D2 2.300 2.650 0.091 0.104 E 2.950 3.050 0.116 0.120 E2 1.400 1.750 0.055 0.069 e L 0.450 0.350 0.018 0.450 0.014 0.018 Power Analog Microelectronics, Inc www.poweranalog.com 12/2011 Rev1.1 13