PAM PAM8803

PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
Key Features
General Description
n 3W Output at 10% THD with a 4 Ω Load and
5V Power Supply
n Filterless, Low Quiescent Current and Low
EMI
n Low THD+N
n 64-step Digital Volume Control
n Superior Low Noise
n Low pop noise
n Efficiency up to 90%
n Short Circuit Protection
n Thermal Shutdown
n Few External Components to Save Space
and Cost
n Pb-Free Package
The PAM8803 is a 3W, class-D audio amplifier
with 64-step digital volume control. It offers low
THD+N, allowing it to produce high-quality sound
reproduction. The new filterless architecture
allows the device to drive the speaker directly,
without needing low-pass output filters , which will
save 30% system cost and 75% PCB area.
With the same numbers of external components,
the efficiency of the PAM8803 is much better than
class-AB cousins. It can extend the battery life,
ideal for portable applications.
The PAM8803 is available in a SSOP-24 package.
Applications
n
n
n
n
n
LCD Monitors/TV Projectors
Notebook Computers
Portable Speakers
Portable DVD Players, Game Machines
Cellular Phones/Speaker Phones
Typical Application
Efficiency vs Output Power
100
90
VDD
PVDD
C3 10μF
80
7
4
Efficiency(%)
C1
C2 1μF
1μF
18
5
VDD GND PVDD
+OUT_L
2
3
PGND PGND
21
+OUT_R
70
RL=8Ω
RL=4Ω
60
50
40
30
20
10
1
SP_L
C6
8
INL
-OUT_L
INR
INL
0.47μF
10
-OUT_R
VREF
24
17
ON
MUTE
0
0
C7
INR
0.5
1
1.5
2
2.5
3
Output Pow er(W)
0.47μF
PAM8803
UP
14
6 MUTE
DN
Radiated Emissions
S1
C8 1μF
MUTE
SP_R
13
S2
ON
SHDN
SHDN
19 SHDN
NCNCNCNCPVDD
9 11 12 16 20
PGND
22
RST
PGND
23
15
FCC Class B Limit
S3
C4 1μF
PVDD
C5 10μF
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12/2009 Rev 1.4
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PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
Block Diagram
VDD
PVDD PGND
VDD/2
+
-
INR
+OUT_R
DRIVER
-OUT_R
MODULATOR
RST
MUTE
SHDN
Attenuation Decoder
Interface Control
UP
DN
Thermal
Protection
INTERNAL
OSCILLATOR
BIAS
AND
REFERENCES
OSC
Current
Protection
+OUT_L
MODULATOR
INL
VREF
DRIVER
+
-OUT_L
VDD/2
GND
PVDD
PGND
Pin Configuration & Marking Information
Top View
SSOP-24
24 -OUT_R
PAM8803
XXXYWWLL
-OUT_L 1
PGND 2
PGND 3
+OUT_L 4
PVDD 5
MUTE 6
VDD 7
INL 8
NC 9
VREF 10
NC 11
NC 12
23 PGND
22 PGND
21 +OUT_R
20 PVDD
19 SHDN
18 GND
17 INR
X: Internal Code
Y: Year
WW: Week
LL: Internal Code
16 NC
15 RST
14 UP
13 DN
Power Analog Microelectronics , Inc
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12/2009 Rev 1.4
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PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
Pin Descriptions
Pin Number
Pin Name
Description
1
-OUT_L
Left Channel Negative Output
2
PGND
Power GND
3
PGND
Power GND
4
+OUT_L
5
PVDD
Power VDD
6
MUTE
Mute Control Input(active low), pull-up
7
VDD
Analog VDD
8
INL
Left Channel Input
9
NC
No Connect
10
VREF
11
NC
No Connect
12
NC
No Connect
13
DN
Volume down Control (active low)
14
UP
Volume up Control (active low)
15
RST
Volume Controller Reset (active low)
16
NC
No Connect
17
INR
Right Channel Input
18
GND
Analog GND
19
SHDN
Shutdown Control Input(active low), pull-down
20
PVDD
Power VDD
21
+OUT_R
22
PGND
Power GND
23
PGND
Power GND
24
-OUT_R
Left Channel Positive Output
Internal analog reference, connect a bypass capacitor from
VREF to GND
Right Channel Positive Output
Right Channel Negative Output
Absolute Maximum Ratings
These are stress ratings only and functional operation is not implied . Exposure to absolute
maximum ratings for prolonged time periods may affect device reliability . All voltages are with
respect to ground .
Maximum Junction Temperature..................150°C
Storage Temperature.....................-65 °C to 150 °C
Soldering Temperature....................... 300°C, 5sec
Supply Voltage at no Input Signal...................6.0V
Input Voltage.............................-0.3V to V DD +0.3V
Recommended Operating Conditions
Supply voltage Range........................ 2.2V to 5.5V
Ambient Temperature Range...........-40° C to 85 °C
Junction Temperature Range.........-40 °C to 125 °C
Power Analog Microelectronics , Inc
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12/2009 Rev 1.4
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PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
Thermal Information
Parameter
Symbol
Package
Maximum
Unit
Thermal Resistance (Junction to Ambient)
θJA
SSOP-24
96
°C/W
Electrical Characteristic
V DD=5V, Gain = 18dB, R L=8 Ω, T A=25 °C,unless otherwise noted.
PARAMETER
Supply Voltage Range
Quiescent Current
SYMBOL
CONDITIONS
MIN
VDD
IQ
TYP
2.2
No Load
7
RL=8Ω
8
RL=4Ω
8.5
MAX
UNITS
5.5
V
15
mA
Mute Current
IMUTE
VMUTE=0V
2.5
4
mA
Shutdown Current
ISHDN
VSHDN =0V
0.5
10
μA
SHDN Input High
VSH
SHDN Input Low
VSL
MUTE Input High
VMH
MUTE Input Low
VML
Output Offset Voltage
VOS
No Load
RDS (ON)
IDS=0.5A
Drain-Source On-State
Resistance
Output Power
Total Harmonic Distortion Plus
Noise
Power Supply Ripple Rejection
PO
THD+N
PSRR
Channel Separation
CS
Oscillator Frequency
fOSC
Efficiency
η
1.2
0.5
1.2
0.5
f=1kHz
120
300
P MOSFET
0.3
0.40
N MOSFET
0.22
0.35
RL= 8Ω,THD=1%
1.1
1.3
RL= 8Ω,THD=10%
1.5
1.7
RL= 4Ω,THD=1%
1.9
2.1
RL= 4Ω,THD=10%
2.8
3.0
RL=8Ω, P O=0.5W
0.19
RL=8Ω, P O=1.0W
0.22
RL=4Ω, P O=1.0W
0.17
RL=4Ω, P O=2.0W
0.25
V
V
mV
Ω
W
%
No input, f=1kHz, Vpp=200mV
45
55
dB
PO=1W, RL=4Ω
60
80
dB
170
210
PO=1.7W, f=1kHz, RL =8Ω
85
89
%
PO=3.0W, f=1kHz, RL =4Ω
80
83
%
250
kHz
f =22 to 22kHz,
RL=4Ω
85
dB
THD=1%
RL=8Ω
87
dB
UVLO
1.95
V
Over Temperature Protection
OTP
150
°C
Over Temperature Hysteresis
OTH
60
°C
Signal Noise Ratio
SNR
Under Voltage Lock-out
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PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
Typical Operating Characteristics (T =25°C)
A
1. THD+N vs Output Power
R L=4 Ω , Gain = 18dB
30
20
30
V DD=3.6V
V DD=2.5V
10
V DD=2.5V V DD=3.6V
10
5
5
2
2
1
1
%
2. THD+N vs Output Power
R L=8 Ω , Gain = 18dB
%
0.5
0.5
0.2
0.2
0.1
0.1
0.05
0.05
V DD=5V
V DD=5V
0.02
0.02
0.01
10m
20m
50m
100m
200m
500m
1
2
0.01
10m
4
20m
50m
100m
200m
W
3. THD+N vs Output Power
V DD=5V, R L=4 Ω , Gain = 18dB
%
100
50
50
20
20
10
10
5
5
2
f=1kHz
1
%
0.5
0.2
0.2
0.1
0.1
0.05
0.05
f=10kHz
f=100Hz
0.02
50m
100m
200m
500m
1
2
f=100Hz
1
0.5
0.01
20m
f=10kHz
0.01
20m
4
50m
100m
200m
500m
1
2
4
W
6. THD+N vs Frequency
V DD=5V, R L=8 Ω , Gain = 18dB
100
100
50
50
20
20
10
10
5
5
2
Po=2W
1
%
0.5
0.2
0.2
0.1
0.1
Po=1.5W
Po=2W
0.05
Po=1W
1
0.5
Po=0.5W
Po=2W
0.05
0.02
0.02
0.01
20
4
0.02
5. THD+N vs Frequency
V DD=5V, R L=4 Ω , Gain = 18dB
%
2
f=1kHz
W
2
1
4. THD+N vs Output Power
V DD=5V, R L=8 Ω , Gain = 18dB
100
2
500m
W
50
100
200
500
1k
2k
5k
10k
0.01
20
20k
Hz
50
100
200
500
1k
2k
5k
10k
20k
Hz
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PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
Typical Operating Characteristics (continued)
7. THD+N vs. Frequency
Po=0.8W,R L=4 Ω, Gain=18dB
8. THD+N vs. Frequency
Po=0.1W,R L=8 Ω, Gain=18dB
100
100
50
50
20
20
10
10
5
5
2
2
%
V DD=3.3V
1
%
1
0.5
0.5
0.2
0.2
0.1
0.1
0.05
0.05
V DD=5V
V DD=3.3V
V DD=5V
0.02
0.02
0.01
20
0.01
20
50
100
200
500
1k
2k
5k
10k
20k
50
100
200
500
Hz
1k
2k
5k
10k
20k
Hz
10. Power Supply Ripple Rejection VS Frequency
V DD=5V with 200mVpp Ripple
9. Frequency response
V DD=5V, Gain =18dB
+20
+35
+10
+30
+0
-10
+25
d
B
r
d
B
+20
-20
-30
-40
-50
+15
-60
20
50
100
200
500
1k
2k
5k
-70
10
10k 20k
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Hz
Hz
11. FFT of Noise Output
V DD=5V, Gain = 18dB
+0
-40
12.Channel Separation
V DD=5V, R L=4 Ω , P O=1.0W,Gain = 18dB
-10
-20
-50
-30
-40
-60
-50
-60
d
B
V
-70
-70
d
B
-80
-80
-90
-100
R to L
-90
-110
-120
L to R
-100
-130
-140
-150
20
50
100
200
500
1k
2k
5k
10k
-110
20
20k
Hz
50
100
200
500
1k
2k
5k
10k
20k
Hz
Power Analog Microelectronics , Inc
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12/2009 Rev 1.4
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PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
Typical Operating Characteristics (continued)
13. Output Power vs Power Supply
R L=4 Ω
14. Output Power vs Power Supply
R L=8 Ω
2.5
4
Output Power (W)
Output Power(W)
3.5
3
2.5
10%ΤΗD
2
1.5
1%ΤΗD
1
2
1.5
10%ΤΗD
1
1%ΤΗD
0.5
0.5
0
0
2
3
4
5
2
6
3
DD
5
6
Supply Voltage (V)
Supply Voltage (V)
Gain Setting (V
4
=5V)
Step
Gain (dB)
Step
Gain (dB)
Step
Gain (dB)
Step
Gain (dB)
1
-75.0
17
4.8
33
11.2
49
17.6
2
-39.7
18
5.1
34
11.6
50
18.0
3
-34.0
19
5.5
35
12.0
51
18.4
4
-28.2
20
5.9
36
12.3
52
18.8
5
-22.4
21
6.3
37
12.7
53
19.2
6
-16.5
22
6.7
38
13.2
54
19.6
7
-10.5
23
7.1
39
13.6
55
20.0
8
-8.0
24
7.5
40
14.0
56
20.4
9
-5.5
25
7.9
41
14.4
57
20.9
10
-2.9
26
8.3
42
14.8
58
21.3
11
-0.4
27
8.7
43
15.2
59
21.7
12
1.1
28
9.1
44
15.6
60
22.1
13
2.6*
29
9.6
45
16.0
61
22.5
14
3.6
30
10.0
46
16.4
62
22.9
15
4.0
31
10.4
47
16.8
63
23.4
16
4.4
32
10.7
48
17.2
64
23.8
*Power on gain or gain after reset.
Note: Gain could have 1dB deviation device to device.
Power Analog Microelectronics , Inc
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12/2009 Rev 1.4
7
PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
we should notice that if the battery cell is 4 new
dry batteries or alkaline batteries, even the
voltage will be over 6V, it still can work safety.
Since the output voltage of the 4 pack of new dry
batteries will be reduced very quickly after turn
on due to the internal resistance of the battery.
There is no dangerous of damaging the chip
when playing music or speech, even use 4 new
dry batteries.
To reduce the effect of the
increasing of internal resistance of battery after
long term discharging, it is recommended to
connect a 1000uF electrolytic capacitor between
the power supply and the ground.
Application Notice
1. When PAM8803 works without filter, we must
connect the speaker before turn on. Else, it will
be easy to damage the chip.
2. When PAM8803 works without filter, it will
be best that adding a ferrite chip bead at the
outgoing line of speaker in order to suppress
possible electromagnetic interference .
3. The absolute maximum rating of operation
voltage is 6.0V. While using 6V power regulator,
even the chip can deliver 4W sine wave with a 4
Ohm speaker, it is not recommended for long
term using due to the heat dissipation. But if the
input signal is a music signal, then it can work in
long term since the average power output is
much less than 4W. When using dry battery cell,
4. Because digital volume control has big gain,
we can not make input signal too high to cause
the clipping of the output signal when increase
volume, also it may damage the chip.
Test Setup for Performance Testing
PAM8803 Demo Board
Load
+OUT
AP System One
Generator
AP
Low Pass
Input
Filter
GND
AP System One
Analyzer
AUX-0025
-OUT
VDD
Power Supply
Notes
1. The AP AUX-0025 low pass filter is necessary for every class-D amplifier measurement
done by AP analyzer.
2. Two 22 μ H inductors are used in series with load resistor to emulate the small speaker for
efficiency and quiescent current measurement.
Power Analog Microelectronics , Inc
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12/2009 Rev 1.4
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PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
Application Information
Maximum Gain
There are 64 discrete gain settings ranging from
+24dB maximum to -75dB minimum. Upon device
power on or applied a logic low to the RST pin,
the amplifier's gain is set to a default value of
2.6dB. However, when coming out of mute mode,
the PAM8803 will revert back to its previous gain
setting. Volume levels for each step vary and are
specified in Gain Setting table on page 7.
As shown in block diagram(page 2),the PAM8803
has two internal amplifiers stage. The first
stage's gain is externally con figurable, while the
second stage's is internally fixed in a fixed-gain,
inverting configuration. The closed-loop gain of
the first stage is set by selecting the ratio of R f to
R i while the second stage's gain is fixed at 2x.
Consequently, the differential gain for the IC is
If both the UP and DN pins are held high, no
volume change will occur. Trigger points for the
UP and DN pins are at 70% of V DD minimum for a
logic high, and 20% of V DD maximum for a logic
low. It is recommended, however, to toggle UP
a n d D N b e t w e e n V DD a n d G N D f o r b e s t
performance.
A VD=20*log [2*(R f/R i)]
The PAM8803 sets maximum R f=218k Ω and
minimum R i=27k Ω , thus the maximum closedgain is 24dB.
Digital Volume Control (DVC)
UP/DN
The PAM8803 features a digital volume control
which consists of the UP, DN and RST pins. An
internal clock is used where the clock frequency
value is determined from the following formula:
f CLK = f OSC / 2
VOLUME
LEVEL
3.5 cycles
9.5 cycles
2 cycles
2 cycles
Figure 1.Timming Diagram
Mute Operation
13
The MUTE pin is an input for controlling the
output state of the PAM8803. A logic low on this
pin disables the outputs, and a logic high on this
pin enables the outputs. This pin may be used as
a quick disable or enable of the outputs without a
volume fade. Quiescent current is listed in the
electrical characteristic table. The MUTE pin can
be left floating due to the pull-up internal.
The oscillator frequency f OSC value is 200kHz
typical,with ±20% tolerance.The DVC’s clock
frequency is 33Hz (cycle time 30ms ) typical.
Volume changes are then effected by toggling
either the UP or DN pins with a logic low. After a
period of 3.5 clocks pulses with either the UP or
DN pins held low, the volume will change to the
next specified step, either UP or DN, and
followed by a short delay. This delay decreases
the longer the line is held low, eventually
reaching a delay of zero. The delay allows the
user to pull the UP or DN terminal low once for
one volume change, or hold down to ramp
several volume changes. The delay is optimally
configured for push button volume control.
Shutdown operation
In order to reduce power consumption while not
in use, the PAM8803 contains shutdown circuitry
that is used to turn off the amplifier's bias
circuitry. This shutdown feature turns the
amplifier off when logic low is placed on the
SHDN pin. By switching the SHDN pin connected
to GND, the PAM8803 supply current draw will be
minimized in idle mode. The SHDN pin cannot be
left floating due to the pull-down internal.
If either the UP or DN pin remains low after the
first volume transition the volume will change
again, but this time after 9.5 clock pulses. The
followed transition occurs at 2 clock pulses for
each volume transition. This is intended to
provide the user with a volume control that
pauses briefly after initial application, and then
slowly increases the rate of volume change as it
is continuously applied. This cycle is shown in
the timing diagram shown in figure 1.
Power Analog Microelectronics , Inc
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12/2009 Rev 1.4
9
PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
function is to reduce noise produced by the
power supply caused by coupling into the output
drive signal. This noise is from the internal
analog reference to the amplifier, which appears
as degraded PSRR and THD+N.
Power supply decoupling
The PAM8803 is a high performance CMOS
audio amplifier that requires adequate power
supply decoupling to ensure the output THD and
PSRR are as low as possible. Power supply
decoupling is affecting low frequency response.
Optimum decoupling is achieved by using two
capacitors of different types that target different
types of noise on the power supply leads. For
higher frequency transients, spikes, or digital
hash on the line, a good low equivalent-seriesresistance (ESR) ceramic capacitor, typically
1.0μF, placed as close as possible to the device
V DD terminal works best. For filtering lowerfrequency noise signals, a larger capacitor of
10μF (ceramic) or greater placed near the audio
power amplifier is recommended.
Bypass capacitor (C BYP) values of 0.47μF to
1.0μF ceramic is recommended for the best THD
and noise performance. Increasing the bypass
capacitor reduces clicking and popping noise
from power on/off and entering and leaving
shutdown.
Under Voltage Lock-out (UVLO)
The PAM8803 incorporates circuitry designed to
detect when the supply voltage is low. When the
supply voltage drops to 1.85V or below, the
PAM8803 outputs are disable, and the device
comes out of this state and starts to normal
functional when the supply voltage increases.
Input Capacitor (C i)
Large input capacitors are both expensive and
space hungry for portable designs. Clearly, a
certain sized capacitor is needed to couple in low
frequencies without severe attenu ation. But in
many cases the speakers used in portable
systems, whether internal or external, have little
ability to reproduce signals below 100Hz to
150Hz. Thus, using a large input capacitor may
not increase actual system perfor mance. In this
case, input capacitor (C i) and input resistance
(R i) of the amplifier form a high-pass filter with
the corner frequency determined equation below,
Short Circuit Protection (SCP)
The PAM8803 has short circuit protection
circuitry on the outputs that prevents damage to
the device during output-to-output and outputto-GND short. When a short circuit is detected on
the outputs, the outputs are disable immediately.
If the short was removed, the device activates
again.
Over Temperature Protection
1
2πRiCi
In addition to system cost and size, click and pop
perfor mance is affected by the size of the input
coupling capacitor, C i. A larger input coupling
capacitor requires more charge to reach its
quiescent DC voltage (nominally 1/2 V DD). This
charge comes from the internal circuit via the
feedback and is apt to create pops upon device
enable. Thus, by minimizing the capacitor size
based on necessary low frequency response,
turn-on pops can be minimized.
Thermal protection on the PAM8803 prevents
damage to the device when the internal die
temperature exceeds 150°C. There is a 15
degree tolerance on this trip point from device to
device. Once the die temperature exceeds the
thermal set point, the device outputs are
disabled. This is not a latched fault. The thermal
fault is cleared once the temperature of the die is
reduced by 60°C. This large hysteresis will
prevent motor boating sound well and the device
begins normal operation at this point with no
external system interaction.
fC=
How to Reduce EMI (Electro Magnetic
Interference)
Analog Reference Bypass Capacitor (C BYP)
A simple solution is to put an additional capacitor
1000uF at power supply terminal for power line
coupling if the traces from amplifier to speakers
are short (<20cm).
The Analog Reference Bypass Capacitor (C BYP) is
the most critical capacitor and serves several
important functions. During start-up or recovery
from shutdown mode, C BYP determines the rate at
which the amplifier starts up. The second
Power Analog Microelectronics , Inc
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PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
Most applications require a ferrite bead filter
which shows at Figure 3. The ferrite filter
reduces EMI around 1 MHz and higher. When
selecting a ferrite bead, choose one with high
impedance at high frequencies, but low
impedance at low frequencies.
channel specific. A two channels amplifier has
two mutually exclusive channels and
consequently must have two mutually exclusive
output noise ground traces. The layout of the
PAM8803 offers separate PGND connections for
each channel and in some cases each side of the
bridge. Output noise grounds must tie to system
ground at the power in exclusively. Signal
currents for the inputs, reference, etc need to be
returned to quite ground. This ground only ties to
the signal components and the GND pin. GND
then ties to system ground.
Ferrite Bead
OUT+
220pF
Ferrite Bead
OUT-
Power Supply Line
220pF
As same to the ground, VDD and each channel
PVDD need to be separated and tied together at
the system power supply. Recommend that all
the trace could be routed as short and thick as
possible. For the power line layout, just imagine
water stream, any barricade placed in the trace
(shows in figure 4) could result in the bad
performance of the amplifier.
Figure 3: Ferrite Bead Filter to reduce EMI
PCB Layout Guidelines
Grounding
At this stage it is paramount that we
acknowledge the need for separate grounds.
Noise currents in the output power stage need to
be returned to output noise ground and nowhere
else. Were these currents to circulate elsewhere,
they may get into the power supply, the signal
ground, etc, worse yet, they may form a loop and
radiate noise. Any of these instances results in
degraded amplifier performance. The logical
returns for the output noise currents associated
with Class D switching are the respective PGND
pins for each channel. The switch state diagram
illustrates that PGND is instrumental in nearly
every switch state. This is the perfect point to
which the output noise ground trace should
return. Also note that output noise ground is
Figure 4
Components Placement
The power supply decoupling capacitors need to
be placed as close to VDD and PVDD pins as
possible. The inputs need to be routed away from
the noisy trace. The VREF bypass capacitor also
needs to be close to the pin of IC very much.
PCB Top Layer
PCB Bottom Layer
Figure 5: Layout Example
Power Analog Microelectronics , Inc
www.poweranalog.com
12/2009 Rev 1.4
11
PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
Ordering Information
PAM8803 X X X
Shipping Package
Number of Pins
Package Type
Part Number
PAM8803NHR
Marking
PAM8803
XXXYWWLL
Package Type
Shipping Package
SSOP-24
2,500 Units/Tape & Reel
Power Analog Microelectronics , Inc
www.poweranalog.com
12/2009 Rev 1.4
12
PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
Outline Dimension
SSOP-24
Power Analog Microelectronics , Inc
www.poweranalog.com
12/2009 Rev 1.4
13