YAMAHA YDA131

YDA131
D- 1
STEREO 2.5W DIGITAL AUDIO POWER AMPLIFIER
■Outline
The YDA131 is the high efficient digital audio power amplifier IC that operates on a single 5V power supply.
This IC is capable of providing output power of 2.5W/channel, which is at the highest level as a device on a single 5V
power supply. By adopting Yamaha's proprietary modulation system, the device provides low distortion and high signal
to noise ratio at the highest level among digital amplifiers in the equivalent class.
This IC accepts analog signal, converts it into digital pulse by the digital modulation circuitry and outputs the signal from
the large current capacity buffers. The digital pulse signal that is outputted from the output buffer is converted into audio
signal through an external low pass filter, and sent to the speakers.
This IC has the overcurrent detection function that detects short-circuiting of speaker terminal end and the high
temperature detection function that detects abnormal high temperature.
With the overcurrent detection function, this IC generates a warning signal when the current that flows in the output
buffers of left and right channels exceeds a fixed value. With the high temperature detection function, this IC generates a
warning signal when the junction temperature becomes abnormal.
Furthermore, this IC builds in function that mute an audio output and shut off all functions of the IC. By this function,
power consumption is restrained at the minimum.
■Features
・High output power
2.5 W @ VDD=5.0V, 4Ω (THD+N<10%)
・High efficiency operation
85 % @ VDD=5.0V, RL=8Ω
75 % @ VDD=5.0V, RL=4Ω
・Low distortion(THD+N)
0.018 % @ Po=1.0W, 1kHz, RL=4Ω
・High signal to noise ratio
103dB @ VDD=5.0V, Input sensitivity =1.0V, RL=4Ω
97dB @ VDD=5.0V, Input sensitivity=150mV, RL=4Ω
・Low consumption current
14.0 mA @ VDD=5.0V, no signal(no filter)
7.0 mA @ VDD=5.0V, at mute
1 µA
@ VDD=5.0V, at sleep
・Channel separation
80dB @ 1kHz
・Any gain setting by external resistor
・Any setting of starting time by VREF capacitor
・Sleep function by SLEEP terminal
・Output mute function by MUTE terminal
・Over current detection function of speaker terminal end (Ground short-circuiting, Load short-circuiting)
・High temperature detection function
・Pop noise suppression function at turn-on and turn-off
・Analog input/BTL(Bridge-Tied Load)output
・24-pin plastic SSOP
Pin lead plating with Pd free (YDA13１-EZ)
YDA131 CATALOG
CATALOG No.:LSI-4DA131A40
2004.12
YDA131
■Terminal configuration
■Terminal function
No.
Name
1
VPL
2
INL
3
VREFL
4
VSSL
5
VDDL
6
VSS
7
PROT
8
VDDR
9
VSSR
10 VREFR
11 INR
12 VPR
13 MUTE
14 VSSPR
15 VDDPR
16 OUTMR
17 VSSPR
18 OUTPR
19 OUTPL
20 VSSPL
21 OUTML
22 VDDPL
23 VSSPL
24 SLEEP
Note. A: Analog terminal
2
I/O
AO
AI
AO
O
AO
AI
AO
I
O
O
O
O
I
Function
Lch gain control
Lch audio input
Lch voltage reference
VSS for analog circuit of Lch
VDD for analog circuit of Lch
VSS for control circuit and protection circuit
Warning output for protection function
VDD for analog circuit of Rch
VSS for analog circuit of Rch
Rch voltage reference
Rch audio input
Rch gain control
Output shut off control
VSS for output buffer of Rch
VDD for output buffer of Rch
Negative output of Rch
VSS for output buffer of Rch
Positive output of Rch
Positive output of Lch
VSS for output buffer of Lch
Negative output of Lch
VDD for output buffer of Lch
VSS for output buffer of Lch
Operation shut off control
YDA131
■Internal block diagram
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YDA131
■Description of terminal functions
VDDPL, VSSPL, VDDPR, VSSPR (Pin No.22, 20&23, 15, 14&17)
These are the power supply and ground terminals for the output buffers.
VDDPL and VSSPL are the power supply and ground terminals for the left channel, and VDDPR and VSSPR are the power
supply and ground terminals for the right channel.
There are two VSSPL terminals and two VSSPR terminals, both of which are to be connected with similar impedance
(length of patterns on the printed circuit board).
OUTPL, OUTML, OUTPR, OUTMR (Pin No.19, 21, 18, 16) [Digital-OUT]
These are the output buffer terminals and output digital pulse signal that has been modulated by PWM system.
OUTPL and OUTML are the output buffer terminals for the left channel, OUTPL is the positive terminal and OUTML is
the negative terminal.
OUTPR and OUTMR are the output buffer terminals for the right channel, OUTPR is the positive terminal and OUTMR is
the negative terminal.
Since both channels are BTL (Bridge-Tied Load) output, the minus terminal is not at the ground potential.
Connect the IC with the speakers through an LC filter as shown in the "Application circuit" for the purpose of removing the
carrier frequency signal.
VDDL, VSSL, VDDR, VSSR (Pin No.5, 4, 8, 9)
These are the power supply and ground terminals for the circuitries other than the output buffers.
VDDL and VSSL are the power supply and ground terminals for the left channel circuit.
VDDR and VSSR are the power supply and ground terminals for the right channel circuit.
VSS (Pin No.6)
This is the ground terminal for the protection circuitry and the control circuitry.
Connect VSS to the left-channel analog ground near the terminal.
INL, VPL, INR, VPR (Pin No.2, 1, 11, 12) [Analog]
These are the audio signal input and gain adjustment terminals.
INL and VPL are the audio signal input and gain adjustment terminals for the left channel.
INR and VPR are the audio signal input and gain adjustment terminals for the right channel.
The terminals are connected respectively to the inversion input and output of the first stage inversion operational amplifiers.
The amplifier gain is set by connecting an input resistor and a feedback resistor to both terminals as shown the "Application
circuit". The use of this inversion operational amplifier allows making a simple filter.
For the details, refer to "Gain setting" on page 6.
VREFL, VREFR (Pin No.3, 10) [Analog]
These are reference voltage output terminals.
VREFL is the reference voltage output terminal for the left channel, and VREFR is the reference voltage output terminal for
the right channel. Connect the same capacitors to these terminals. The starting time is set by changing the capacitance
connected to VREFL and VREFR terminals.
For the details, refer to "Pop noise reduction function" on page 9.
SLEEP (Pin No.24) [Digital-IN]
This is the operation shut off control terminal.
The terminal controls both channels at the same time. When SLEEP terminal is set at "H" level, all of the internal circuits
are placed in the shut off state, output is placed in the muted state, and the IC is placed in the sleep state.
At this time the power consumption is minimized, and warning signal (PROT terminal output) is set at "L" level.
When SLEEP terminal is set at "L" level, this IC goes into normal operation after sufficient time (starting time) to make
each reference voltage reaches a fixed potential.
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YDA131
MUTE (Pin No.13) [Digital-IN]
This is the output shut-off control terminal.
The terminal controls both channels at the same time. When MUTE terminal is set at "H" level, all of the output buffer
terminals, OUTPL, OUTML, OUTPR and OUTMR output "L" level, and this IC changes in mute state.
When MUTE terminal is set at "L" level, all of the output buffer terminals, OUTPL, OUTML, OUTPR and OUTMR output
the digital pulse signal.
PROT (Pin No.7) [Digital-OUT]
This is the warning signal output terminal for both overcurrent detection and high temperature detection. PROT terminal
outputs "H" level when either of those detection circuitries detects a hazardous state.
For the method of controlling MUTE terminal and SLEEP terminal by using PROT terminal, refer to "Overcurrent
detection function and high temperature detection function" on page 7.
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YDA131
■Description of operation functions
Refer to "Connection circuit example" on page 11, when reading the following descriptions.
●Gain setting
This IC consists of the first stage inversion operational amplifier, and the fixed-gain digital power amplifier.
The gain of the digital power amplifier is fixed at 8 dB.
The gain of the first stage inversion operational amplifier is set with the resistance values of the input resistor (RI) and
feedback resistor (RF) as described by "Formula 1". To reduce pop noise, it is necessary to observe the restrictions
described in "Pop noise reduction function" on page 9. Use the feedback resistor (RF) of 10kΩ or higher, because the
driving capability of the operational amplifier is limited.
In "Application circuit", input resistor (RI)=7.5kΩ and feedback resistor (RF)=47kΩ and the gain of the first stage inversion
operational amplifier is set at 16 dB, as described in "Figure 1: First stage inversion operational amplifier input circuit
example". Therefore, the total gain at this case is given as described below.
8dB (fixed gain of the digital power amplifier) + 16dB (gain of the first stage inversion operational amplifier) = 24dB
In the "Application circuit", low pass filter capacitor (CF) is added to limit the band width of the input signal, as described
in "Figure 1: First stage inversion operational amplifier input circuit example", whereby the value can be adjusted as
necessary. To limit the input DC current, DC cutting capacitor (CI) is added, whereby this capacitor and input resistor (RI)
constitute a high pass filter.
The cut off frequency fc of this high pass filter is set as necessary, and can be decided by "Formula 2".
Formula 1: Gain of first stage inversion operational amplifier Av(dB) = 20*log(RF/RI)
Formula 2:Cut off frequency fc(Hz) = 1/(2*π*RI*CI)
When low band boost function is needed due to a reason such as small diameter speaker, the low boost function can be
realized by making the circuit of the first stage operational amplifier as shown in "Figure 2: Low band boost circuit
example". For this circuit, the gain is increased by +3dB at the frequency fb of "Formula 3", and the low band boost
quantity Ab is decided by "Formula 4". At this time, the frequency characteristic is as shown in "Figure 3: Frequency
characteristic at low band boost".
Formula 3: Frequency at which the gain increased by +3dB fb(Hz) = 1/(2*π*RF*CB)
Formula 4: Boost quantity Ab(dB) = 20*log((RF+RB)/RF)
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YDA131
●Mute function
When MUTE terminal is set at "H" level, all of the output buffer terminals, OUTPL, OUTML, OUTPR and OUTMR,
output "L" level, and this IC changes into mute state. When MUTE terminal is set at "L" level, all of the output buffer
terminals, OUTPL, OUTML, OUTPR and OUTMR, output digital pulse signal.
This IC includes a pop noise reduction function circuitry in both cases the mute control is enabled and disabled.
In the mute mode, the overcurrent detecting function is disabled. However, all the output buffers outputting "L" level, the
electric current is at a safe level even if the buffer terminals are short-circuited.
●Sleep function
When SLEEP terminal is set at "H" level, all of the internal circuitries are placed in the shut-off state, output is placed in the
mute state, and this IC is placed in the sleep state. In this state, the power consumption is minimized, overcurrent detection
function and high temperature detection function are disabled, and warning signal (PROT terminal output) is set at "L"
level.
When SLEEP terminal is set at "L" level, this IC goes into normal operation state after sufficient time (starting time) to
make each reference voltage reaches an established potential.
This IC includes a pop noise reduction function in both cases the sleep control is enabled and disabled.
●Overcurrent detection function and high temperature detection function
This IC includes the output buffer overcurrent detection function and high temperature detection function. When either
detection circuit detects an abnormality, warning signal (PROT terminal ) output is set at "H" level.
・Overcurrent detection function
When either of four speakers terminal end (between LC filter and speaker) short-circuits with VSS terminal or reverse
polarity speaker terminal end, this IC determines that the overcurrent state has occurred and outputs warning signal
(PROT terminal ="H" level).
When a warning is signaled, MUTE terminal or SLEEP terminal should be controlled externally to place this IC in the
muted state or sleep state immediately to protect this IC.
And it does not cope with over current protection that short-circuiting of output terminals (OUTPL, OUTML, OUTPR,
OUTMR) and VSS terminal, and short-circuiting between each output terminal.
When the warning signal (PROT terminal ="H" level) is outputted due to overcurrent detection, this IC keeps the
warning signal output after the current return to normal state.
The warning signal is cancelled by changing the state of SLEEP terminal as "L" level, "H" level and "L" level in this
order or by turning on the power supply again.
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YDA131
When this IC is used with application that speaker terminal is likely to short-circuit during operation, use the following
over current detection and protection circuit.
(1) Connecting PROT terminal output to MUTE terminal.
When an overcurrent is detected, the output goes into mute state. In this case, warning signal output and mute state
cannot be cancelled unless otherwise the power supply is turned on again or the state of SLEEP terminal is changed
as "L" level, "H" level and "L" level in this order.
(2) Attaching a fall delay circuit to PROT terminal, and connecting it to SLEEP terminal.
For the connection, refer to "Figure 4: PROT terminal output connection circuit example" in the following
"Restrictions" section.
When overcurrent is detected, this IC goes into sleep state, and the output goes into mute state, and warning signal
output is cancelled. The sleep state is cancelled after the elapse of the fall delay time, and return to normal operation.
If the overcurrent state remains even after the restart, the sleep and start are repeated.
(3) If the current capacity of used power supply exceeds 1.5A, connect shottkey-diode between output terminals (OUTPL,
OUTML, OUTPR, OUTMR) and VSS, and connect between PROT and MUTE terminal or SLEEP terminal as (1),
(2).
・High temperature detection function
When this IC operates with its internal temperature exceeding the maximum rating (junction temperature), it determines
itself as a high temperature state, and outputs the warning signal (PROT terminal ="H" level).
When a warning is signaled, MUTE terminal or SLEEP terminal should be controlled externally to place this IC in muted
state or sleep state immediately to protect this IC. If the internal overheating is due to the overload output, the temperature
rise is avoided by aforesaid control.
When the warning signal is generated due to the high temperature detection, and then, the temperature is reduced
sufficiently by the protection action with the control of MUTE terminal or SLEEP terminal, this IC cancels the warning
signal. The warning signal is also cancelled by setting the state of SLEEP terminal at "L" level or by turning on the power
supply again.
The control through the use of PROT terminal, MUTE terminal or SLEEP terminal is made also for the case of high
temperature detection like the case of the overcurrent detection.
In case of high temperature detection, this IC cancels the warning signal if the temperature is reduced sufficiently.
Thus, this IC can return to the normal operation even if PROT terminal and MUTE terminal are connected.
・Restrictions
A pulse as short as about 1µs may be outputted from PROT terminal when the power supply is turned on or the state of
SLEEP terminal is changed from "H" level to "L" level.
When this IC is controlled using SLEEP terminal and PROT terminal, connect an LPF (low pass filter) that can cut pulse
about 10µs to PROT terminal.
"Figure 4: PROT terminal output connection circuit example" is the connection circuit example for the case LPF (low pass
filter) and fall delay circuit are attached to PROT terminal and connected to SLEEP terminal.
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YDA131
●Pop noise reduction function
This IC includes pop noise reduction function that works when turning on and shutting off the power supply, and
controlling the mute or sleep functions.
・When turn on the power supply
This IC is in mute state immediately after turning on the power supply.
The starting process is performed at the power on (sleep cancellation), and after the internal operation stabilizes, the mute
state is cancelled. This operation minimizes the generation of pop noise at turning on the power supply.
To make this function operate effectively, it is necessary to use the input resistor "RI" of the first stage inversion
operational amplifier, the input AC coupling capacitor "CI" of the first stage inversion operational amplifier, and
reference voltage stabilizing capacitor "CR1" under the following condition.
These values must be same for both channels.
Condition: CR1 > (RI * CI)/5000
To make the pop noise reduction function operate effectively when turning on the power supply, the capacitors (CR1) of
VREFL and VREFR terminals must be discharged sufficiently before turning on the power supply again. If you turn on
the power supply again without discharged sufficiently these capacitors, this function does not operate effectively, and
there is a possibility that pop noise generates.
・Starting time
Starting time is a period for each reference voltage to reach the specified potential (for charging capacitors (CR1) of
VREFL and VREFR terminals) when the power supply is turned on or is turned on again. This period varies in relation to
the capacitance (CR1) of VREFL and VREFR terminals.
The table of starting time is as follows:
Table: Starting time
CR1capacitor(µF)
Starting time (sec)
2
10
30
50
0.13
0.33
0.85
1.40
・When shutting off the power supply
This IC performs muting processing internally when the power supply voltage has changed by more than10% in a very
short period or when the power supply voltage is reduced below 3.0V to reduce the pop noise when the IC is shut off.
To make this function operate efficiently, it is necessary to fall the power voltage quickly when shutting off the power
supply.
When the power is supplied to the IC through a voltage regulator and a large capacitance is connected after the regulator,
such as the case shown in "Figure 5: Power supply fall acceleration circuit example", the voltage of VDD can be reduced
quicker if a diode is connected to it.
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YDA131
If power supply voltage changes exceeding 10% in a very short period, this IC may go into mute state internally due to
the pop moise reduction function described before. Therefore, it is recommended to use this IC in normal operation so
that the change of power supply voltage in a very short period wouldn't exceed 10%.
This IC may also go into mute state internally when the power supply voltage is reduced temporarily below 3.0V.
Therefore, it is recommended to use this IC in normal operation so that the power supply voltage wouldn't fall below
3.0V.
●Power consumption
This IC is capable of outputting up to 5W in total, or 2.5W per one channel. Digital amplifiers can be used without heat sink
because their operation efficiency is higher than conventional linear amplifiers.
When using this IC, ensure that the power consumption does not exceed the maximum allowable loss that is defined as the
absolute maximum rating.
The power consumption of this device can be obtained by using "Formula 5".
In the following formula, PD represents the power consumption, Po represents average output power, RL represents the
output load impedance, and Pic represents the internal control circuit loss.
Formula 5: PD(W) = Po(W) * 1.05 / RL(Ω) + Pic(W)
Pic = 0.09W (VDD=5.0V)
Pic = 0.04W (VDD=3.3V)
The maximum allowable loss PDmax is obtained by using "Formula 6" based on the absolute maximum rating of the
junction temperature of this IC.
In the following formula, Tjmax represents the absolute maximum rating of the junction temperature, θja represents thermal
resistance of SSOP24 package, and Ta represents the ambient temperature.
Formula 6: PDmax(W) = (Tjmax(°C) - Ta(°C)) / θja
θja = 96.7°C/W
Tjmax = 125°C
For example, when VDD=5.0V, output load=4Ω, and 2.5W * 2ch is outputted continuously, the maximum allowable loss is
exceeded. However, this IC can deal with reproduction of normal music signal sources sufficiently because it is believed to
be sufficient that average output power of the normal music signal sources is estimated at 1/8 of the maximum output.
●Load impedance and filter constant
The speaker that is connected to this IC is to have the load impedance (RL) of 4Ω or higher.
Typical filter constants for load impedance (RL) when the cut-off frequency is set at 50kHz are as shown in the following
table.
Table: Filter constant example
L
Load impedance RL
4Ω
10μH
8Ω
22μH
16Ω
39μH
10
C
1μF
0.47μF
0.27μF
YDA131
■Application circuit
Outline of components that are connected externally to this IC.
CP1, CP3
Capacitors for stabilization of the power supply
CP2, CP4, RP2, RP4
Capacitors and resistors for stabilization of the power supply (snubber)
CR1
Capacitor for stabilization of reference voltage, and capacitor for stabilization of starting.
CI
Input AC coupling capacitor: RI and CI form a high pass filter.
RI
Inversion input resistor that determines the gain.
RF
Feedback resistor for determining the gain.
CF
Capacitor for input low pass filter.
Output inductance: Being combined with CO, the component forms the secondary filter that
LO
removes the high frequency and delivers an amplified audio signal to the load.
CO
Output capacitor
DS
Shottkey-diode for terminal protection (equivalent to 11EQS04)
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YDA131
■Application notes
Warning for the device which makes sound using speaker.
A speaker radiates heat in a voice-coil by air flow accompanying vibration of a diaphragm. When DC signal
(several Hz or less) is input, heat radiation characteristics falls rapidly.
In addition, even if it is used lower than rated input, it may lead to voice-coil burnout, smoke or ignition of a speaker.
In order to avoid such situations, be sure to implement one or more preventive measures from the following.
1) Do not select settings (sound creation, sound generation stop with DC offset) which may generate DC signal.
(Since thoroughness of this preventive measure is generally difficult, we recommend the combined use with
the following 2, 3 and 4)
2) Add the equivalent of DC cut digital filter for cutting DC signal in the digital section.
(As long as "Built-in" is not mentioned in the manual, there is no such built-in circuit inside of a device).
3) Add a DC cut capacitor for cutting DC signal in the analog section.
(When addition is specified in the example of a recommended circuit diagram, be sure to add)
4) When a latter stage device exists in the signal path from this device to speaker, be sure to realize the DC cut in a latter
stage device.
In addition, the above-mentioned measures are based on the assumption that the device itself, DC cut capacitor, and the
latter stage device will be in a normal operation. Therefore, it is also necessary to implement measures based on the
assumption of these part failures.
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YDA131
■Electrical characteristics
1. Absolute maximum rating
Item
Symbol
Rating
Unit
V
VDD terminal power supply voltage *1
VDD
VSS -0.5～VSS +6.0
V
Digital input terminal voltage
VDIN
VSS -0.5～VDD+0.5
V
Analog input terminal voltage
VAIN
VSS -0.5～VDD+0.5
Storage temperature
TSTG
°C
-50～125
Maximum allowable loss (Ta=85°C)
PD85
413
mW
Maximum allowable loss (Ta=25°C)
PD25
1034
mW
Junction temperature
Tjmax
125
°C
Note. *1:VDD covers all of VDD terminals, including VDDPL, VDDPR, VDDL and VDDR.
VSS covers all of VSS terminals, including VSSPL, VSSPR, VSSL, VSSR and VSS.
2. Recommended operating conditions
Item
Power supply voltage
Operating ambient temperature
(ambient temperature Ta)
Output load impedance
Symbol
VDD
TOP
RL
Min.
3.15
-40
Typ.
5.0
25
Max.
5.25
85
4
3. DC characteristics (VDD=5V±0.25V, Ta=-40 to 85°C)
Item
Symbol
Condition
Min.
Output voltage "H" level VOH
IOH= -80µA、PROT terminal VDD-1.0
Output voltage "L" level
VOL
IOL= 1.6mA、PROT terminal
Input voltage "H" level
VIH
SLEEP, MUTE terminal
3.5
Input voltage "L" level
VIL
SLEEP, MUTE terminal
Consumption current 1
IDD1
at SLEEP mode
Consumption current 2
IDD2
at MUTE mode
Consumption current 3
IDD3
no signal, no filter
Note. These values do not guarantee the characteristics at VDD=3.3V±0.15V.
Unit
V
°C
Ω
Typ.
Max.
VSS+0.4
1.0
1
7
14
Unit
V
V
V
V
µA
mA
mA
4. Analog characteristics （VDD=5.0V, Ta=25°C, Frequency=1kHz）
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Maximum output
Po
2.5
W
THD+N=10％、RL=4Ω
Av
RL=4Ω
Voltage gain
24
dB
(RI=7.5kΩ, RF=47kΩ)
Total harmonic distortion THD+N RL=4Ω, Po=1.0W
0.018
％
(20kHz Band Width)
Signal/noise ratio
dB
103
SNR
Input sensitivity 1.0V RL=4Ω
dB
97
Input sensitivity 150mV RL=4Ω
（A-Filter）
Channel separation
CS
RL=4Ω
80
dB
Maximum efficiency
％
85
η
RL=8Ω
RL=4Ω
75
％
Output offset voltage
Vo
RL=4Ω
6
mV
Note. All the analog characteristics shown above are the values obtained on the DMB-D1, Yamaha's YDA131
evaluation board.
The characteristics may vary according to the coils and capacitors that are used, pattern layout and other
factors.
These values do not guarantee the characteristics at VDD=3.3±0.5V.
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YDA131
■Characteristics example
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YDA131
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YDA131
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YDA131
■External dimensions of package
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YDA131