RT8025 1.25MHz, 400mA, High Efficiency PWM Step-Down DC/DC Converter General Description The RT8025 is a high-efficiency pulse-width-modulated (PWM) step-down DC/DC converter. Capable of delivering 400mA output current over a wide input voltage range from 2.5 to 5.5V, the RT8025 is ideally suited for portable electronic devices that are powered from 1-cell Li-ion battery or from other power sources within the range such as cellular phones, PDAs and handy-terminals. Internal synchronous rectifier with low RDS(ON) dramatically reduces conduction loss at PWM mode. No external Schottky diode is required in practical application. The RT8025 automatically turns off the synchronous rectifier while the inductor current is low and enters discontinuous PWM mode. This can increase efficiency at light load condition. The RT8025 enters Low-Dropout mode when normal PWM cannot provide regulated output voltage by continuously turning on the upper P-MOSFET. RT8025 enter shutdown mode and consumes less than 0.1μA when EN pin is pulled low. Features 2.5V to 5.5V Input Range Adjustable Output From 0.5V to VIN 1.0V, 1.2V, 1.3V, 1.5V, 1.8V, 2.5V and 3.3V Fixed/ Adjustable Output Voltage 400mA Output Current 95% Efficiency No Schottky Diode Required 1.25MHz Fixed Frequency PWM Operation Small SOT-23-5 and TSOT-23-5 Package RoHS Compliant and Halogen Free Applications Cellular Telephones Personal Information Appliances Wireless and DSL Modems MP3 Players Portable Instruments Ordering Information RT8025(- Package Type B : SOT-23-5 J5 : TSOT-23-5 The switching ripple is easily smoothed-out by small package filtering elements due to a fixed operation frequency of 1.25MHz. This along with small SOT-23-5 and TSOT-23-5 package provides small PCB area application. Other features include soft start, lower internal reference voltage with 2% accuracy, over temperature protection, and over current protection. Lead Plating System G : Green (Halogen Free and Pb Free) Pin Configurations (TOP VIEW) LX FB/VOUT 5 4 Note : 3 VIN GND EN SOT-23-5/TSOT-23-5 Output Voltage Default : Adjustable 10 : 1.0V 12 : 1.2V 13 : 1.3V 15 : 1.5V 18 : 1.8V 25 : 2.5V 33 : 3.3V Richtek products are : ` 2 ) RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area. DS8025-02 March 2011 www.richtek.com 1 RT8025 Typical Application Circuit VIN 2.5V to 5.5V 1 VIN CIN 4.7µF LX 5 L 4.7µH VOUT RT8025 3 EN VOUT COUT 4 10µF GND 2 Figure 1. Fixed Voltage Regulator VIN 2.5V to 5.5V 1 VIN LX CIN 5 L 4.7µH VOUT C1 RT8025 4.7µF 3 EN FB R1 R1 ⎞ ⎛ VOUT = VREF x ⎜1 + ⎟ ⎝ R2 ⎠ with R1 + R2 ≤ 1MΩ and VREF(Typ.) = 0.5V COUT 4 10µF GND 2 R2 Figure 2. Adjustable Voltage Regulator Layout Guide VIN L VIN 1 5 VIN VIN 1 GND 2 5 LX CIN COUT 2 VOUT L LX CIN GND VOUT GND COUT GND R2 EN 3 4 VOUT EN 3 4 FB R1 VOUT C1 Figure 3 Layout note: 1. The distance that CIN connects to VIN is as close as possible (Under 2mm). 2. COUT should be placed near RT8025. www.richtek.com 2 DS8025-02 March 2011 RT8025 Functional Pin Description Pin No. Pin Name Pin Function 1 VIN Power Input. 2 GND Ground. 3 EN Chip Enable (Active High, do not leave EN pin floating, and VEN < VIN + 0.6V). 4 FB/VOUT Feedback Input Pin. 5 LX Pin for Switching. Function Block Diagram VIN EN RS1 OSC & Shutdown Control Current Limit Detector Slope Compensation Current Sense FB/VOUT Error Amplifier Control Logic PWM Comparator Driver LX RC COMP UVLO & Power Good Detector Zero Detector RS2 VREF GND DS8025-02 March 2011 www.richtek.com 3 RT8025 Absolute Maximum Ratings (Note 1) Supply Input Voltage -----------------------------------------------------------------------------------------------------Enable, FB Voltage ------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C SOT-23-5, TSOT-23-5 ----------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) SOT-23-5, TSOT-23-5, θJA ----------------------------------------------------------------------------------------------SOT-23-5, TSOT-23-5, θJC ----------------------------------------------------------------------------------------------Junction Temperature Range -------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Mode) ---------------------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------------------ Recommended Operating Conditions 6.5V VIN + 0.6V 0.4W 250°C/W 130°C/W 150°C 260°C −65°C to 150°C 2kV 200V (Note 4) Supply Input Voltage ------------------------------------------------------------------------------------------------------ 2.5V to 5.5V Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN = 3.6V, VOUT = 2.5V, VREF = 0.5V, L = 4.7μH, CIN = 4.7μF, COUT = 10μF, TA = 25°C, IMAX = 400mA, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit 2.5 -- 5.5 V Input Voltage Range VIN Quiescent Current IQ I OUT = 0mA, VFB = VREF + 5% -- 50 100 μA Shutdown Current I SHDN EN = GND -- 0.1 1 μA Reference Voltage VREF For adjustable output voltage 0.49 0.5 0.51 V Adjustable Output Range VOUT VREF -- VIN − 0.2 V −3 -- 3 % −3 -- 3 % −3 -- 3 % −3 -- 3 % −3 -- 3 % ΔVOUT ΔVOUT ΔVOUT Output Voltage Accuracy ΔVOUT Fix ΔVOUT VIN = 2.5 to 5.5V, VOUT = 1.0V 0A < IOUT < 400mA VIN = 2.5 to 5.5V, VOUT = 1.2V 0A < IOUT < 400mA VIN = 2.5 to 5.5V, VOUT = 1.3V 0A < IOUT < 400mA VIN = 2.5 to 5.5V, VOUT = 1.5V 0A < IOUT < 400mA VIN = 2.5 to 5.5V, VOUT = 1.8V 0A < IOUT < 400mA ΔVOUT VIN = VOUT + ΔV to 5.5V (Note 5) VOUT = 2.5V, 0A < IOUT < 400mA −3 -- 3 % ΔVOUT VIN = VOUT + ΔV to 5.5V (Note 5) VOUT = 3.3V, 0A < IOUT < 400mA −3 -- 3 % ΔVOUT VIN = VOUT + 0.2V to 5.5V 0A < IOUT < 400mA −3 -- 3 % To be continued www.richtek.com 4 DS8025-02 March 2011 RT8025 Parameter Symbol Test Conditions Min Typ Max Unit −3 -- 3 % −50 -- 50 nA VIN = 3.6V -- 0.3 0.65 VIN = 2.5V -- 0.4 0.80 VIN = 3.6V -- 0.25 0.55 VIN = 2.5V -- 0.35 0.65 ΔVOUT VIN = VOUT + ΔV to 5.5V 0A < I OUT < 400mA FB Input Current IFB VFB = VIN RDS(ON) of P-Channel MOSFET RDS(ON)_P IOUT = 200mA RDS(ON) of N-Channel MOSFET RDS(ON)_N IOUT = 200mA P-Channel Current Limit ILIM_P VIN = 2.5V to 5.5 V 1 -- 1.8 A EN High-Level Input Voltage VEN_H VIN = 2.5V to 5.5V 1.5 -- -- V EN Low-Level Input Voltage VEN_L VIN = 2.5V to 5.5V -- -- 0.4 V Undervoltage Lock Out threshold -- 1.8 -- V Hysteresis -- 0.1 -- V 0.8 1.25 1.85 MHz Thermal Shutdown Temperature TSD -- 160 -- °C Min. On Time -- 50 -- ns 100 -- -- % -1 -- 1 μA Output Voltage Accuracy Adjustable Oscillator Frequency fOSC (Note 5) VIN = 3.6V, I OUT = 100mA Max. Duty Cycle LX Leakage Current VIN = 3.6V, VLX = 0V or VLX = 3.6V Ω Ω Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in the natural convection at T A = 25°C on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. ΔV = IOUT x RDS(ON)_P DS8025-02 March 2011 www.richtek.com 5 RT8025 Typical Operating Characteristics Load Regulation Efficiency vs. Load Current 100 1.810 VIN = 3.3V 90 1.805 70 Load Regulation (V) Efficiency (%) 80 VIN = 5V 60 50 40 30 20 10 VIN = 5.5V 1.800 VIN = 3.3V 1.795 1.790 VIN = 2.5V 1.785 1.780 1.775 VOUT = 1.8V 0 0.01 0.11 1.770 0.21 0.31 0.41 0.51 VOUT = 1.8V 0.1 0.61 0.15 0.2 0.25 0.3 0.35 0.4 Load Current (A) Load Current (A) Current Limit vs. Input Voltage Frequency vs. Input Voltage 2.50 1.26 2.25 1.24 Frequency (MHz) Current Limit (A) 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0.00 1.22 1.20 1.18 1.16 VOUT = 1.8V 2.5 2.8 3.1 1.14 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VOUT = 1.8V 2.5 2.8 3.1 Input Voltage (V) 3.7 4 4.3 4.6 4.9 5.2 5.5 5.2 5.5 Input Voltage (V) Reference vs. Input Voltage Frequency vs. Temperature 1.26 0.60 1.24 0.58 VOUT = 1.8V 0.56 1.22 Reference (V) Frequency (MHz) 3.4 1.20 1.18 1.16 1.14 0.54 0.52 0.50 0.48 0.46 0.44 1.12 0.42 VIN = 3.3V, VOUT = 1.8V 1.10 0.40 -50 -25 0 25 50 Temperature (°C) www.richtek.com 6 75 100 125 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 Input Voltage (V) DS8025-02 March 2011 RT8025 Reference vs. Temperature 0.510 Load Transient Response VIN = 3.3V, VOUT = 1.8V 0.508 VOUT (20mV/Div) Reference (V) 0.505 0.503 0.500 0.498 0.495 IOUT (200mA/Div) 0.493 VIN = 3.3V, VOUT = 1.8V, IOUT = 100mA to 400mA 0.490 -50 -25 0 25 50 75 100 125 Time (50μs/Div) Temperature (°C) Load Transient Response Output Ripple VIN = 3.3V, VOUT = 1.8V, IOUT = 400mA VLX (5V/Div) VOUT (20mV/Div) VOUT (5mV/Div) IOUT (200mA/Div) VIN = 3.3V, VOUT = 1.8V, IOUT = 200mA to 400mA ILX (500mA/Div) Time (50μs/Div) Time (500ns/Div) Power On Power Off VIN = 3.3V, VOUT = 1.8V, IOUT = 400mA VIN = 3.3V, VOUT = 1.8V, IOUT = 400mA VEN (5V/Div) VEN (5V/Div) VOUT (1V/Div) VOUT (2V/Div) I IN (200mA/Div) I IN (200mA/Div) Time (100μs/Div) DS8025-02 March 2011 Time (100μs/Div) www.richtek.com 7 RT8025 Applications Information The basic RT8025 application circuit is shown in Typical Application Circuit. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by CIN and COUT. Inductor Selection For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current ΔIL increases with higher VIN and decreases with higher inductance. ⎡V ⎤⎡ V ⎤ ΔIL = ⎢ OUT ⎥ ⎢1 − OUT ⎥ VIN ⎦ ⎣ f × L ⎦⎣ Having a lower ripple current reduces the ESR losses in the output capacitors and the output voltage ripple. Highest efficiency operation is achieved at low frequency with small ripple current. This, however, requires a large inductor. A reasonable starting point for selecting the ripple current is ΔIL = 0.4(IMAX). The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation : VOUT ⎤ ⎡ VOUT ⎤ ⎡ L=⎢ ⎢1 − ⎥ ⎥ ⎣ f × ΔIL(MAX) ⎦ ⎣⎢ VIN(MAX) ⎦⎥ Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite or mollypermalloy cores. Actual core loss is independent of core size for a fixed inductor value but it is very dependent on the inductance selected. As the inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard”, which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in www.richtek.com 8 inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’ t radiate energy but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price vs size requirements and any radiated field/EMI requirements. CIN and COUT Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the top MOSFET. To prevent large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used. RMS current is given by : IRMS = IOUT(MAX) VOUT VIN VIN −1 VOUT This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, ΔVOUT, is determined by : 1 ⎤ ⎡ ΔVOUT ≤ ΔIL ⎢ESR + ⎥ 8fC OUT ⎦ ⎣ The output ripple is highest at maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special DS8025-02 March 2011 RT8025 polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. The resistive divider allows the VFB pin to sense a fraction of the output voltage as shown in Figure 4. V OUT R1 VFB R2 GND Figure 4. Setting the Output Voltage For adjustable about voltage mode, the output voltage is set by an external resistive divider according to the following equation : VOUT = VREF (1 + R1) R2 where VREF is the internal reference voltage (0.5V typ.) DS8025-02 March 2011 The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as : Efficiency = 100% − (L1+ L2+ L3+ ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses : VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence. 1. The VIN quiescent current is due to two components : the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge ΔQ moves from VIN to ground. The resulting ΔQ/Δt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT+QB) Output Voltage Programming RT8025 Efficiency Considerations where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, R SW and external inductor RL. In continuous mode the average output current flowing through inductor L is “chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into the LX pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows : RSW = RDS(ON)TOP x DC + RDS(ON)BOT x (1−DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics www.richtek.com 9 RT8025 curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% of the total loss. Where TC is the package case (Pin 2 of package leads) temperature measured by thermal sensor, PD is the power dissipation defined by user's function and the θJC is the junction to case thermal resistance provided by IC manufacturer. Therefore it's easy to estimate the junction temperature by any condition. Maximum Power Dissipation (mW) 450 Thermal Considerations The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) - TA ) / θJA Where T J(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of RT8025 DC/DC converter, where TJ (MAX) is the maximum junction temperature of the die (125°C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance θ JA is layout dependent. For SOT-23-5/TSOT-23-5 packages, the thermal resistance θJA is 250°C/W on the standard JEDEC 51-3 single-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : PD(MAX) = ( 125°C - 25°C ) / 250 = 0.4 W for SOT-23-5/ TSOT-23-5 packages The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA. For RT8025 packages, the Figure 5 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. The value of junction to case thermal resistance θJC is popular for users. This thermal parameter is convenient for users to estimate the internal junction operated temperature of packages while IC operating. It's independent of PCB layout, the surroundings airflow effects and temperature difference between junction to ambient. The operated junction temperature can be calculated by following formula : Single Layer PCB 400 350 SOT-23-5, TSOT-23-5 Packages 300 250 200 150 100 50 0 0 20 40 60 80 100 120 140 Ambient Temperature (°C) Figure 5. Derating Curves for RT8025 Package Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD (ESR), where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. Layout Considerations Follow the PCB layout guidelines for optimal performance of RT8025. ` For the main current paths as indicated in bold lines in Figure 6 keep their traces short and wide. ` Put the input capacitor as close as possible to the device pins (VIN and GND). ` LX node is with high frequency voltage swing and should be kept small area. Keep analog components away from LX node to prevent stray capacitive noise pick-up. TJ = TC + PD x θJC www.richtek.com 10 DS8025-02 March 2011 RT8025 ` Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components near the RT8025. ` Connect all analog grounds to a command node and then connect the command node to the power ground behind the output capacitors. V IN 1 VIN LX 5 4.7uH R3 3 EN C3 4.7uF FB GND V OUT L1 RT8025 C1 R1 C2 R2 4 C4 10uF 2 Figure 6. EVB Schematic Recommended component selection for Typical Application Component Supplier TAIYO YUDEN TAIYO YUDEN Sumida Sumida GOTREND GOTREND Table 1. Inductors Series Inductance (μH) DCR (mΩ) Current Rating (mA) Dimensions (mm) NR 3015 2.2 60 1480 3x3x1.5 NR 3015 4.7 120 1020 3x3x1.5 CDRH2D14 2.2 75 1500 4.5x3.2x1.55 CDRH2D14 4.7 135 1000 4.5x3.2x1.55 GTSD32 2.2 58 1500 3.85x3.85x1.8 GTSD32 4.7 146 1100 3.85x3.85x1.8 Table 2. Capacitors for CIN and COUT Component Supplier TDK TDK MURATA MURATA MURATA TAIYO YUDEN TAIYO YUDEN TAIYO YUDEN DS8025-02 March 2011 Part No. C1608JB0J475M C2012JB0J106M GRM188R60J475KE19 GRM219R60J106ME19 GRM219R60J106KE19 JMK107BJ475RA JMK107BJ106MA JMK212BJ106RD Capacitance (μF) 4.7 10 4.7 10 10 4.7 10 10 Case Size 0603 0805 0603 0805 0805 0603 0603 0805 www.richtek.com 11 RT8025 Outline Dimension H D L B C b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.889 1.295 0.035 0.051 A1 0.000 0.152 0.000 0.006 B 1.397 1.803 0.055 0.071 b 0.356 0.559 0.014 0.022 C 2.591 2.997 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 SOT-23-5 Surface Mount Package www.richtek.com 12 DS8025-02 March 2011 RT8025 H D L B C b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 1.000 0.028 0.039 A1 0.000 0.100 0.000 0.004 B 1.397 1.803 0.055 0.071 b 0.300 0.559 0.012 0.022 C 2.591 3.000 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 TSOT-23-5 Surface Mount Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. DS8025-02 March 2011 www.richtek.com 13