® RT8205A/B/C High Efficiency, Main Power Supply Controllers for Notebook Computers General Description Features The RT8205A/B/C dual step-down, switch-mode powersupply controller generates logic-supply voltages in battery-powered systems. The RT8205A/B/C includes two pulse-width modulation (PWM) controllers fixed at 5V/ 3.3V or adjustable from 2V to 5.5V. An alternative LGATE1 output LG1_CP can be used for external charge pump (RT8205B). And an optional external charge pump can be monitored through SECFB (RT8205C). This device also features 2 linear regulators providing fixed 5V and 3.3V outputs. The linear regulator each provides up to 70mA output current with automatic linear-regulator bootstrapping to the PWM outputs. The RT8205A/B/C includes on-board power-up sequencing, the power-good output, internal softstart, and internal soft-discharge output that prevents negative voltages on shutdown. z A constant on-time PWM control scheme operates without sense resistor and provides 100ns response to load transients while maintaining a relatively constant switching frequency. The unique ultrasonic mode maintains the switching frequency above 25kHz, which eliminates noise in audio applications. Other features include diodeemulation mode (DEM), which maximizes efficiency in light-load applications, and fixed-frequency PWM mode, which reduces RF interference in sensitive application z z z z z z z z z z z z z z Wide Input Voltage Range 6V to 25V Dual Fixed 5V/3.3V Outputs or Adjustable from 2V to 5.5V, 1.5% Accuracy. Alternative LGATE1 Output (LG1_CP) acts as Clock for Charge Pump (RT8205B) Secondary Feedback Input Maintains Charge Pump Voltage (RT8205C) Fixed 3.3V and 5V LDO Output : 70mA 2V Reference Voltage ±1% : 50μ μA Constant ON-Time Control with 100ns Load Step Response Frequency Selectable via TONSEL Setting RDS(ON) Current Sensing and Programmable Current Limit combined with Enable Control Selectable PWM, DEM, or Ultrasonic Mode Internal Soft-Start and Soft-Discharge High Efficiency up to 97% 5mW Quiescent Power Dissipation Thermal Shutdown RoHS Compliant and Halogen Free Applications z z Notebook and Sub-Notebook Computers 3-Cell and 4-Cell Li+ Battery-Powered Devices Ordering Information RT8205 Package Type QW : WQFN-24L 4x4 (W-Type) Lead Plating System G : Green (Halogen Free and Pb Free) Pin Function A : Default B : With LG1_CP C : With SECFB Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 Note : Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT8205A/B/C Marking Information RT8205AGQW RT8205CGQW RT8205BGQW CK= : Product Code CJ= : Product Code YMDNN : Date Code CJ=YM DNN CL= : Product Code YMDNN : Date Code CK=YM DNN YMDNN : Date Code CL=YM DNN Pin Configurations 24 23 22 21 20 19 ENTRIP1 FB1 REF TONSEL FB2 ENTRIP2 24 23 22 21 20 19 1 18 2 17 3 15 25 5 NC VREG5 VIN GND SKIPSEL EN 16 GND 4 14 13 6 18 2 17 3 16 GND 4 15 25 5 14 6 10 11 12 13 7 8 9 LG1_CP VREG5 VIN PGND SKIPSEL EN ENTRIP1 FB1 REF TONSEL FB2 ENTRIP2 1 18 2 17 3 15 25 5 SECFB VREG5 VIN PGND SKIPSEL EN 16 GND 4 14 6 13 10 11 12 7 8 9 10 11 12 VOUT2 VREG3 BOOT2 UGATE2 PHASE2 LGATE2 9 24 23 22 21 20 19 1 VOUT2 VREG3 BOOT2 UGATE2 PHASE2 LGATE2 8 ENTRIP1 FB1 REF TONSEL FB2 ENTRIP2 VOUT2 VREG3 BOOT2 UGATE2 PHASE2 LGATE2 7 VOUT1 PGOOD BOOT1 UGATE1 PHASE1 LGATE1 VOUT1 PGOOD BOOT1 UGATE1 PHASE1 LGATE1 VOUT1 PGOOD BOOT1 UGATE1 PHASE1 LGATE1 (TOP VIEW) RT8205A RT8205B RT8205C WQFN-24L 4x4 WQFN-24L 4x4 WQFN-24L 4x4 Typical Application Circuit For Fixed Voltage Regulator VIN R7 3.9 C1 10uF C6 0.1uF Q1 BSC119 N03S VOUT1 5V C3 220uF R5 C4 BOOT2 PHASE2 11 R3 0 22 BOOT1 LGATE2 12 20 PHASE1 19 LGATE1 C11 0.22uF 24 VOUT1 3 REF Frequency Control 4 TONSEL PWM/DEM/Ultrasonic 14 SKIPSEL OFF 13 EN 2 FB1 5 FB2 Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 9 21 UGATE1 Q3 BSC119 N03S ON UGATE2 10 R4 0 C2 0.1uF L1 6.8uH RT8205A 16 VIN VOUT2 7 VREG5 17 PGOOD 23 VREG3 8 R9 0 Q2 BSC119 N03S R8 0 C7 0.1uF GND R10 VOUT2 3.3V C13 220uF C10 5V Always On R6 100k PGOOD Indicator C12 4.7uF ENTRIP1 1 ENTRIP2 C8 10uF L2 4.7uH Q4 BSC119 N03S C5 4.7uF C9 10uF 6 3.3V Always On R1 150k R2 150k 15, Exposed Pad (25) is a registered trademark of Richtek Technology Corporation. DS8205A/B/C-06 July 2012 RT8205A/B/C VIN R7 3.9 C1 10uF RT8205B C10 0.1uF Q1 BSC119 N03S VOUT1 5V C3 220uF C4 C6 0.1uF PHASE2 11 R3 0 22 BOOT1 LGATE2 12 20 PHASE1 18 LG1_CP C7 0.1uF C15 0.22uF D4 ON BAT254 C8 0.1uF PGOOD 23 VREG3 8 24 VOUT1 D2 D3 VOUT2 7 VREG5 17 19 LGATE1 C5 0.1uF D1 9 21 UGATE1 Q3 BSC119 N03S R5 BOOT2 R4 0 C2 0.1uF L1 6.8uH UGATE2 10 16 VIN ENTRIP2 PGND 13 EN OFF CP ENTRIP1 3 REF Frequency Control 4 TONSEL PWM/DEM/Ultrasonic 14 SKIPSEL R9 0 Q2 BSC119 N03S R8 0 C7 0.1uF C12 10uF L2 4.7uH Q4 BSC119 N03S C9 4.7uF C13 10uF VOUT2 3.3V C17 220uF R10 C14 5V Always On R6 100k PGOOD Indicator C16 4.7uF 3.3V Always On 1 R1 150k 6 R2 150k 15 FB1 2 FB2 5 GND Exposed Pad (25) VIN R8 3.9 C1 10uF RT8205C C10 0.1uF Q1 BSC119 N03S VOUT1 C3 220uF C4 D1 C6 0.1uF R3 0 22 BOOT1 LGATE2 12 20 PHASE1 19 LGATE1 24 VOUT1 C15 0.22uF D3 C7 0.1uF BAT254 CP VOUT2 7 VREG5 17 PGOOD 23 VREG3 8 ENTRIP1 1 ENTRIP2 6 Q2 BSC119 N03S R9 0 C11 0.1uF C12 10uF L2 4.7uH Q4 BSC119 N03S C9 4.7uF C13 10uF R11 VOUT2 3.3V C17 220uF C14 5V Always On R6 100k PGOOD Indicator C16 4.7uF 3.3V Always On R1 150k R2 150k TONSEL 4 R6 200k C18 ON 3 REF 2 FB1 5 FB2 D4 C8 0.1uF 9 PHASE2 11 C5 0.1uF D2 BOOT2 21 UGATE1 Q3 BSC119 N03S R5 UGATE2 10 R4 0 C2 0.1uF L1 6.8uH 16 VIN R10 0 18 SECFB R7 39k 13 EN Frequency Control SKIPSEL 14 PWM/DEM/Ultrasonic 15 PGND Exposed Pad (25) GND OFF Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT8205A/B/C For Adjustable Voltage Regulator V IN R7 3.9 C1 10uF C3 220uF C4 C15 0.1uF 21 UGATE1 PHASE2 11 R3 0 22 BOOT1 LGATE2 12 20 PHASE1 R11 15k ENTRIP2 R12 10k 2 FB1 3 REF C11 0.22uF Frequency Control 4 TONSEL PWM/DEM/Ultrasonic 14 SKIPSEL GND ON C13 220uF C10 C17 R13 6.5k C16 0.1uF R14 10k R2 150k 6 V OUT2 3.3V R10 R1 150k 15, Exposed Pad (25) VREG5 17 5V Always On C5 4.7uF PGOOD 23 VREG3 8 13 EN C8 10uF L2 4.7uH Q4 BSC119 N03S ENTRIP1 1 24 VOUT1 C9 10uF C7 0.1uF VOUT2 7 5 FB2 19 LGATE1 Q2 BSC119 N03S R8 0 9 R4 0 Q3 BSC119 N03S R5 C14 BOOT2 C2 0.1uF L1 6.8uH V OUT1 5V UGATE2 10 16 VIN C6 0.1uF Q1 BSC119 N03S R9 0 RT8205A R6 100k PGOOD Indicator 3.3V Always On C12 4.7uF OFF V IN R7 3.9 C1 10uF RT8205B C10 0.1uF Q1 BSC119 N03S C3 220uF C4 C18 C19 0.1uF BOOT2 PHASE2 11 R3 0 22 BOOT1 LGATE2 12 20 PHASE1 19 LGATE1 R11 15k 2 FB1 D1 C6 0.1uF C5 0.1uF 18 LG1_CP D2 D3 C7 0.1uF 3 REF C15 0.22uF D4 BAT254 C8 0.1uF CP ON OFF 13 EN Frequency Control 4 TONSEL PWM/DEM/Ultrasonic 14 SKIPSEL Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 R9 0 Q2 BSC119 N03S R8 0 C7 0.1uF C13 10uF C12 10uF L2 4.7uH Q4 BSC119 N03S V OUT2 3.3V C17 220uF R10 C14 VOUT2 7 R13 6.5k FB2 5 24 VOUT1 R12 10k 9 21 UGATE1 Q3 BSC119 N03S R5 UGATE2 10 R4 0 C2 0.1uF L1 6.8uH V OUT1 5V 16 VIN R1 150k ENTRIP1 1 ENTRIP2 GND C20 0.1uF R2 150k 6 Exposed Pad (25) VREG5 17 PGOOD 23 VREG3 8 PGND R14 10k C21 C9 4.7uF 5V Always On R6 100k PGOOD Indicator C16 4.7uF 3.3V Always On 15 is a registered trademark of Richtek Technology Corporation. DS8205A/B/C-06 July 2012 RT8205A/B/C VIN R8 3.9 C1 10uF RT8205C C10 0.1uF Q1 BSC119 N03S VOUT1 C3 220uF C4 C18 C19 0.1uF BOOT2 PHASE2 11 R3 0 22 BOOT1 LGATE2 12 20 PHASE1 19 LGATE1 R12 15k 2 FB1 D1 C6 0.1uF C5 0.1uF D2 D3 C7 0.1uF 3 REF BAT254 C8 0.1uF 18 R7 39k CP SECFB C18 ON 13 EN R9 0 C11 0.1uF C12 10uF L2 4.7uH Q4 BSC119 N03S VOUT2 3.3V C17 220uF R11 C14 ENTRIP2 R14 6.5k 5 1 R1 150k 6 R2 150k R15 10k C21 C20 0.1uF Exposed Pad (25) VREG5 17 PGOOD 23 VREG3 8 D4 R6 200k ENTRIP1 GND C15 0.22uF Q2 BSC119 N03S C13 10uF VOUT2 7 FB2 24 VOUT1 R13 10k 9 21 UGATE1 Q3 BSC119 N03S R5 UGATE2 10 R4 0 C2 0.1uF L1 6.8uH 16 VIN R10 0 TONSEL 4 SKIPSEL 14 15 PGND C9 4.7uF 5V Always On R6 100k PGOOD Indicator C16 4.7uF 3.3V Always On Frequency Control PWM/DEM/Ultrasonic OFF Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT8205A/B/C Function Block Diagram TONSEL SKIPSEL BOOT1 BOOT2 UGATE1 UGATE2 PHASE1 VREG5 PHASE2 VREG5 SMPS1 PWM Buck Controller LGATE1 SMPS2 PWM Buck Controller LGATE2 PGND VOUT2 FB2 ENTRIP2 VOUT1 FB1 ENTRIP1 PGOOD Power-On Sequence Clear Fault Latch EN GND SW Threshold SW Threshold Thermal Shutdown VREG3 VREG5 REF VREG5 VREG3 VIN REF Function Block Diagram TONSEL VIN UGATE On-Time Compute VOUT TON Q 1-Shot R TOFF TRIG 1-Shot Q TRIG REF - Comp + + - + LGATE FB 1.1 x VREF 0.7 x VREF Over-Voltage + Fault Latch - VREG5 Blanking + Time Under-Voltage + 0.9 x VREF + PGOOD ENTRIP - SS Time + + 25kHz Detector Zero Detector + Current Limit PHASE - SKIPSEL PWM Controller (One Side) Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS8205A/B/C-06 July 2012 RT8205A/B/C Functional Pin Description ENTRIP1 (Pin 1) Channel 1 enable and Current Limit setting Input. Connect resistor to GND to set the threshold for channel 1 synchronous RDS(ON) sense. The GND-PHASE1 current- from VREG5 to ENTRIP2. The logic current limit threshold is default to 200mV value if ENTRIP2 is higher than VREG5-1V. limit threshold is 1/10th the voltage seen at ENTRIP1 over a 0.5V to 2V range. There is an internal 10uA current source from VREG5 to ENTRIP1. The logic current limit threshold is default to 200mV value if ENTRIP1 is higher than VREG5-1V. VOUT2 (Pin 7) FB1 (Pin 2) VREG3 (Pin 8) SMPS1 Feedback Input. Connect FB1 to VREG5 or GND for fixed 5V operation. Or connect FB1 to a resistive voltagedivider from VOUT1 to GND to adjust output from 2V to 5.5V. 3.3V Linear Regulator Output. REF (Pin 3) 2V Reference Output. Bypass to GND with a 0.22uF capacitor. REF can source up to 50uA for external loads. Loading REF degrades FBx and output accuracy according to the REF load-regulation error. SMPS2 Output Voltage-Sense Input. Connect to the SMPS2 output. VOUT2 is an input to the on-time oneshot circuit. It also serves as the SMPS2 feedback input in fixed-voltage mode. BOOT2 (Pin 9) Boost Flying Capacitor Connection for SMPS2. Connect to an external capacitor according to the typical application circuits. UGATE2 (Pin 10) High-Side MOSFET Floating Gate-Driver Output for SMPS2. UGATE2 swings between PHASE2 and BOOT2. TONSEL (Pin 4) PHASE2 (Pin 11) Frequency Selectable Input for VOUT1/VOUT2 respectively. Inductor Connection for SMPS2. PHASE2 is the internal lower supply rail for the UGATE2 high-side gate driver. PHASE2 is also the current-sense input for the SMPS2. 400kHz/500kHz : Connect to VREG5 or VREG3 300kHz/375kHz : Connect to REF LGATE2 (Pin 12) 200kHz/250kHz : Connect to GND SMPS2 Synchronous-Rectifier Gate-Drive Output. LGATE2 swings between GND and VREG5. FB2 (Pin 5) SMPS2 Feedback Input. Connect FB2 to VREG5 or GND for fixed 3.3V operation. Or connect FB2 to a resistive voltage-divider from VOUT2 to GND to adjust output from 2V to 5.5V. EN (Pin 13) Master Enable Input. The REF/VREG5/VREG3 are enabled if it is within logic high level and disable if it is less than the logic low level. ENTRIP2 (Pin 6) SKIPSEL (Pin 14) Channel 2 enable and Current Limit setting Input. Connect Operation Mode Selectable Input. resistor to GND to set the threshold for channel 2 synchronous RDS(ON) sense. The GND-PHASE2 currentlimit threshold is 1/10th the voltage seen at ENTRIP2 over a 0.5V to 2V range. There is an internal 10uA current source Ultrasonic Mode : Connect to VREG5 or VREG3 Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 Diode Emulation Mode : Connect to REF PWM Mode : Connect to GND is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT8205A/B/C GND [Pin 15 (RT8205A), Exposed Pad (25)] UGATE1 (Pin 21) Analog Ground for SMPS controller. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. High-Side MOSFET Floating Gate-Driver Output for SMPS1. UGATE1 swings between PHASE1 and BOOT1. BOOT1 (Pin 22) PGND (Pin 15) (RT8205B/C) Power Ground for SMPS controller. Connect PGND externally to the underside of the exposed pad. Boost Flying Capacitor Connection for SMPS1. Connect to an external capacitor according to the typical application circuits. VIN (Pin 16) PGOOD (Pin 23) High Voltage Power Supply Input for 5V/3.3V LDO and Feed-forward ON-Time circuitry. Power Good Output for channel 1 and channel 2. (Logical AND) VREG5 (Pin 17) VOUT1 (Pin 24) 5V Linear Regulator Output.VREG5 is also the supply voltage for the low-side MOSFET driver and analog supply voltage for the device. SMPS1 Output Voltage-Sense Input. Connect to the SMPS1 output. VOUT1 is an input to the on-time oneshot circuit. It also serves as the SMPS1 feedback input in fixed-voltage mode. NC (Pin 18) (RT8205A) No Internal Connection. LG1_CP (Pin 18) (RT8205B) Alternative LGATE1 Output for 14V charge pump. SECFB (Pin 18) (RT8205C) The SECFB is used to monitor the optional external 14V charge pump. Connect a resistive voltage-divider from 14V charge pump output to GND to detect the output. If SECFB drops below the threshold voltage, LGATE1 turns on for 300ns (typ.). This will refresh the external charge pump driven by LGATE1 without over-discharging the output voltage. LGATE1 (Pin 19) SMPS1 Synchronous-Rectifier Gate-Drive Output. LGATE1 swings between GND and VREG5. PHASE1 (Pin 20) Inductor Connection for SMPS1. PHASE1 is the internal lower supply rail for the UGATE1 high-side gate driver. PHASE1 is also the current-sense input for the SMPS1. Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 is a registered trademark of Richtek Technology Corporation. DS8205A/B/C-06 July 2012 RT8205A/B/C Absolute Maximum Ratings (Note 1) VIN, EN to GND ----------------------------------------------------------------------------------------------z PHASEx to GND DC ---------------------------------------------------------------------------------------------------------------< 20ns ---------------------------------------------------------------------------------------------------------z BOOTx to PHASEx -----------------------------------------------------------------------------------------z ENTRIPx, SKIPSEL, TONSEL, PGOOD, to GND ---------------------------------------------------z VREG5, VREG3, FBx, VOUTx, SECFB, REF to GND --------------------------------------------z UGATEx to PHASEx DC ---------------------------------------------------------------------------------------------------------------< 20ns ---------------------------------------------------------------------------------------------------------z LGATEx to GND DC ---------------------------------------------------------------------------------------------------------------< 20ns ---------------------------------------------------------------------------------------------------------z Power Dissipation, PD @ TA = 25°C WQFN-24L 4x4 ----------------------------------------------------------------------------------------------z Package Thermal Resistance (Note 2) WQFN-24L 4x4, θJA -----------------------------------------------------------------------------------------WQFN-24L 4x4, θJC ----------------------------------------------------------------------------------------z Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------z Junction Temperature ---------------------------------------------------------------------------------------z Storage Temperature Range ------------------------------------------------------------------------------z ESD Susceptibility (Note 3) HBM (Human Body Model) --------------------------------------------------------------------------------z Recommended Operating Conditions z z z −0.3V to 28V −0.3V to 28V −8V −0.3V to 6V −0.3V to 6V −0.3V to (VREG5 + 0.3V) −0.3V to (VREG5 + 0.3V) −5V −0.3V to (VREG5 + 0.3V) −2.5V 1.923W 52°C/W 7°C/W 260°C 150°C −65°C to 150°C 2kV (Note 4) Input Voltage, VIN -------------------------------------------------------------------------------------------- 6V to 25V Junction Temperature Range ------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------- −40°C to 85°C Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 To be continued RT8205A/B/C Electrical Characteristics (VIN = 12V, EN = 5V, ENTRIP1 = ENTRIP2 = 2V, No Load on VREG5, VREG3, VOUT1, VOUT2 and REF, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Input Supply VIN Standby Supply Current VIN Shutdown Supply Current Quiescent Power Consumption IVIN_SBY VIN = 6V to 25V, Both SMPS Off, EN = 5V -- 200 -- μA IVIN_SHDH VIN = 6V to 25V, ENTRIPx = EN = GND -- 20 40 μA Both SMPSs On, FBx = SKIPSEL = REF (Note 5) VOUT1 = 5.3V, VOUT2 = 3.5V -- 5 7 mW 4.975 5.05 5.125 V 3.285 3.33 3.375 V 1.975 2 2.025 V 1.92 2 2.08 V 2 -- 5.5 V Fixed or Adj-Mode comparator threshold 0.2 0.4 0.55 V Either SMPS, SKIPSEL = GND, 0 to 5A Either SMPS, SKIPSEL = VREG5, 0 to 5A Either SMPS, SKIPSEL = REF, 0 to 5A Either SMPS, VIN = 6V to 25V ----- −0.1 −1.7 −1.5 0.005 ----- % % % %/V 1895 2105 2315 SMPS Output and FB Voltage VOUT1 Output Voltage in Fixed Mode VOUT2 Output Voltage in Fixed Mode FBx in Output Adjustable Mode SECFB Voltage Output Voltage Adjust Range FBx Adjustable-mode Threshold Voltage VOUT1 VOUT2 VIN = 6V to 25V, FB1= GND or 5V, SKIPSEL = GND VIN = 6V to 25V, FB2 = GND or 5V, SKIPSEL = GND FBx VIN = 6V to 25V SECFB VIN = 6V to 25V (RT8205C) VOUTx SMPS1, SMPS2 DC Load Regulation VLOAD Line Regulation VLINE On Time TONSEL = GND On-Time Pulse Width tUGATEx VOUT2 = 3.33V 999 1110 1221 VOUT1 = 5.05V 1227 1403 1579 VOUT2 = 3.33V 647 740 833 VOUT1 = 5.05V 895 1052 1209 VOUT2 = 3.33V 475 555 635 200 300 400 ns SKIPSEL = VREG5 or VREG3 25 33 -- kHz Zero to Full Limit from ENTRIPx Enable -- 2 -- ms 180 200 220 mV 9.4 10 10.6 μA -- 1600 -- PPM/°C 0.5 -- 2 V TONSEL = REF TONSEL = VREG5 Minimum Off-Time Ultrasonic Mode Frequency VOUT1 = 5.05V tLGATEx ns Soft Start Soft-Start Time tSSx Current Sense Current Limit Threshold VENTRIPx = VREG5, GND−PHASEx (Default) ENTRIPx Source Current IENTRIPx VENTRIPx = 0.9V ENTRIPx Current TCIENTRIPx Temperature Coefficient ENTRIPx Adjustment VENTRIPx = IENTRIPx x RENTRIPx Range Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 is a registered trademark of Richtek Technology Corporation. DS8205A/B/C-06 July 2012 RT8205A/B/C Parameter Symbol Test Conditions VENTRIPx = 0.5V GND−PHASEx VENTRIPx =1V Current-Limit Threshold VENTRIPx =2V SKIPSEL = VREG5 or REF, GND−PHASEx Zero-Current Threshold Min Typ Max Unit 40 90 50 100 60 110 mV mV 180 200 220 mV -- 3 -- mV 4.8 5 5.2 V 3.2 3.33 3.46 V Internal Regulator and Reference VOUT1 = GND, 6V < VIN < 25V, 0 < IVREG5 < 70mA VOUT2 = GND, 6V < VIN < 25V, 0 < IVREG3 < 70mA VREG5 Output Voltage VVREG5 VREG3 Output Voltage VVREG3 VREG5 Short Current IVREG5 VREG5 = GND, VOUT1 = GND -- 175 275 mA VREG3 Short Current IVREG3 VREG3 = GND, VOUT2 = GND -- 175 275 mA 4.53 4.66 4.79 V 2.96 3.06 3.16 V -- 1.5 3 Ω VREG5 Switchover Threshold to VOUT1 VREG3 Switchover Threshold to VOUT2 VREGx Switchover Equivalent Resistance REF Output Voltage Rising Edge at VOUT1 Regulation Point Rising Edge at VOUT2 Regulation Point RSW VREGx to VOUTx, 10mA VREF No External Load 1.98 2 2.02 V REF Load Regulation 0 < I LOAD < 50uA -- 10 -- mV REF Sink Current REF in Regulation 5 -- -- μA SMPSx off -- 2.5 -- V Rising Edge -- 4.35 4.5 V Falling Edge 3.9 4.05 4.25 V −11 −7.5 −4 % -- 10 -- μs UVLO VREG3 UVLO Threshold VREG5 UVLO Threshold Power Good PGOOD Propagation Delay FBx with Respect to Internal Reference, Falling Edge, Hysteresis = 1% Falling Edge, 50mV Overdrive PGOOD Leakage Current High State, Forced to 5.5V -- -- 1 μA PGOOD Output Low Voltage ISINK = 4mA -- -- 0.3 V 108 111 115 % -- 10 -- μs 65 70 75 % -- 3 -- ms -- 150 -- °C -- 10 -- °C PGOOD Threshold Fault Detection OVP Trip Threshold VFB_OVP FBx with Respect to Internal Reference OVP Propagation Delay UVP Trip Threshold UVP Shutdown Blanking Time tSHDN_UVP FBx with Respect to Internal Reference From ENTRIPx Enable Thermal Shutdown Thermal Shutdown TSHDN Thermal Shutdown Hysteresis Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT8205A/B/C Parameter VOUT Discharge VOUTx Discharge Current Logic Input Symbol IDISx FB1/FB2 Input Voltage SKIPSEL Input Voltage ENTRIPx Input Voltage Test Conditions Min Typ Max Unit ENTRIPx = GND, VOUTx = 0.5V 10 60 -- mA Low Level (Internal Fixed VOUTx) -- -- 0.2 V High Level (Internal Fixed VOUTx) 4.5 -- -- V Low Level (PWM Mode) -- -- 0.8 V REF Level (DEM Mode) 1.8 -- 2.3 V High Level (Ultrasonic Mode) 2.5 -- -- V SMPS On Level V 0.35 0.4 0.45 EN Threshold Logic-High VIH 1 -- -- Voltage VIL -- -- 0.4 -1.8 2.5 −1 −1 −1 ------- 0.8 2.3 -3 1 1 VREG5 to BOOTx -- 20 -- Ω UGATEx Forced to 2V -- 2 -- A LGATEx Forced to 2V -- 1.7 -- A LGATEx Forced to 2V BOOTx to PHASEx Forced to 5V LGATEx, High State LGATEx, Low State LGATEx Rising UGATEx Rising ------- 3.3 1.5 2.2 0.6 30 40 -4 5 1.5 --- A Ω Logic-Low TONSEL Setting Voltage Input Leakage Current Internal BOOT Switch Internal Boost Charging Switch On-Resistance Power MOSFET Drivers UGATEx Driver Sink/Source Current LGATEx Driver Source Current LGATEx Driver Sink Current UGATEx On-Resistance LGATEx On-Resistance Dead Time VOUT1/VOUT2 = 200kHz/250kHz VOUT1/VOUT2 = 300kHz/375kHz VOUT1/VOUT2 = 400kHz/500kHz EN = 0V or 25V TONSEL, SKIPSEL = 0V or 5V FBx = SECFB = 0V or 5V V V μA Ω ns Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. PVIN + PVREG5 Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 is a registered trademark of Richtek Technology Corporation. DS8205A/B/C-06 July 2012 RT8205A/B/C Typical Operating Characteristics VOUT1 Output Efficiency vs. Load Current VOUT2 Output Efficiency vs. Load Current 100 100 90 90 DEM Mode 80 70 Efficiency (%) Efficiency (%) 80 Ultrasonic Mode 60 50 PWM Mode 40 30 20 DEM Mode 70 60 Ultrasonic Mode 50 PWM Mode 40 30 20 VIN = 8V, TONSEL = GND, EN = VIN, ENTRIP1 = 0.91V, ENTRIP2 = GND 10 0 0.001 0.01 0.1 1 VIN = 8V, TONSEL = GND, EN = VIN, ENTRIP1 = GND, ENTRIP2 = 0.91V 10 0 0.001 10 0.01 Load Current (A) VOUT1 Output Efficiency vs. Load Current 100 90 90 Ultrasonic Mode 60 50 Efficiency (%) Efficiency (%) 80 DEM Mode 70 PWM Mode 40 30 20 DEM Mode 70 Ultrasonic Mode 60 50 PWM Mode 40 30 0.01 0.1 1 VIN = 12V, TONSEL = GND, EN = VIN, ENTRIP1 = GND, ENTRIP2 = 0.91V, 10 0 0.001 10 0.01 Load Current (A) VOUT1 Output Efficiency vs. Load Current 90 90 70 Efficiency (%) Efficiency (%) 80 DEM Mode Ultrasonic Mode 50 PWM Mode 40 30 20 0 0.001 70 0.01 0.1 1 Load Current (A) Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 10 DEM Mode 60 Ultrasonic Mode 50 40 PWM Mode 30 20 VIN = 20V, TONSEL = GND, EN = VIN, ENTRIP1 = 0.91V, ENTRIP2 = GND 10 1 VOUT2 Output Efficiency vs. Load Current 100 60 0.1 Load Current (A) 100 80 10 20 VIN = 12V, TONSEL = GND, EN = VIN, ENTRIP1 = 0.91V, ENTRIP2 = GND 10 0 0.001 1 VOUT2 Output Efficiency vs. Load Current 100 80 0.1 Load Current (A) 10 VIN = 20V TONSEL = GND, EN = VIN, ENTRIP1 = GND, ENTRIP2 = 0.91V 10 0 0.001 0.01 0.1 1 10 Load Current (A) is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 RT8205A/B/C VOUT1 Output Switching Frequency vs. Load Current 225 300 VIN = 8V, TONSEL = GND, EN = VIN, ENTRIP1 = 0.91V, ENTRIP2 = GND 275 200 PWM Mode 175 150 125 100 75 50 Ultrasonic Mode 25 VOUT2 Output Switching Frequency vs. Load Current Switching Frequency (kHz) Switching Frequency (kHz) 250 0.01 250 PWM Mode 225 200 175 150 125 100 75 Ultrasonic Mode 50 25 DEM Mode 0 0.001 VIN = 8V, TONSEL = GND, EN = VIN, ENTRIP1 = GND, ENTRIP2 = 0.91V 0.1 1 DEM Mode 0 0.001 10 0.01 Load Current (A) 300 VIN = 12V, TONSEL = GND, EN = VIN, ENTRIP1 = 0.91V, ENTRIP2 = GND 275 200 PWM Mode 175 150 125 100 75 50 Ultrasonic Mode 25 0 0.001 0.1 250 VIN = 12V, TONSEL = GND, EN = VIN, ENTRIP1 = GND, ENTRIP2 = 0.91V PWM Mode 225 200 175 150 125 100 75 Ultrasonic Mode 50 25 DEM Mode 0.01 1 0 0.001 10 DEM Mode 0.01 VOUT1 Output Switching Frequency vs. Load Current 300 VIN = 20V, TONSEL = GND, EN = VIN, ENTRIP1 = 0.91V, ENTRIP2 = GND 275 200 175 PWM Mode 150 125 100 75 50 Ultrasonic Mode 25 0 0.001 0.1 1 Load Current (A) Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 10 250 VIN = 20V, TONSEL = GND, EN = VIN, ENTRIP1 = GND, ENTRIP2 = 0.91V 225 PWM Mode 200 175 150 125 100 75 50 Ultrasonic Mode 25 DEM Mode 0.01 1 VOUT2 Output Switching Frequency vs. Load Current Switching Frequency (kHz) Switching Frequency (kHz) 225 0.1 Load Current (A) Load Current (A) 250 10 VOUT2 Output Switching Frequency vs. Load Current Switching Frequency (kHz) Switching Frequency (kHz) 225 1 Load Current (A) VOUT1 Output Switching Frequency vs. Load Current 250 0.1 10 0 0.001 DEM Mode 0.01 0.1 1 10 Load Current (A) is a registered trademark of Richtek Technology Corporation. DS8205A/B/C-06 July 2012 RT8205A/B/C VOUT1 Output Voltage vs. Load Current 5.114 VIN = 12V, TONSEL = GND, EN = VIN, ENTRIP1 = 0.91V, ENTRIP2 = GND Ultrasonic Mode 5.108 5.102 5.096 5.090 DEM Mode 5.084 5.078 5.072 5.066 PWM Mode 5.060 VIN = 12V, TONSEL = GND, EN = VIN, ENTRIP1 = GND, ENTRIP2 = 0.91V 3.372 3.366 Output Voltage (V) Output Voltage (V) VOUT2 Output Voltage vs. Load Current 3.378 Ultrasonic Mode 3.360 3.354 DEM Mode 3.348 3.342 PWM Mode 3.336 3.330 5.054 5.048 0.001 0.01 0.1 1 3.324 0.001 10 0.01 0.1 Load Current (A) 4.978 3.324 VIN = 12V, TONSEL = GND, EN = VIN, ENTRIP1 = ENTRIP2 = GND 3.322 VIN = 12V, TONSEL = GND, EN = VIN, ENTRIP1 = ENTRIP2 = GND 3.320 Output Voltage (V) Output Voltage (V) 4.976 4.974 4.972 4.970 4.968 4.966 3.318 3.316 3.314 3.312 4.964 3.310 4.962 3.308 3.306 4.960 0 10 20 30 40 50 60 0 70 10 20 VREF vs. Output Current 2.0028 Battery Current (mA) VREF (V) 2.0024 2.0022 2.0020 2.0018 2.0016 2.0014 2.0010 30 40 Output Current (μA) Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 70 10 Ultrasonic Mode 1 DEM Mode No Load, TONSEL = GND, EN = VIN, ENTRIP1 = ENTRIP2 = 0.91V 0.1 20 60 PWM Mode 2.0012 10 50 Battery Current vs. Input Voltage 2.0026 0 40 100 VIN = 12V, TONSEL = GND, EN = VIN, ENTRIP1 = ENTRIP2 = GND -10 30 Output Current (mA) Output Current (mA) 2.0030 10 VREG3 Output Voltage vs. Output Current VREG5 Output Voltage vs. Output Current 4.980 1 Load Current (A) 50 7 9 11 13 15 17 19 21 23 25 Input Voltage (V) is a registered trademark of Richtek Technology Corporation. www.richtek.com 15 RT8205A/B/C Standby Input Current vs. Input Voltage Shutdown Input Current vs. Input Voltage 22 No Load, EN = VIN, ENTRIP1 = ENTRIP2 = GND Shutdown Input Current (μA) Standby Input Current (μA) 252 250 248 246 244 242 No Load, EN = GND, ENTRIP1 = ENTRIP2 = GND 20 18 16 14 12 10 240 8 7 9 11 13 15 17 19 21 23 25 7 9 11 13 15 17 19 Input Voltage (V) Input Voltage (V) VREF vs. Temperature Start Up 21 23 25 2.011 2.008 VREG5 (5V/Div) VREF (V) 2.005 VREG3 (5V/Div) 2.002 REF (5V/Div) 1.999 1.996 1.993 EN (10V/Div) VIN = 12V, ENTRIP1 = ENTRIP2 = GND, EN = VIN, TONSEL = GND No Load, VIN = 12V, TONSEL = GND, EN = VIN, ENTRIP1 = ENTRIP2 = GND 1.990 -40 -25 -10 5 20 35 50 65 80 Time (400μs/Div) 95 110 125 Temperature (°C) CP Start Up VOUT1 Start Up No Load, VIN = 12V, TONSEL = GND, EN = VIN No Load, VIN = 12V, TONSEL = GND, EN = VIN VOUT1 (5V/Div) VOUT1 (5V/Div) CP (5V/Div) Inductor Current (2A/Div) UGATE1 (20V/Div) LGATE1 (5V/Div) ENTRIP1 (2V/Div) ENTRIP1 = ENTRIP2 = 0.91V, SKIPSEL = REF Time (400μs/Div) Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 16 PGOOD (10V/Div) ENTRIP1 = ENTRIP2 = 0.91V Time (400μs/Div) is a registered trademark of Richtek Technology Corporation. DS8205A/B/C-06 July 2012 RT8205A/B/C VOUT2 Start Up VOUT1 Start Up No Load, VIN = 12V, TONSEL = GND, EN = VIN Heavy Load, VIN = 12V, TONSEL = GND, EN = VIN VOUT2 (5V/Div) VOUT1 (5V/Div) Inductor Current (2A/Div) Inductor Current (2A/Div) ENTRIP2 (2V/Div) ENTRIP1 (2V/Div) PGOOD (10V/Div) ENTRIP1 = NTRIP2 = 0.91V, IOUT1 = 4A PGOOD (10V/Div) Time (400μs/Div) Time (400μs/Div) VOUT2 Start Up VOUT1 Delay Start No Load, VIN = 12V, TONSEL = GND, EN = VIN Heavy Load, VIN = 12V, TONSEL = GND, EN = VIN VOUT2 (5V/Div) VOUT1 (5V/Div) Inductor Current (2A/Div) VOUT2 (5V/Div) ENTRIP1 (1V/Div) ENTRIP2 (2V/Div) PGOOD (10V/Div) ENTRIP1 = ENTRIP2 = 0.91V ENTRIP1 = ENTRIP2 = 0.91V ENTRIP2 (1V/Div) Time (400μs/Div) Time (400μs/Div) VOUT2 Delay Start VOUT1 PWM Mode Load Transient Response No Load, VIN = 12V, TONSEL = GND, EN = VIN VIN = 12V, TONSEL = GND, EN = VIN, SKIPSEL = GND, IOUT1 = 0A to 6A VOUT1 (5V/Div) VOUT1_ac (50mV/Div) VOUT2 (5V/Div) Inductor Current (5A/Div) ENTRIP1 (1V/Div) UGATE1 (20V/Div) ENTRIP2 (1V/Div) LGATE1 (10V/Div) Time (400μs/Div) Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 Time (20μs/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 17 RT8205A/B/C Power Off from ENTRIP1 VOUT2 PWM Mode Load Transient Response VIN = 12V, TONSEL = GND, EN = VIN, SKIPSEL = GND, IOUT2 = 0A to 6A VOUT2_ac (50mV/Div) VOUT1 (5V/Div) UGATE1 (20V/Div) Inductor Current (5A/Div) LGATE1 (5V/Div) UGATE2 (20V/Div) LGATE2 (10V/Div) ENTRIP1 (1V/Div) Time (20μs/Div) Time (40ms/Div) OVP UVP No Load, VIN = 12V, TONSEL = GND, EN = VIN SKIPSEL = REF VOUT1 (5V/Div) VOUT1 (5V/Div) VIN = 12V, TONSEL = GND, EN = VIN SKIPSEL = GND Inductor Current (5A/Div) VOUT2 (2V/Div) UGATE1 (20V/Div) PGOOD (5V/Div) LGATE1 (10V/Div) Time (4ms/Div) Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 18 No Load, VIN = 12V, TONSEL = GND, EN = VIN SKIPSEL = GND Time (20μs/Div) is a registered trademark of Richtek Technology Corporation. DS8205A/B/C-06 July 2012 RT8205A/B/C Application Information The RT8205A/B/C is a dual, Mach ResponseTM DRVTM dual ramp valley mode synchronous buck controller. The controller is designed for low-voltage power supplies for notebook computers. Richtek's Mach Response TM technology is specifically designed for providing 100ns “instant-on” response to load steps while maintaining a relatively constant operating frequency and inductor operating point over a wide range of input voltages. The topology circumvents the poor load-transient timing problems of fixed-frequency current-mode PWMs while avoiding the problems caused by widely varying switching frequencies in conventional constant-on-time and constantoff-time PWM schemes. The DRV TM mode PWM modulator is specifically designed to have better noise immunity for such a dual output application. The RT8205A/ B/C includes 5V (VREG5) and 3.3V (VREG3) linear regulators. VREG5 linear regulator can step down the battery voltage to supply both internal circuitry and gate drivers. The synchronous-switch gate drivers are directly powered from VREG5. When VOUT1 voltage is above 4.66V, an automatic circuit will switch the power of the device from VREG5 linear regulator from VOUT1. PWM Operation The Mach ResponseTM DRVTM mode controller relies on the output filter capacitor's effective series resistance (ESR) to act as a current-sense resistor, so the output ripple voltage provides the PWM ramp signal. Refer to the RT8205A/B/C's function block diagram, the synchronous high-side MOSFET will be turned on at the beginning of each cycle. After the internal one-shot timer expires, the MOSFET will be turned off. The pulse width of this one shot is determined by the converter's input voltage and the output voltage to keep the frequency fairly constant over the input voltage range. Another one-shot sets a minimum off-time (300ns typ.). The on-time one-shot will be triggered if the error comparator is high, the low-side switch current is below the current-limit threshold, and the minimum off-time one-shot has timed out. PWM Frequency and On-Time Control The Mach ResponseTM control architecture runs with pseudo-constant frequency by feed-forwarding the input Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 and output voltage into the on-time one-shot timer. The high-side switch on-time is inversely proportional to the input voltage as measured by the VIN, and proportional to the output voltage. There are two benefits of a constant switching frequency. The first is the frequency can be selected to avoid noise-sensitive regions such as the 455kHz IF band. The second is the inductor ripple-current operating point remains relatively constant, resulting in easy design methodology and predictable output voltage ripple. The frequency for 3V SMPS is set at 1.25 times higher than the frequency for 5V SMPS. This is done to prevent audio-frequency “beating” between the two sides, which switch asynchronously for each side. The frequencies are set by TONSEL pin connection as Table1. The on-time is given by : On-Time = K x (VOUT / VIN) where “K” is set by the TONSEL pin connection (Table 1). The on-time guaranteed in the Electrical Characteristics tables are influenced by switching delays in the external high-side power MOSFET. Two external factors that influence switching-frequency accuracy are resistive drops in the two conduction loops (including inductor and PC board resistance) and the dead-time effect. These effects are the largest contributors to the change of frequency with changing load current. The dead-time effect increases the effective on-time, reducing the switching frequency as one or both dead times. It occurs only in PWM mode (SKIPSEL= GND) when the inductor current reverses at light or negative load currents. With reversed inductor current, the inductor's EMF causes PHASEx to go high earlier than normal, extending the on-time by a period equal to the low-to-high dead time. For loads above the critical conduction point, the actual switching frequency is : f = (VOUT + VDROP1) / (tON x (VIN + VDROP1 -VDROP2) ) where VDROP1 is the sum of the parasitic voltage drops in the inductor discharge path, including synchronous rectifier, inductor, and PC board resistances; VDROP2 is the sum of the resistances in the charging path; and tON is the on-time calculated by the RT8205A/B/C. is a registered trademark of Richtek Technology Corporation. www.richtek.com 19 RT8205A/B/C Table 1. TONSEL Connection and Switching Frequency SMPS 1 SMPS 1 SMPS 2 TON K-Factor Frequency K-Factor (μs) (kHz) (μs) GND 5 200 4 REF 3.33 300 2.67 VREG5 or 2.5 400 2 VREG3 TON GND REF VREG5 or VREG3 SMPS 2 Approximate Frequency (kHz) K-Factor Error (%) 250 ±10 375 ±10 500 ±10 Operation Mode Selection (SKIPSEL) The RT8205A/B/C supports three operation modes : DiodeEmulation Mode, Ultrasonic Mode, and Forced-CCM Mode. Diode-Emulation Mode (SKIPSEL = REF) In Diode-Emulation mode, The RT8205A/B/C automatically reduces switching frequency at light-load conditions to maintain high efficiency. This reduction of frequency is achieved smoothly and without increase of VOUT ripple or load regulation. As the output current decreases from heavy-load condition, the inductor current is also reduced, and eventually comes to the point that its valley touches zero current, which is the boundary between continuous conduction and discontinuous conduction modes. By emulating the behavior of diodes, the low-side MOSFET allows only partial of negative current when the inductor free-wheeling current reach negative. As the load current is further decreased, it takes longer and longer to discharge the output capacitor to the level that requires the next “ON” cycle. The on-time is kept the same as that in the heavy-load condition. In reverse, when the output current increases from light load to heavy load, the switching frequency increases to the preset value as the inductor current reaches the continuous conduction. The transition load point to the light-load operation can be calculated as follows (Figure 1) : (VIN − VOUT ) ILOAD(SKIP) ≈ × TON 2L where Ton is the On-time. Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 20 IL Slope = (VIN -VOUT) / L iL, peak iLoad = iL, peak / 2 0 t tON Figure 1. Boundary condition of CCM/DCM The switching waveforms may appear noisy and asynchronous when light loading causes Diode-Emulation operation, but this is a normal operating condition that results in high light-load efficiency. Trade-offs in PFM noise vs. light-load efficiency are made by varying the inductor value. Generally, low inductor values produce a broader efficiency vs. load curve, while higher values result in higher full-load efficiency (assuming that the coil resistance remains fixed) and less output voltage ripple. Penalties for using higher inductor values include larger physical size and degraded load-transient response (especially at low input-voltage levels). Ultrasonic Mode (SKIPSEL = VREG5 or VREG3) Connecting SKIPSEL to VREG5 or VREG3 activates a unique Diode-Emulation mode with a minimum switching frequency of 25kHz. This ultrasonic mode eliminates audio-frequency modulation that would otherwise be present when a lightly loaded controller automatically skips pulses. In ultrasonic mode, the low-side switch gatedriver signal is OR with an internal oscillator (>25kHz). Once the internal oscillator is triggered, the ultrasonic controller pulls LGATEx high, turning on the low-side MOSFET to induce a negative inductor current. After the output voltage across the REF, the controller turns off the low-side MOSFET (LGATEx pulled low) and triggers a constant on-time (UGATEx driven high). When the ontime has expired, the controller re-enables the low-side MOSFET until the controller detects that the inductor current dropped below the zero-crossing threshold. Forced-CCM Mode (SKIPSEL = GND) The low-noise, forced-CCM mode (SKIPSEL = GND) disables the zero-crossing comparator, which controls the low-side switch on-time. This causes the low-side gateis a registered trademark of Richtek Technology Corporation. DS8205A/B/C-06 July 2012 RT8205A/B/C driver waveform to become the complement of the highside gate-driver waveform. This in turn causes the inductor current to reverse at light loads as the PWM loop to maintain a duty ratio of VOUT/VIN. The benefit of forcedCCM mode is to keep the switching frequency fairly constant, but it comes at a cost : The no-load battery current can be 10mA to 40mA, depending on the external MOSFETs. characteristic and maximum load capability are a function of the sense resistance, inductor value, and battery and output voltage. IL IL, peak ILoad ILIM Reference and linear Regulators (REF, VREGx) The 2V reference (REF) is accurate within ±1% over temperature, making REF useful as a precision system reference. Bypass REF to GND with a 0.22uF (min) capacitor. REF can supply up to 50uA for external loads. Loading REF reduces the VOUTx output voltage slightly because of the reference load-regulation error. VREG5 regulator supplies total of 70mA for internal and external loads, including MOSFET gate driver and PWM controller. VREG3 regulator supplies up to 70mA for external loads. Bypass VREG5 and VREG3 with a 4.7uF (min) capacitor; use an additional 1uF per 5mA of internal and external load. When the 5V main output voltage is above the VREG5 switchover threshold, an internal 1.5Ω N-Channel MOSFET switch connects VOUT1 to VREG5 while simultaneously shutting down the VREG5 linear regulator. Similarly, when the 3.3V main output voltage is above the VREG3 switchover threshold, an internal 1.5Ω N-Channel MOSFET switch connects VOUT2 to VREG3 while simultaneously shutting down the VREG3 linear regulator. It can decrease the power dissipation from the same battery, because the converted efficiency of SMPS is better than the converted efficiency of linear regulator. t 0 Figure 2. “valley” Current-Limit The RT8205A/B/C uses the on-resistance of the synchronous rectifier as the current-sense element. Use the worse-case maximum value for RDS(ON) from the MOSFET datasheet, and add a margin of 0.5%/°C for the rise in RDS(ON) with temperature. The RILIM resistor between the ENTRIPx pin and GND sets the over current threshold. The resistor RILIM is connected to a 10uA current source from ENTRIPx. When the voltage drop across the sense resistor or low-side MOSFET equals 1/10 the voltage across the RILIM resistor, positive current limit will be activated. The high-side MOSFET will not be turned on until the voltage drop across the MOSFET falls below 1/10 the voltage across the RILIM resistor. Choose a current limit resistor by following equation : VILIM = (RILIM x 10uA) / 10 = IILIM x RDS(ON) RILIM = (IILIM x RDS(ON)) x 10 / 10uA Carefully observe the PC board layout guidelines to ensure that noise and DC errors do not corrupt the current-sense signal at PHASEx and GND. Mount or place the IC close to the low-side MOSFET. Current-Limit Setting (ENTRIPx) Charge Pump (LG1_CP or SECFB) The RT8205A/B/C has cycle-by-cycle current limiting control. The current-limit circuit employs a unique “valley” current sensing algorithm. If the magnitude of the currentsense signal at PHASEx is above the current-limit threshold, the PWM is not allowed to initiate a new cycle (Figure 2). The actual peak current is greater than the current-limit threshold by an amount equal to the inductor ripple current. Therefore, the exact current-limit The external 14V charge pump is driven by LGATE1 (Figure 3 and Figure 4). When LGATE1 is low, the C1 will be charged by D1 from VOUT1. C1 voltage is equal to VOUT1 minus a diode drop. When LGATE1 transitions to high, the charges from C1 will transfer to C2 through D2 and charge it to VLGATE1 plus VC1. As LGATE1 transitions low on the next cycle, C2 will charge C3 to its voltage minus a diode drop through D3. Finally, C3 charges C4 through Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 21 RT8205A/B/C D4 when LGATE1 switched to high. So, VCP voltage is : MOSFET Gate Driver (UGATEx, LGATEx) VCP = VOUT1 + 2 x VLGATE1 − 4 x VD The high-side driver is designed to drive high-current, low RDS(ON) N-MOSFET(s). When configured as a floating driver, 5-V bias voltage is delivered from VREG5 supply. The average drive current is also calculated by the gate charge at VGS = 5 V times switching frequency. The instantaneous drive current is supplied by the flying capacitor between BOOTx and PHASEx pins. A dead time to prevent shoot through is internally generated between high-side MOSFET off to low-side MOSFET on, and low-side MOSFET off to high-side MOSFET on. Where VLGATE1 is the peak voltage of LGATE1 driver and is equal to the VREG5; VD is the forward diode dropped across the Schottky. LG1_CP in the RT8205B (Figure 3) can be used as clock signal for charge pump circuit to generate approximately 14V DC voltage and the clock driver uses VOUT1 as its power supply, SECFB in the RT8205C is used to monitor the charge pump through resistive divider (Figure 4). In an event when SECFB dropped below 2V, the detection circuit forces the high-side MOSFET off and the low-side MOSFET on for 300ns to allow CP to recharge and SECFB rise above 2V. In the event of an overload on CP where SECFB can not reach more than 2V, the monitor will be cancelled. Special care should be taken to ensure enough normal voltage ripple on each cycle as to prevent CP shutdown. The SECFB pin has ~17mV of hysteresis, so the ripple should be enough to bring the SECFB voltage above the threshold by ~3x the hysteresis, or (2V + 3 x 17mV) = 2.051V. Reducing the CP decoupling capacitor and placing a small ceramic capacitor (10 pF to 47pF) (CF of Figure 4) in parallel with the upper leg of the SECFB resistor feedback network (RCP1 of Figure 4) will also increase the robustness of the charge pump. The low-side driver is designed to drive high current low RDS(ON) N-MOSFET(s). The internal pull-down transistor that drives LGATEx low is robust, with a 0.6Ω typical onresistance. A 5V bias voltage is delivered from VREG5 supply. The instantaneous drive current is supplied by an input capacitor connected between VREG5 and GND. For high-current applications, some combinations of highand low-side MOSFETs might be encountered that will cause excessive gate-drain coupling, which can lead to efficiency-killing, EMI-producing shoot-through currents. This is often remedied by adding a resistor in series with BOOTx, which increases the turn-on time of the high-side MOSFET without degrading the turn-off time (Figure 5). V IN BOOTx LG1_CP CP C3 C1 D2 PHASEx C4 C2 D1 UGATEx D4 D3 10 V OUT1 Figure 5. Reducing the UGATEx Rise Time Figure 3. Connect to LG1_CP Soft-Start SECFB R CP2 LGATE1 CF C3 C1 D2 D1 D3 R CP1 D4 C2 CP C4 A build-in soft-start is used to prevent surge current from power supply input after ENTRIPx is enabled. The typical soft-start duration is 2ms period. Furthermore, the maximum allowed current limit is segmented in 5 steps: 20%, 40%, 60%, 80% and 100% during the 2ms period. V OUT1 Figure 4. Connect to SECFB Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 22 is a registered trademark of Richtek Technology Corporation. DS8205A/B/C-06 July 2012 RT8205A/B/C UVLO Protection The RT8205A/B/C has VREG5 under voltage lock out protection (UVLO). When the VREG5 voltage is lower than 4.2V (typ.) and the VREG3 voltage is lower than 2.5V (typ.), both switch power supplies are also shut off. This is non-latch protection. Power-Good Output (PGOOD) The PGOOD is an open-drain type output and requires a pull-up resistor. PGOOD is actively held low in soft-start, standby, and shutdown. It is released when both outputs voltage above than 92.5% of nominal regulation point. The PGOOD goes low if either output turns off or is 10% below its nominal regulator point. LGATEx gate drivers are forced low while entering softdischarge mode. During soft-start, the UVP will be blanked around 3ms. Thermal Protection The RT8205A/B/C have thermal shutdown to prevent the overheat damage. Thermal shutdown occurs when the die temperature exceeds +150°C. All internal circuitry shuts down during thermal shutdown. The RT8205A/B/C triggers thermal shutdown if VREGx is not supplied from VOUTx, while input voltage on VIN and drawing current form VREGx are too high. Even if VREGx is supplied from VOUTx, overloading the VREGx causes large power dissipation on automatic switches, which may result in thermal shutdown. Output Over Voltage Protection (OVP) The output voltage can be continuously monitored for over voltage. When over voltage protection is enabled, if the output voltage exceeded 11% of its set voltage threshold, the over voltage protection is triggered and the LGATEx low-side gate drivers are forced high. This activates the low-side MOSFET switch, which rapidly discharges the output capacitor and pulls the input voltage downward. RT8205A/B/C is latched once OVP is triggered and can only be released by EN power-on reset. There is 10us delay built into the over voltage protection circuit to prevent false transition. Note that LGATEx latching high causes the output voltage to dip slightly negative when energy has been previously stored in the LC tank circuit. For loads that cannot tolerate a negative voltage, place a power Schottky diode across the output to act as a reverse polarity clamp. If the over voltage condition is caused by a short in highside switch, turning the low-side MOSFET on 100% creates an electrical short between the battery and GND, blowing the fuse and disconnecting the battery from the output. Output Under voltage Protection (UVP) The output voltage can be continuously monitored for under voltage. When under voltage protection is enabled, if the output is less than 70% of its set voltage threshold, under voltage protection is triggered, then both UGATEx and Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 Discharge Mode (Soft-Discharge) When ENTRIPx is low and a transition to standby or shutdown mode occurs, or the output under voltage fault latch is set, the outputs discharge mode will be triggered. During discharge mode, there is one path to discharge the outputs capacitor residual charge. That is output capacitor discharge to GND through an internal switch. Shutdown Mode The RT8205A/B/C SMPS1, SMPS2, VREG3 and VREG5 have independent enabling control. Drive EN, ENTRIP1 and ENTRIP2 below the precise input falling-edge trip level to place the RT8205A/B/C in its low-power shutdown state. The RT8205A/B/C consumes only 20uA of input current while in shutdown. Power-Up Sequencing and On/Off Controls (ENTRIPx) ENTRIP1 and ENTRIP2 control SMPS power-up sequencing. When the RT8205A/B/C applies in the single channel mode, ENTRIP1 or ENTRIP2 enables the respective outputs when ENTRIPx voltage rising above 0.4V. If both of ENTRIP1 and ENTRIP2 become higher than the enable threshold voltage at a different time (without 60us), one can force the latter one output starts after the former one regulates. is a registered trademark of Richtek Technology Corporation. www.richtek.com 23 RT8205A/B/C Output Voltage Setting (FBx) Connect FBx directly to GND or VREG5 to enable the fixed, SMPS output voltages (3.3V and 5V). Connect a resistor voltage-divider at the FBx between the VOUTx and GND to adjust the respective output voltage between 2V and 5.5V (Figure 6). Choose R2 to be approximately 10kΩ, and solve for R1 using the equation : ⎡ ⎤ VOUTx = VFBx × ⎢1 + ⎛⎜ R1 ⎞⎟ ⎥ R2 ⎠⎦ ⎣ ⎝ where VFBx is 2V (typ.). VREG5 connects to VOUT1 through an internal switch only when VOUT1 is above the VREG5 automatic switch threshold (4.66V). VREG3 connects to VOUT2 through an internal switch only when VOUT2 is above the VREG3 automatic switch threshold (3.06V). This is the most effective way when the fixed output voltages are used. Once VREGx is supplied from VOUTx, the internal linear regulator turns off. This reduces internal power dissipation and improves efficiency when the VREGx is powered with a high input voltage. VIN VOUTx UGATEx Find a low-loss inductor having the lowest possible DC resistance that fits in the allotted dimensions. Ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200kHz. The core must be large enough not to saturate at the peak inductor current (IPEAK) : IPEAK = ILOAD(MAX) + [(LIR / 2) x ILOAD(MAX)] This inductor ripple current also impacts transient-response performance, especially at low VIN − VOUTx differences. Low inductor values allow the inductor current to slew faster, replenishing charge removed from the output filter capacitors by a sudden load step. The peak amplitude of the output transient VSAG is also a function of the output transient. The VSAG also features a function of the maximum duty factor, which can be calculated from the on-time and minimum off-time : VSAG V (ΔILOAD )2 × L × ⎛⎜ K OUTx + TOFF(MIN) ⎞⎟ VIN ⎝ ⎠ = ⎡ ⎛ VIN − VOUTx ⎞ ⎤ 2 × COUT × VOUTx × ⎢K ⎜ ⎟ − TOFF(MIN) ⎥ V IN ⎝ ⎠ ⎣ ⎦ Where minimum off-time (TOFF(MIN)) = 300ns (typ.) and K is from Table 1. PHASEx LGATEx VOUTx FBx PGND R1 R2 GND Figure 6. Setting VOUTx with a Resistor-Divider Output Inductor Selection The switching frequency (on-time) and operating point (% ripple or LIR) determine the inductor value as shown as follows : L= TON × (VIN − VOUTx ) LIR × ILOAD(MAX) Output Capacitor Selection The output filter capacitor must have low enough ESR to meet output ripple and load-transient requirements, yet have high enough ESR to satisfy stability requirements. Also, the capacitance value must be high enough to absorb the inductor energy going from a full-load to noload condition without tripping the OVP circuit. For CPU core voltage converters and other applications where the output is subject to violent load transients, the output capacitor's size depends on how much ESR is needed to prevent the output from dipping too low under a load transient. Ignoring the sag due to finite capacitance : ESR ≤ VP-P ILOAD(MAX) where LIR is the ratio of the peak to peak ripple current to the average inductor current. Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 24 is a registered trademark of Richtek Technology Corporation. DS8205A/B/C-06 July 2012 RT8205A/B/C In non-CPU applications, the output capacitor's size depends on how much ESR is needed to maintain an acceptable level of output voltage ripple : VP-P ESR ≤ LIR × ILOAD(MAX) where VP-P is the peak-to-peak output voltage ripple. Organic semiconductor capacitor(s) or specialty polymer capacitor(s) are recommended. For low input-to-output voltage differentials (VIN / VOUTx < 2), additional output capacitance is required to maintain stability and good efficiency in ultrasonic mode. The amount of overshoot due to stored inductor energy can be calculated as : VSOAR ≤ (IPEAK )2 × L 2 × COUT × VOUTx where IPEAK is the peak inductor current. TM TM Although Mach Response DRV dual ramp valley mode provides many advantages such as ease-of-use, minimum external component configuration, and extremely short response time, due to not employing an error amplifier in the loop, a sufficient feedback signal needs to be provided by an external circuit to reduce the jitter level. The required signal level is approximately 15mV at the comparing point. This generates VRipple = (VOUT / 2) x 15mV at the output node. The output capacitor ESR should meet this requirement. Output Capacitor Stability Stability is determined by the value of the ESR zero relative to the switching frequency. The point of instability is given by the following equation : fESR = f 1 ≤ SW 2 × π × ESR × COUT 4 Do not put high-value ceramic capacitors directly across the outputs without taking precautions to ensure stability. Large ceramic capacitors can have a high- ESR zero frequency and cause erratic, unstable operation. However, it is easy to add enough series resistance by placing the capacitors a couple of inches downstream from the inductor and connecting VOUTx or the FBx divider close to the inductor. Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 Unstable operation manifests itself in two related and distinctly different ways: double-pulsing and feedback loop instability. Double-pulsing occurs due to noise on the output or because the ESR is so low that there is not enough voltage ramp in the output voltage signal. This “fools” the error comparator into triggering a new cycle immediately after the 300ns minimum off-time period has expired. Doublepulsing is more annoying than harmful, resulting in nothing worse than increased output ripple. However, it may indicate the possible presence of loop instability, which is caused by insufficient ESR. Loop instability can result in oscillations at the output after line or load perturbations that can trip the overvoltage protection latch or cause the output voltage to fall below the tolerance limit. The easiest method for checking stability is to apply a very fast zero-to-max load transient and carefully observe the output-voltage-ripple envelope for overshoot and ringing. It helps to simultaneously monitor the inductor current with an AC current probe. Do not allow more than one cycle of ringing after the initial step-response under- or overshoot. Thermal Considerations For continuous operation, do not exceed absolute maximum operation junction temperature. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) - TA ) / θJA Where T J(MAX) is the maximum operation junction temperature, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification, the maximum junction temperature is 125°C. The junction to ambient thermal resistance θJA is layout dependent. For WQFN-24L 4x4 packages, the thermal resistance θJA is 52°C/W on the standard JEDEC 51-7 four layers thermal is a registered trademark of Richtek Technology Corporation. www.richtek.com 25 RT8205A/B/C test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : PD(MAX) = (125°C − 25°C) / (52°C/W) = 1.923W for WQFN-24L 4x4 packages The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA. The Figure 7 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. Maximum Power Dissipation (W) 2.0 Layout Considerations Layout is very important in high frequency switching converter design. If the IC is designed improperly, the PCB could radiate excessive noise and contribute to the converter instability. Certain points must be considered before starting a layout using the RT8205A/B/C. ` Place the filter capacitor close to the IC, within 12 mm (0.5 inch) if possible. ` Keep current limit setting network as close as possible to the IC. Routing of the network should avoid coupling to high-voltage switching node. ` Connections from the drivers to the respective gate of the high-side or the low-side MOSFET should be as short as possible to reduce stray inductance. Use 0.65mm (25 mils) or wider trace. ` All sensitive analog traces and components such as VOUTx, FBx, GND, ENTRIPx, PGOOD, and TONSEL should be placed away from high-voltage switching nodes such as PHASEx, LGATEx, UGATEx, or BOOTx nodes to avoid coupling. Use internal layer(s) as ground plane(s) and shield the feedback trace from power traces and components. ` Gather ground terminal of VIN capacitor(s), VOUTx capacitor(s), and source of low-side MOSFETs as close as possible. PCB trace defined as PHASEx node, which connects to source of high-side MOSFET, drain of lowside MOSFET and high-voltage side of the inductor, should be as short and wide as possible. Four Layers PCB 1.8 1.6 1.4 WQFN-24L 4x4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 7. Derating Curve of Maximum Power Dissipation Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 26 is a registered trademark of Richtek Technology Corporation. DS8205A/B/C-06 July 2012 RT8205A/B/C Table 2. Operation Mode Truth Table Mode Condition Power-UP VREGx < UVLO threshold RUN Over Voltage Protection Under Voltage Protection Comment Transitions to discharge mode after a VIN POR and after REF becomes valid. VREG5, VREG3, and REF remain active. EN = high, VOUT1 or VOUT2 enabled Normal Operation. Either output > 111% of the nominal level. LGATEx is forced high. VREG3, VREG5 active. Exited by VIN POR or by toggling EN, ENT RIPx Either output < 70% of the nominal level after 3ms time-out expires and output is enabled Either SMPS output is still high in Discharge either standby mode or shutdown mode ENTRIPx < startup threshold, Standby EN = high. Shutdown EN = low Thermal TJ > +150°C Shutdown EN (V) Low ENTRIP1 (V) X “>1V” => High Low “>1V” => High Low “>1V” => High High (after ENTRIP2 is high without 60us) “>1V” => High High “>1V” => High High “>1V” => High High VREG3, VREG5 active. All circuitry off. All circuitry off. Exit by VIN POR or by toggling EN, ENTRIPx. Table 3. Power-Up Sequencing ENTRIP2 VREG5 VREG3 (V) X Off Off On On Low (after REF (after REF powers up) powers up) On On High (after REF (after REF powers up) powers up) On On High (after REF (after REF powers up) powers up) On On Low (after REF (after REF powers up) powers up) On On High (after ENTRIP1 (after REF (after REF is high without 60us) powers up) powers up) On On High (after REF (after REF powers up) powers up) Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8205A/B/C-06 July 2012 Both UGATEx and LGATEx are forced low and enter discharge mode. VREG3, VREG5 active. Exited by VIN POR or by toggling EN, ENTRIPx During discharge mode, there is one path to discharge the outputs capacitor residual charge. That is output capacitor discharge to GND through an internal switch. SMPS1 SMPS2 Off Off Off Off Off On On (after SMPS2 on) On On Off ON On (after SMPS1 on) On On is a registered trademark of Richtek Technology Corporation. www.richtek.com 27 RT8205A/B/C Outline Dimension D2 D SEE DETAIL A L 1 E E2 e b A3 Symbol 2 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 3.950 4.050 0.156 0.159 D2 2.300 2.750 0.091 0.108 E 3.950 4.050 0.156 0.159 E2 2.300 2.750 0.091 0.108 e L 1 2 DETAIL A Pin #1 ID and Tie Bar Mark Options A A1 1 0.500 0.350 0.020 0.450 0.014 0.018 W-Type 24L QFN 4x4 Package Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com 28 DS8205A/B/C-06 July 2012