Ordering number : ENA2153 CMOS LSI LC75106V Digital Echo LSI with Built-in Mic Amplifier Overview The LC75106V is a digital echo LSI for karaoke. It has the microcomputer control mode (I2C BUS control) and noncontrol mode. Therefore, various karaoke systems can be made. This LSI has 2ch mic amplifier (with ALC), volume of 2ch mic, echo feed back volume and echo volume. In addition, when the stereo signal internal connected mode has the function of the vocal cancellation etc. The karaoke system can be constructed with this LSI. Functions • 2ch mic amplifier (with built-in Auto Level Control) • Volume of 2ch mic • With built-in for digital echo memory 32kbit • Feedback volume for digital echo • Digital echo volume • Mic mixing function • Vocal cancellation • With built-in oscillation circuit • I2C bus control Application • Mini component audio and other * I2C Bus is a trademark of Philips Corporation. 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N1412HKPC 20121030-S00001 No. A2153-1/15 LC75106V Specifications Absolute Maximum Ratings at Ta = 25°C, Analog GND = 0V Parameter Symbol Conditions Maximum power supply voltage VDD max VDD Allowable consumption power Pd max Ta ≤ 70°C * Operating temperature range Ta Storage temperature range Tstg Ratings unit +8.0 to +10.0 500 V mW -20 to +70 °C -40 to +125 °C * Mounted reference PCB (114.3mm × 76.1mm × 1.6mm, glass epoxy resin) DC Electrical Characteristics Ratings at Ta = 25°C, VSS = 0V Operating Condition/Ta = 25°C Parameter Symbol Pin name Recommended supply voltage VDD VDD Range of operating supply voltage VDDopg VDD Conditions min typ max 9.0 VDD=9.0V unit V 8.0 10.0 V Electric Characteristics/Ta = 25°C, VDD = 9.0V, fin = 1kHz, VIN = 1mVrms = 0dB, RL = 10kΩ Parameter Symbol Pin name Current without signal IDDO VDD Clock frequency FCLK OSC Control data Hi Level voltage VIH SCL, SDA Control data Low Level voltage VIL Control data Input pulse width tφW Control data Hold time Control data Operation frequency Conditions min typ max unit 60 mA 3.19 MHz 2.0 3.5 V SCL, SDA 0.0 0.5 SCL, SDA 1.0 μs thold SCL, SDA 1.0 μs fopg SCL, SDA OSC Ex.R=30kΩ 1.72 2.45 500 V kHz AC Electrical Characteristics (Reference data: No measurement) Parameter Symbol Pin name Conditions min typ max unit [Mic-AMP] Input=MICIN1/MICIN2, Output=MICOUT1/MICOUT2, VIN=-48dBV, VALC=VREF – 1.414V, Mic-AMP NF Ex.R=680Ω, ALC Ex.C=2.2μF Mic Gain VGM2 MICOUT1/2 Mic-AMP NF Ex.R=680Ω Max output voltage VoTM MICOUT1/2 Mic Gain=+38dB, THD=1%, Total harmonic distortion rate1 THDM1 MICOUT1/2 Mic Gain=+38dB, ALC=OFF, MICOUT1/2 VO=-10dBV, Filter=A-filter Mic Gain=+38dB, ALC=ON, VO=0dBV, VIN=-32dBV, Filter=A-filter Mic Gain=+38dB, Filter=A-filter +34.0 +37.0 +42.0 1.75 dB Vrms Filter=A-filter, ALC=OFF Total harmonic distortion rate 2 THDM2 Output noise voltage VNOM MICOUT1/2 ALC attack time TaA MICOUT1/2 ALC release time TaR MICOUT1/2 Mic Gain=+38dB, ALC=ON, VO=0dBV, VIN=-32dBV Mic Gain=+38dB, ALC=ON, VO=0dBV, 0.07 0.5 % 0.1 1.0 % -74.0 -65.0 dBV 60 ms 6.0 s VIN=-32dBV Input impedance ZiM MICIN1/2 Output impedance ZoM MICOUT1/2 Mic-Gain=+38dB, ALC=OFF, 45 60 75 kΩ 0.75 1.5 3.0 kΩ ms VO=0dBV [Digital ECHO] Stereo signal outside connection modes, Input=SUMIN, Output=ECHOOUT, VIN=-10dBV, Delay Time=100ms, Mic Volume 1/2=0dB, Feedback Volume=-∞ Delay time DT ECHOOUT Output Gain VGE ECHOOUT Max output voltage VoE ECHOOUT THD=10%, Filter=A-filter Total harmonic distortion rate THDE ECHOOUT Filter=A-filter Filter=A-filter Output noise voltage VNOE ECHOOUT Input impedance ZiE SUMIN Output impedance ZoE ECHOOUT FCLK=2.45MHz Delay time=100ms, VO=0dBV 75 100 125 -4.5 -2.0 +0.5 1.5 dB Vrms 0.7 2.0 % -65 -55 dBV 45 60 75 kΩ 45 60 75 kΩ Continued to the next page. No. A2153-2/15 LC75106V Continued from the previous page. Parameter Symbol Pin name Conditions min typ max unit [Stereo Line] Stereo signal internal connection modes, Input=LCHIN/RCHIN, Output=LCHOUT/RCHOUT, VIN=-10dBV, Line Select=Stereo, Mic-Volume 1/2=ECHO Volume=-∞ Output Gain VGS Lch/RchOUT Max output voltage VoS Lch/RchOUT THD=1%, Filter=A-filter Total harmonic distortion rate THDS Lch/RchOUT Filter=A-filter 0.03 0.1 Output noise voltage VNOS Lch/RchOUT Filter=A-filter -85.0 -75.0 -21.5 -17.5 -14.5 Vocal removal rate -3.5 Lch/RchOUT Input impedance ZiS Lch/RchIN Output impedance ZoS Lch/RchOUT VO=0dBV -1.5 +0.5 1.75 dB Vrms % dBV 75 100 125 kΩ 0.75 1.5 3.0 kΩ +4.0 +5.5 +7.0 [Mic Sum-AMP] Stereo signal outside connection modes, Input=IN1/IN2, Output=SUMOUT, VIN=-10dBV Output Gain VGMS SUMOUT Max output voltage VoMS SUMOUT THD=1%, Filter=A-filter Total harmonic distortion rate THDMS SUMOUT Filter=A-filter Output noise voltage VNOMS SUMOUT Filter=A-filter Input impedance ZiMS IN1/IN2 Output impedance ZoMS SUMOUT VO=0dBV 1.75 dB Vrms 0.05 0.5 % -77.0 -70.0 45 60 75 dBV kΩ 1.0 2.0 4.0 kΩ +4.0 +5.5 +7.0 [ECHO Sum-AMP] Stereo signal outside connection modes, Input=SUMIN/ECHOIN, Output=OUT, VIN=-10dBV Output Gain VGES OUT Max output voltage VoES OUT THD=1%, Filter=A-filter Total harmonic distortion rate THDES OUT Filter=A-filter Output noise voltage VNOES OUT Filter=A-filter Input impedance ZiES SUMIN/ECHOIN Output impedance ZoES OUT VO=0dBV 1.75 dB Vrms 0.05 0.5 % -77.0 -70.0 45 60 75 dBV kΩ 1.0 2.0 4.0 kΩ Package Dimensions unit:mm (typ) 3247A 7.6 19 0.5 5.6 36 1 18 0.2 (0.7) 0.8 (1.5) 0.1 15.0 1.7max 0.3 SANYO : SSOP36(275mil) No. A2153-3/15 LC75106V Pin Assignment MICIN1 MICIN2 1 36 2 35 3 34 4 33 5 32 6 31 SUMOUT (SELOUT) 7 30 SUMIN (SELIN) 8 29 OUT (RCHOUT) 9 28 FEEDIN (LCHOUT) 10 27 11 26 12 25 13 24 14 23 15 22 16 21 TEST4 (CS) N.C (RCHIN) 17 20 TEST3 (SCL) N.C (LCHIN) 18 19 N.C (SDA) ALC1 MICNF1 MICOUT1 IN1 VREF ALC2 MICNF2 MICOUT2 IN2 ALCDETV VDD N.C (FILTER) AAF3 LC75106 ECHOIN ECHOOUT LPF1 LPF2 D/A GND AAF2 AAF1 NF A/D DC3V OSC Top view TEST3 (CL) N.C (DI) 20 19 OSC TEST4 (CE) Reg. 21 22 OSC DC3V 23 A/D 24 NF 25 AAF1 26 AAF2 27 AAF3 28 N.C (FILTER) 29 VDD ALCDETV 30 33 31 34 IN2 MICOUT2 MICNF2 ALC2 35 32 36 + - MICIN2 Block Diagram ALC Logic + Mic-AMP2 SRAM A/D AAF + Mic-Volume 2 + + Line Selecter Feed-Volume Stereo (Through) Lch Mono Rch Mono L+R /2 Vocal cut Mic-Volume 1 Echo-Volume + Mic-AMP1 17 18 TEST1 (LCHIN) TEST2 (RCHIN) 16 GND D/A 14 13 LPF1 12 10 FEEDIN (RCHOUT) ECHOOUT 9 OUT (LCHOUT) 11 8 SUMIN (SELIN) ECHOIN 7 SUMOUT (SELOUT) 6 VREF 5 IN1 4 15 D/A LPF MICOUT1 3 MICNF1 2 ALC1 MICIN1 1 + - LPF2 ALC No. A2153-4/15 LC75106V Pin Descriptions Pin No. Pin Name 1 MICIN1 36 MICIN2 Voltage VDD/2 Description Equivalent circuit Mic signal input 1 Mic signal input 2 1 36 2 ALC1 Auto level control terminal 1 35 ALC2 Auto level control terminal 2 2 35 3 MICNF1 Mic feedback signal input terminal 1 34 MICNF2 Mic feedback signal input terminal 2 3 34 4 MICOUT1 Mic signal output terminal 1 33 MICOUT2 Mic signal output terminal 2 4 33 5 IN1 Mic volume input terminal 1 32 IN2 Mic volume input terminal 2 5 32 6 VREF Internal standard voltage 6 Continued to the next page. No. A2153-5/15 LC75106V Continued from the previous page. Pin No. Pin Name 7 SUMOUT/SELOUT Voltage Description Equivalent circuit [CS terminal = “L”] Mic volume 1/2 sum output 7 [CS terminal = “H”] Selector output terminal 8 SUMIN/SELIN [CS terminal = “L”] Delay signal input 8 [CS terminal = “H”] Selector input terminal 9 OUT/RCHOUT [CS terminal = “L”] ECHOIN signal, MICSUM signal sum output [CS terminal = “H”] Rch output 9 10 FEEDIN/LCHOUT [CS terminal = “L”] Echo feed back signal input 10 [CS terminal = “H”] Lch output 11 ECHOIN Echo signal input (Echo volume input) 11 12 ECHOOUT Echo signal output 12 Continued to the next page. No. A2153-6/15 LC75106V Continued from the previous page. Pin No. Pin Name Voltage Description 13 LPF1 LPF input terminal 1 14 LPF2 LPF input terminal 2 Equivalent circuit 13 14 15 D/A Terminal for A/D 24 A/D Terminal for D/A 15 24 16 GND Analog GND 17 NC/RCHIN Rch input terminal 18 NC/LCHIN Lch input terminal 17 18 19 SDA 0V/3.3V I2C bus SDA terminal 19 20 SCL 21 CS 0V/3.3V I2C bus SCL terminal MODE select terminal 20 21 22 OSC Oscillator circuit adjustment terminal 22 Continued to the next page. No. A2153-7/15 LC75106V Continued from the previous page. Pin No. 23 Pin Name DC3V Voltage 3.3V Description Equivalent circuit Power source for logic block 23 25 NF Terminal for A/D 25 26 AAF1 AAF input terminal 1 26 27 AAF2 AAF input terminal 2 28 AAF3 AAF input terminal 3 27 28 29 NC/FILTER Filter input terminal 29 30 VDD Supply voltage 31 ALCDETV ALC setting voltage input terminal 31 No. A2153-8/15 LC75106V Sample Application Circuit (Mic-Gain = +38dB) Stereo signal internal connection modes 35 MICIN2 ALC2 10k_ohm 10k_ohm 0.1uF 100uF 16V 2.2uF 16V + 34 33 MICNF2 MICOUT2 1k_ohm 100_ohm 33k_ohm 680pF 50V 30k_ohm + SDA 4700pF 50V 680pF50V 36 680pF 50V 0.1uF 16V 56000pF 16V 0.01uF 50V Mic2 input + + SCL 47uF 16V + 680_ohm 2.2uF 16V 1k_ohm 50k_ohm DC Power (3.3V) 0.1uF 50V 470uF 35V Vdd (9.0V) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 IN2 ALCDETV VDD N.C (FILTER) AAF3 AAF2 AAF1 NF A/D DC3V OSC TEST4 (CS) TEST3 (SCL) N.C (SDA) LPF1 LPF2 D/A GND 13 14 15 16 56000pF 16V 0.1uF + 9 + 10 + 11 12 + 0.1uF 16V 1000pF N.C N.C (LCHIN) (RCHIN) 17 + 18 + 1uF 50V + 8 1uF 50V 7 4700pF 50V SUMOUT SUMIN OUT FEEDIN (SELOUT) (SELIN) (RCHOUT)(LCHOUT) ECHOIN ECHOOUT 1uF 50V 6 1uF 50V VREF 5 680pF50V 680_ohm + IN1 4 2.2uF 16V 1k_ohm 0.1uF 16V 3 2.2uF 16V + Mic1 input MICNF1 MICOUT1 1uF 50V 2 1uF 50V ALC1 1 Rch input Lch input 470uF 16V MICIN1 1000pF 50V LC75106 + Analog Gnd Lch output Rch output Key Control LSI Stereo signal outside connection modes I2C Control 56000pF 16V 680pF 50V 34 33 MICNF2 MICOUT2 31 30 29 28 27 26 25 24 23 22 21 20 19 ALCDETV VDD N.C (FILTER) AAF3 AAF2 AAF1 NF A/D DC3V OSC TEST4 (CS) TEST3 (SCL) N.C (SDA) LPF1 LPF2 D/A GND 13 14 15 16 680pF 50V 1k_ohm 32 + 30k_ohm 4700pF 50V 50k_ohm SDA(I2C) IN2 + 10k_ohm 10k_ohm 0.1uF 100uF 16V SCL(I2C) 100_ohm 35 ALC2 + 33k_ohm 36 MICIN2 680pF 50V 680pF 50V 470uF 35V 2.2uF 16V 50k_ohm 47uF 16V + Vdd (9.0V) 56000pF 16V 0.1uF 16V 680_ohm 2.2uF 16V 1k_ohm + Mic2 input 3.3V 32 IN2 0.1uF 50V 33 MICNF2 MICOUT2 50k_ohm 34 Non I2C Control = 33k_ohm (Pull Down) MICNF1 MICOUT1 3 4 IN1 5 8 0.1uF 16V + + 9 + 10 + 11 + Echo output 12 50k_ohm 7 1000pF N.C N.C (RCHIN) (LCHIN) 17 18 4700pF 50V SUMOUT SUMIN OUT FEEDIN (SELOUT) (SELIN) (RCHOUT)(LCHOUT) ECHOIN ECHOOUT 50k_ohm 6 0.1uF 16V VREF 5 0.1uF 16V 50k_ohm 2.2uF 16V 680_ohm 680pF 50V IN1 1uF 16V 4 0.1uF 3 2.2uF 16V + 0.1uF 16V MICNF1 MICOUT1 470uF 16V 2 56000pF 16V ALC1 1 + FEEDIN (LCHOUT) ECHOIN ECHOOUT 10 11 Analog Gnd LPF1 12 13 56000pF 16V I2C Control + I2C Control + 0.1uF 16V 680pF 50V 0.1uF 16V 1k_ohm Mic1 input MICIN1 1000pF 50V LC75106 1000pF No. A2153-9/15 LC75106V Control Data Structure (Serial Data Input) The setting of LC75106 can be controlled with I2C Bus. All the settings can be controlled by I2C Bus at the stereo signal internal connection modes (CS terminal = “H”), and all the volumes except the stereo source control can be set at the stereo signal outside connection modes (CS terminal = “L”). The karaoke system can be made from external resistance by doing I2C Bus Line in Pull Up at the stereo signal outside connection modes. 1) The explanation of I2C Bus I2C Bus (Inter IC Bus) is the bus system which the PHILIPS company developed. It does controls such as the start, the stop by two control signals of SDA (Serial Data) and SCL (Serial Clock). The output of each signal is open drain and forms out of wired OR. SCL SDA S ACK ACK P S; Start condition/P; Stop condition/ACK; Acknowledge Data is transmitted in the MSB first. 1 unit is composed of 8 bits and ACK is put back from the slave to confirm. Slave IC reads data with rising edge of SCL. Master IC changes data by falling edge in SCL. 2) The control register Table1 Slave Address MSB LSB 0 0 1 1 1 0 0 0 Note; LC75106 is reception exclusive use. It depends and it uses LSB by the “0” fixation. • I2C data Function Sub Address Data BINARY HEX D7 D6 D5 D4 D3 D2 D1 D0 Stereo line select/Mic1 volume 0000 0001 01 LD2 LD1 LD0 KEY M1D3 M1D2 M1D1 M1D0 Mic2 volume/Test 0000 0010 02 M2D3 M2D2 M2D1 M2D0 TEST3 TEST2 TEST1 TEST0 Delay time/ECHO volume 0000 0011 03 0 DT2 DT1 DT0 0 ED2 ED1 ED0 Feed back volume 0000 0100 04 0 FB2 FB1 FB0 0 0 0 0 No. A2153-10/15 LC75106V Control Data Description No (1) Control Part/ Data Line select LD2 LD1 LD0 (2) External key control Description •The data determines line output. LD2 LD1 Related Data CS=”H” LD0 0 0 0 Stereo output (Initial setting) 0 0 1 Lch Mono output 0 1 0 Rch Mono output 0 1 1 L+R/2 output 1 0 0 Vocal cut output 1 0 1 Reserve 1 1 0 Reserve 1 1 1 Reserve •This data determines route where external key control is used. CS=”H” switching data key KEY (3) Microphone volume External key control 0 Invalid (Initial setting) 1 valid •The data determines the gain of MICIN 1/2. gain setting data M1D3 M1D2 M1D1 M1D2 M1D1 M1D0 M2D3 M2D2 M2D1 M2D0 M1D0 0 0 0 0 0dB (Initial setting) M2D3 0 0 0 1 -2dB M2D2 0 0 1 0 -4dB 0 0 1 1 -6dB 0 1 0 0 -8dB 0 1 0 1 -10dB 0 1 1 0 -12dB 0 1 1 1 -14dB 1 0 0 0 -16dB 1 0 0 1 -18dB 1 0 1 0 -20dB 1 0 1 1 -23dB 1 1 0 0 -26dB 1 1 0 1 -29dB 1 1 1 0 -32dB 1 1 1 1 -∞ M2D1 M2D0 (4) M1D3 Delay time •The data determines delay time for echo. setting data DT2 DT1 DT0 DT2 DT1 DT0 0 0 0 OFF 0 0 1 75ms (Initial setting) 0 1 0 100ms 0 1 1 125ms 1 0 0 150ms 1 0 1 175ms 1 1 0 200ms 1 1 1 Reserve Continued to the next page. No. A2153-11/15 LC75106V Continued from the previous page. No (5) Control Part/ Data Echo volume gain Description Related Data •The data determines gain of echo output. setting data ED2 ED1 ED0 (6) Feedback volume ED2 ED1 ED0 0 0 0 0dB (Initial setting) 0 0 1 -2dB 0 1 0 -4dB 0 1 1 -6dB 1 0 0 -9dB 1 0 1 -12dB 1 1 0 -15dB 1 1 1 -∞ •The data determines feedback volume for echo. gain setting data FB2 FB1 FB0 (7) LSI test data TEST3 FB2 FB1 FB0 0 0 0 -4dB (Initial setting) 0 0 1 -6dB 0 1 0 -9dB 0 1 1 -12dB 1 0 0 -∞ 1 0 1 Reserve 1 1 0 Reserve 1 1 1 Reserve •Data for LSI testing TEST3 to TEST0 should be set to ”0”. TEST2 TEST1 TEST0 No. A2153-12/15 LC75106V Control with external parts LC75106 can adjust the setting with external parts at the stereo signal outside connection modes. (1) Delay time setting The Delay time changes if the CR oscillation frequency with built-in LC75106 is adjusted. Delay time external Resistance OSC Freq 75ms 30kΩ 2.458MHz 100ms 47kΩ 1.843MHz 120ms 56kΩ 1.536MHz 150ms 75kΩ 1.228MHz 190ms 187kΩ 0.970MHz Note (2) Mic-Volume/ECHO Volume setting When Mic Volume and ECHO Volume are set with external parts, it is possible to set it in the ratio of R1 and R2 as shown in the figure below. 5 0.1uF 50V 4 R1 + R2 VREF Gain R1 R2 -2dB 10.284kΩ 39.716kΩ -4dB 18.452kΩ 31.548kΩ -6dB 24.941kΩ 25.059kΩ -8dB 30.095kΩ 19.905kΩ -9dB 32.259kΩ 17.741kΩ -10dB 34.189kΩ 15.811kΩ -12dB 37.441kΩ 12.559kΩ -14dB 40.024kΩ 9.976kΩ -15dB 41.109kΩ 8.891kΩ -16dB 42.076kΩ 7.924kΩ -18dB 43.705kΩ 6.295kΩ -20dB 45.000kΩ 5.000kΩ -23dB 46.460kΩ 3.540kΩ -26dB 47.494kΩ 2.506kΩ -29dB 48.226kΩ 17.74kΩ -32dB 48.744kΩ 1.256kΩ -∞dB 50.000kΩ 0 Note (3) Feed Back Volume setting To prevent the oscillation, the Echo Feed Back signal input terminal has Gain of -4dB. Therefore, please calculate in consideration of the attenuation of -4dB when you set Volume. R1 R2 5 0.1uF 50V 4 + Gain R1 R2 -4dB 0 50.000kΩ -6dB 10.284kΩ 39.716kΩ -9dB 18.452kΩ 31.548kΩ -12dB 24.941kΩ 25.059kΩ -∞dB 50.000kΩ 0 Note VREF No. A2153-13/15 LC75106V (4) Mic AMP Gain setting Mic Amplifier Gain is adjusted according to the resistance value applied to 3pin and 34pin. And low frequency is cut off by connecting condenser. Mic Amplifier has built-in ALC (Auto Level Control). Output level can be controlled by inputting the standard voltage to 31pin. + 1 − R1 ALC R2 1) Mic AMP Gain setting • R1 = 56.2kΩ [Mic Gain = 38dB] R2 = R1/Mic Gain =56.2k/79.4 ≈ 680 2 3 4 VREF C2 R2 + C1 2) fc setting fc = 1 2π R1 C1 (5) ALC control voltage setting 1) ALC control voltage setting When the ALC detecting voltage is input to 31pin, the ALC operation level can be set. The setting method becomes as follows. [VDD = 9.0V/1Vrms setting] VDD/2 = 9.0/2 = 4.5 1Vrms/2 = √2 * 1 = 1.414V VALC setting voltage = 4.5 – 1.414 = 3.086V (DC) ALC setting voltage can be set to put resistance between the terminal VREF and the terminal GND. * The voltage of the terminal VREF depends on the power-supply voltage and changes. 2) ALC attack time/release time setting The attack time and the release time of ALC can be set with the capacitor between 2pin - VDD and 35pin - VDD. capacitor Attack time Release time 2.2μF About 60ms About 6.0s 1.0μF About 35ms About 2.5s 0.1μF About 16ms About 0.25s Note No. A2153-14/15 LC75106V SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. Regarding monolithic semiconductors, if you should intend to use this IC continuously under high temperature, high current, high voltage, or drastic temperature change, even if it is used within the range of absolute maximum ratings or operating conditions, there is a possibility of decrease reliability. Please contact us for a confirmation. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of November, 2012. Specifications and information herein are subject to change without notice. PS No. A2153-15/15