Ordering number : ENA1134A Bi-CMOS LSI LV8014T Forward/Reverse Motor Driver Overview LV8014T is a 2ch forward/reverse motor driver IC using D-MOS FET for output stage. As MOS circuit is used, it supports the PWM input. Its features are that the on resistance (0.75Ω typ) and current dissipation are low. It also provides protection functions such as heat protection circuit and reduced voltage detection and is optimal for the motors that need high-current. Functions • 2ch forward/reverse motor driver • Low power consumption • Built-in charge pump circuit • Compact TSSOP-24 package • Possible to respond to 3V control voltage and 6V motor voltage device • Low ON resistance 1.2Ω • Built-in low voltage reset and thermal shutdown circuit • Four mode function forward/reverse, brake, stop. Specifications Absolute Maximum Ratings at Ta = 25°C, SGND = PGND = 0V Parameter Supply voltage (For load) Supply voltage (For control) Symbol Conditions VM1, 2 max Unit -0.5 to 7.5 VCC max IO max t ≤ 100ms Output peak current IO max2 t ≤ 10ms Input voltage VIN max Allowable dissipation Pd max Output current Ratings -0.5 to 6.0 V 1.4 A 2.5 A -0.5 to VCC+0.5 * Mounted on a substrate V 800 V mW Operating temperature Topr -20 to +75 °C Storage temperature Tstg -55 to +150 °C * : Mounted on a substrate : 30×50×1.6mm3, glass epoxy board Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. 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To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. 71812 SY/31208 TI IM B8-9014 No. A1134-1/6 LV8014T Allowable Operating Ratings at Ta = 25°C, SGND = PGND = 0V Parameter Symbol Conditions Ratings Unit Supply voltage (VM Pin) VM 2.0 to 7.0 V Supply voltage (VCC Pin) VCC 2.7 to 5.5 V Input signal voltage VIN 0 to VCC V Input signal frequenc Capacitor for charge pump f max C1, C2, C3 100 kHz 0.001 to 0.1 μF Electrical Characteristics at Ta = 25°C, VCC = VM1 = VM2 = 5.0V, SGND = PGND = 0V, unless especially specified. Ratings Parameter Symbol Conditions Remarks Unit min typ max Supply current for load at standby IMO EN = 0V 1 1.0 μA Supply current for control at ICO EN = 0V, 2 1.0 μA 1.2 mA standby IN1 = IN2 = IN3 = IN4 = 0V Current drain during operation IC1 EN = 5V, VG at no load H-level input voltage VIH 2.7V ≤ VCC ≤ 5.5V 3 L-level input voltage VIL 2.7V ≤ VCC ≤ 5.5V H-level input current IIH 4 IIL 4 0.7 0.6×VCC VCC V 0 0.2×VCC V 1.0 μA (IN1, IN2, IN3, IN4) L-level input current μA -1.0 (IN1, IN2, IN3, IN4) Pull-down resistance (EN1, 2) RUP 100 200 400 kΩ Ta = 25°C, VCC = VM = 5.0V, SGND = PGND = 0V Ratings Parameter Symbol Conditions Remarks Unit min Output ON resistance RON Sum of ON resistances at top and typ 5 max Ω 0.75 1.2 10.5 V 2.30 2.45 V bottom Charge pump voltage Low-voltage detection operation VG 6 8.5 VCS 7 2.15 Tth 8 VGLOAD 9 voltage Thermal shutdown operation 180 °C 9 V temperature Charge pump capacity 8 (IG = 500μA) IG current dissipation (Fin = 20kHz) IG CVG = 0.1μF 10 350 μA 11 1.0 ms 0.2 0.4 μs 0.2 0.4 μs Charge pump start time TVG Output block Turn on time TPLH 12 Turn off time TPHL 12 Remarks 1. It shows current dissipation of VM1, VM2 pin in output OFF state. 2. It shows current dissipation of VCC pin in stand-by state. (The standard current depends on EN pin pull-down resistance.) 3. It shows current dissipation of VCC pin in state of EN = 5V (stand-by), including current dissipation of VG pin. 4. For IN1, IN2, IN3 and IN4 pins, no pull-down and pull-up resistance is needed. (High impedance pin) 5. It shows sum of upper and lower saturation voltages of OUT pin. 6. It controls charge-pump oscillation and makes specified voltage. 7. When low voltage is detected, the lower output is turned OFF. 8. When thermal protection circuit is activated, the lower output is turned OFF. When the heat temperature is fallen, it is turned ON again. 9. IG (VG pin load current) = 500μA 10. It shows VG pin current dissipation in state of PWM input for IN pin. 11. It specifies start-up time from 10% to 90% when VG is in non-load state (when setting the capacitor between VG and GND to 0.1μF and VCC is 5V). 12. It specifies 10% to 90% for start-up and 90% to 10% for shut-down. No. A1134-2/6 LV8014T Package Dimensions unit : mm (typ) 3260A Pd max - Ta Allowable power dissipation, Pd max - mW 1000 6.5 0.5 6.4 13 4.4 24 12 1 0.5 0.15 0.22 1.2max 800 600 480 400 200 0 -20 0.08 (1.0) (0.5) Specified Board: 30×50×1.6mm3 glass epoxy board. 0 20 40 60 75 80 100 Ambient temperature, Ta - °C SANYO : TSSOP24(225mil) EN2 IN1 IN2 IN3 IN4 EXTRA SGND C2L C2H C1L C1H VCC Pin Assignment 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 EN1 VM2 NC PGND OUT4 OUT3 OUT2 OUT1 PGND NC VM1 VG LV8014T Top view No. A1134-3/6 LV8014T Block Diagram C2H 16 12 VG OSC,CHARGE_PUMP C2L 17 C1H 14 Low-voltage thermal protection C1L 15 11 VM1 8 OUT1 VCC 13 H BRIDGE1 EN1 1 EN2 24 7 OUT2 4 P-GND LEVEL SHIFT IN1 23 2 VM2 CMOS LOGIC IN2 22 6 OUT3 IN3 21 H BRIDGE2 IN4 20 EXTRA 19 5 OUT4 9 P-GND 18 SGND Truth table EXTRA L H EN1 IN1 IN2 OUT1 OUT2 Circuit of (EN2) (IN3) (IN4) (OUT3) (OUT4) Charge Pump H H H Z Z ON H L L H Reverse L H H L Forward L L L L L - - L L OFF Standby H H - L H ON Reverse L - H L Forward - - L L Brake L Mode Standby Brake - : Don’t care Z : High-Impedance * Current drain becomes zero in the standby mode. * The output side becomes OFF, with motor drive stopped, during voltage reduction and thermal protection. No. A1134-4/6 LV8014T Pin Functions Pin No. Pin name 15 C1L 17 C2L 14 C1H 16 C2H Function Equivalent Circuit Voltage raising capacitor connection pin VCC Voltage raising capacitor connection pin VG C1H C2H 23 IN1 22 IN2 21 IN3 Driver output changeover 20 IN4 19 EXTRA 1 EN1 Logic enable pin 24 EN2 TOUT output control pin VCC VCC (Pull-down resistor incorporated) 200kΩ 8 OUT1 7 OUT2 6 OUT3 5 Driver output pin VM OUT4 PGND OUT OUT PGND 2 VM2 11 VM1 13 VCC 12 VG Motor power supply Logic power supply Driver drive circuit power supply VG C2H 0.1μF 0.01μF C2L 18 SGND Logic GND 9 PGND Driver GND 4 PGND (both terminals to be connected) . No. A1134-5/6 LV8014T Sample Application Circuit 1.0 to 6.5V VG C2L 0.1μF 0.01μF 8.5 to 10.5V C2H VM1 0.01μF 2.7 to 5.5V *1 C1H C1L OUT1 VCC OUT2 EN1 PGND EN2 IN1 OUT3 IN2 OUT4 IN3 PGND IN4 VM2 M CPU *1 SGND EXTRA *1 : Connect a kickback absorption capacitor directly near IC. Coil kickback may cause rise of the voltage of VM line, and the voltage exceeding the maximum rating may be applied momentarily, resulting in deterioration or damage of IC. SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. Regarding monolithic semiconductors, if you should intend to use this IC continuously under high temperature, high current, high voltage, or drastic temperature change, even if it is used within the range of absolute maximum ratings or operating conditions, there is a possibility of decrease reliability. Please contact us for a confirmation. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of July, 2012. Specifications and information herein are subject to change without notice. PS No. A1134-6/6