TPS72118-EP www.ti.com SGDS037A – OCTOBER 2007 – REVISED DECEMBER 2007 LOW INPUT VOLTAGE, CAP FREE 150 mA LOW-DROPOUT (LDO) LINEAR REGULATOR FEATURES APPLICATIONS • • • • • • • • • • 1 • • • • • • • • • • • • • (1) Controlled Baseline – One Assembly Site – One Test Site – One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree (1) 150 mA Low-Dropout (LDO) Available in 1.8 V Fixed-Output Version Low Input Voltage Requirement (Down to 1.8 V) Small Output Capacitor, 0.1 µF Dropout Voltage Typically 200 mV at 150 mA Less Than 3µA Quiescent Current in Shutdown Mode Thermal Protection Over Current Limitation 5-Pin SOT-23 (DBV) Package Portable Communication Devices Battery-Powered Equipment PCMCIA Cards Personal Digital Assistants Modems Bar Code Scanners Backup Power Supplies SMPS Post Regulation Internet Audio Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. DESCRIPTION/ORDERING INFORMATION The TPS72118 family of LDO regulators is available in fixed voltage options that are commonly used to power the latest DSPs and microcontrollers with a fixed output to 1.8 V. These regulators can be used in a wide variety of applications ranging from portable, battery-powered equipment to PC peripherals. The family features operation over a wide range of input voltages (1.8 V to 5.5 V) and low dropout voltage (150 mV at full load). Therefore, compared to many other regulators that require 2.5 V or higher input voltages for operation, these regulators can be operated directly from two AAA batteries. Also, the typical quiescent current (ground pin current) is low, starting at 85 µA during normal operation and 3 µA in shutdown mode. These regulators can be operated very efficiently and, in a battery-powered application, help extend the longevity of the device. Similar LDO regulators require 1 µF or larger output capacitors for stability. However, this regulator uses an internal compensation scheme that stabilizes the feedback loop over the full range of input voltages and load currents with output capacitances as low as 0.1 µF. Ceramic capacitors of this size are relatively inexpensive and available in small footprints. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007, Texas Instruments Incorporated TPS72118-EP www.ti.com SGDS037A – OCTOBER 2007 – REVISED DECEMBER 2007 This family of regulators is particularly suited as a portable power supply solution due to its minimal board space requirement and 1.8 V minimum input voltage. Being able to use two off-the-shelf AAA batteries makes system design easier and also reduces component cost. Moreover, the solution is more efficient than if a regulator with a higher input voltage is used. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) (1) (2) (3) TJ VOLTAGE PACKAGE (2) PART NUMBER SYMBOL –55°C to 125°C 1.8 V DBV TPS72118MDBVREP (3) CKZ For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. The DBVR indicates tape and reel of 3000 parts. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) (2) TPS72118 Voltage range at IN –0.3 V to 7 V Voltage range at EN –0.3 V to 7 V Voltage on OUT, FB, NC –0.3 V to VI + 0.3 V Peak output current Internally limited ESD rating, HBM 3 kV Continuous total power dissipation See Dissipation Rating Table Operating junction temperature range, TJ –55°C to 150°C Storage temperature range, Tstg –65°C to 150°C (1) (2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. All voltage values are with respect to network ground terminal. PACKAGE DISSIPATION RATING BOARD PACKAGE RΘJC RΘJA DERATING FACTOR ABOVE TA = 25°C TA ≤ 25°C POWER RATING TA = 70°C POWER RATING TA = 85°C POWER RATING Low-K (1) DBV 65.8 °C/W 259 °C/W 3.9 mW/°C 386 mW 212 mW 154 mW High-K (2) DBV 65.8 °C/W 180 °C/W 5.6 mW/°C 555 mW 305 mW 222 mW (1) (2) 2 The JEDEC Low-K (1s) board design used to derive this data was a 3 inch x 3 inch, two-layer board with 2-ounce copper traces on top of the board. The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS72118-EP TPS72118-EP www.ti.com SGDS037A – OCTOBER 2007 – REVISED DECEMBER 2007 ELECTRICAL CHARACTERISTICS over recommended operating junction temperature range VIN = VOUT(Nom) + 1 V, IOUT = 1 mA, EN = VIN, COUT = 1 µF (unless otherwise noted) PARAMETER VIN Input voltage (1) IOUT Continuous output current TJ Operating junction temperature VOUT Output voltage I(Q) Quiescent current (GND current) Standby current TEST CONDITIONS TJ = 25°C TJ = Full Temp 1mA < IOUT < 150 mA 2.8 V ≤ VIN ≤ 5.5 V IOUT = 1 mA TJ = 25°C IOUT = 1 mA TJ = Full Temp IOUT = 150 mA TJ = 25°C IOUT = 150 mA TJ = Full Temp EN < 0.5 V TJ = 25°C EN < 0.5 V TJ = Full Temp Vref Reference voltage TJ = 25°C PSRR Ripple rejection f = 100 Hz, Co = 10 µF, TJ = 25°C IOUT = 150 mA See Output voltage line regulation (ΔVOUT/VOUT) (1) VO + 1 V < VIN≤ 5.5 V, IOUT = 150 mA TJ = 25°C Output voltage load regulation 0 < IOUT < 150 mA TJ = 25°C VIH EN high level input VIL EN low level input II VDO V 0 150 mA –55 125 °C 1.8 1.728 1.872 125 V 3 (1) V 48 dB 525 0.03 TJ = Full Temp 0.20 0.35 1.5 EN = 0 V –0.0 1 EN = IN –0.0 1 mA %/V mV 0.4 Thermal shutdown hysteresis µA 1.22 5 120 TJ = 25°C µA 850 1.4 IOUT = 150 mA UNIT 5.5 0.01 Thermal shutdown temperature (1) (2) (3) MAX 570 EN input current Dropout voltage (3) TYP 1.8 85 (2) Current limit MIN V µA 150 mV 170 °C 20 °C Minimum IN operating voltage is 1.8 V or VOUT + VDO, whichever is greater. Test condition includes output voltage VO = 1 V and pulse duration = 10 ms. Dropout voltage is defined as the differential voltage between VO and VI when VO drops 100 mV below the value measured with VIN = VOUT + VDO. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS72118-EP 3 TPS72118-EP www.ti.com SGDS037A – OCTOBER 2007 – REVISED DECEMBER 2007 TPS72118 A. This pin must be left floating and not connected to GND. Figure 1. Functional Block Diagram—Fixed Version Terminal Functions TERMINAL NAME DESCRIPTION NO. GND 2 Ground EN 3 Enable input IN 1 Input supply voltage NC/FB 4 NC = Not connected (see (A)); FB = Feedback (adjustable option TPS72101) OUT 5 Regulated output voltage TYPICAL CHARACTERISTICS TPS72118 OUTPUT VOLTAGE vs OUTPUT CURRENT TPS72118 OUTPUT VOLTAGE vs JUNCTION TEMPERATURE 1.8040 1.8020 V O − Output Voltage − V V O − Output Voltage − V VI = 2.8 V Co = 1 µF TJ = 25° C 1.8000 1.7999 1.7998 1.7997 1.7996 1.7995 0 30 60 90 120 IO − Output Current − mA 150 Figure 2. 4 700 VI = 2.8 V Co = 1 µF 600 1.8000 IO = 1 mA 1.7980 IO = 150 mA 1.7960 Ground Current − µ A 1.8002 1.8001 TPS72118 GROUND CURRENT vs JUNCTION TEMPERATURE VI = 2.8 V Co = 1 µF IO = 150 mA 500 400 300 1.7940 200 1.7920 100 IO = 1 mA 1.7900 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C Figure 3. Submit Documentation Feedback 0 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C Figure 4. Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS72118-EP TPS72118-EP www.ti.com SGDS037A – OCTOBER 2007 – REVISED DECEMBER 2007 TYPICAL CHARACTERISTICS (continued) TPS72118 GROUND CURRENT vs OUTPUT CURRENT TPS72118 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY Output Spectral Noise Density − 400 300 TJ = 25° C 200 TJ = −40° C 100 60 30 90 120 2 1.5 0.1 0.01 IO = 1 mA 0 100 0.001 1k 10 k 1 100 k 10 100 1 k 10 k 100 k 1 M 10 M f − Frequency − Hz Figure 5. Figure 6. Figure 7. TPS72118 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE TPS72118 POWER SUPPLY RIPPLE REJECTION vs FREQUENCY TPS72118 OUTPUT VOLTAGE, ENABLE VOLTAGE vs TIME (START-UP) Power Supply Ripple Rejection − dB 200 IO = 150 mA 150 100 50 Enable Voltage − V 70 VI = 2.8 V Co = 1 µF IO = 150 mA 60 50 40 20 10 0 20 35 50 65 80 95 110 125 1 10 100 1k 10 k 100 k 1 M TPS72118 LOAD TRANSIENT RESPONSE ∆ V O − Change In Output Voltage − mV TPS72118 LINE TRANSIENT RESPONSE IO = 150 mA Co = 1 µF VI 2.8 0 0 50 100 150 200 200 300 350 400 450 500 POWER UP / POWER DOWN 100 VI = 2.8 V Co = 1 µF 5 0 dI O 0.1A + µs dt 150 0 100 -1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 VO 6 I O − Output Current − mA dt 0.4 V µs 1 t − Time − ms Figure 11. VI = 2.8 V VO = 1.8 V IO = 150 mA Co = 1 µF 1 Figure 10. −100 VO 2 t − Time − µs Figure 9. + 1 f − Frequency − Hz Figure 8. dV I 2 0 30 TJ − Junction Temperature − °C 1 VEN 3 Power Up / Power Down − V 0 −40 −25 −10 5 V I − Input Voltage − V 1 f − Frequency − Hz IO = 10 mA V O − Output Voltage −V IO = 1 mA IO = 150 mA 150 VI = 2.8 V Co = 1 µF 0 10 0.5 250 V DO − Dropout Voltage − mV IO = 150 mA 1 IO − Output Current − mA 3.8 VI = 2.8 V Co = 1 µF 100 V − Output Voltage − V O 0 VI = 2.8 V Co = 1 µF Output Impedance − Ω TJ = 125° C 500 0 1k 2.5 µ V/ VI = 2.8 V Co = 1 µF 600 Ground Current − µ A Hz 700 TPS72118 OUTPUT IMPEDANCE vs FREQUENCY VI 4 3 2 VO 1 0 Co = 1 µF Ci = 1 µF RL = 12 Ω 50 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 t − Time − ms Figure 12. 1 0 10 20 30 40 50 60 70 80 Figure 13. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS72118-EP 90 100 t − Time − ms 5 TPS72118-EP www.ti.com SGDS037A – OCTOBER 2007 – REVISED DECEMBER 2007 TYPICAL CHARACTERISTICS (continued) TPS72101 DROPOUT VOLTAGE vs INPUT VOLTAGE DC DROPOUT VOLTAGE vs OUTPUT CURRENT MINIMUM REQUIRED INPUT VOLTAGE vs OUTPUT VOLTAGE 5.5 V I − Minimum Required Input Voltage − V 250 250 200 TJ = 125°C 150 TJ = 25°C 100 TJ = −40°C 50 0 0 15 30 45 60 75 90 105 120 135 150 IO − Output Current − mA Figure 14. 6 V DO − Dropout Voltage − mV DC Dropout Voltage − mV IO = 150 mA 200 TJ = 125°C 150 TJ = 25°C 100 TJ = −40°C 50 0 1.8 2.5 3.3 4 4.8 VI − Input Voltage − V Figure 15. Submit Documentation Feedback 5.5 IO = 150 mA 5 TJ = 125°C 4.5 TJ = 25°C 4 3.5 3 TJ = −40°C 2.5 2 1.5 1 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 VO − Output Voltage − V Figure 16. Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS72118-EP TPS72118-EP www.ti.com SGDS037A – OCTOBER 2007 – REVISED DECEMBER 2007 APPLICATION INFORMATION The TPS72118 family of low-dropout (LDO) regulators functions with a very low input voltage (>1.8 V). The dropout voltage is typically 150 mV at full load. Typical quiescent current (ground pin current) is only 85 µA and drops to 3 µA in the shutdown mode. DEVICE OPERATION The TPS72118 family can be operated at low input voltages due to low voltage circuit design techniques and a PMOS pass element that exhibits low dropout. A logic low on the enable input, EN, shuts off the output and reduces the supply current to less than 3 µA. EN may be tied to VIN in applications where the shutdown feature is not used. Current limiting and thermal protection prevent damage by excessive output current and/or power dissipation. The device switches into a constant-current mode at approximately 350 mA; further load reduces the output voltage instead of increasing the output current. The thermal protection shuts the regulator off if the junction temperature rises above 170°C. Recovery is automatic when the junction temperature drops approximately 20°C below the high temperature trip point. The PMOS pass element includes a back diode that safely conducts reverse current when the input voltage level drops below the output voltage level. A typical application circuit is shown in Figure 17. TPS721xx VI 1 IN OUT 5 VO 0.1 µF NC 3 4 EN GND 0.1 µF 2 Figure 17. Typical Application Circuit DUAL SUPPLY APPLICATION In portable, battery-powered electronics, separate power rails for the DSP or microcontroller core voltage, V(CORE), and I/O peripherals (VIO) are usually necessary. The TPS72118 family of LDO linear regulators is ideal for providing V(CORE) for the DSP or microcontroller. As shown in Figure 18, two AAA batteries provide an input voltage to a boost converter. The batteries combine input voltage ranges from 3.0 V down to 1.8 V near the end of their useful lives. Therefore, a boost converter is necessary to provide the typical 3.3 V needed for VIO. Although there is no explicit circuitry to perform power-up sequencing of first V(CORE) then VIO, the output of the linear regulator reaches its regulated voltage much faster (< 400 µs) than the output of any switching type boost converter due to the inherent slow start up of those types of converters. Assuming a boost converter with minimum VI of 1.8 V is appropriately chosen, this power supply solution can be used over the entire life of the two off-the-shelf AAA batteries. Thus, this solution is very efficient and the design time and overall cost of the solution is minimized. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS72118-EP 7 TPS72118-EP www.ti.com SGDS037A – OCTOBER 2007 – REVISED DECEMBER 2007 1.8 V – 3 V 3.3 V VIO Boost Converter DSP or Controller 1.8 V 1.5 V TPS72115 VCORE Two AAA Batteries Figure 18. Dual Supply Application Circuit EXTERNAL CAPACITOR REQUIREMENTS A 0.1-µF ceramic bypass capacitor is required on both the input and output for stability. Larger capacitors improve transient response, noise rejection, and ripple rejection. A higher value electrolytic input capacitor may be necessary if large, fast rise time load transient are anticipated, and/or there is significant input resistance from the device to the input power supply. POWER DISSIPATION AND JUNCTION TEMPERATURE Specified regulator operation is ensured to a junction temperature of 125°C; the maximum junction temperature allowable without damaging the device is 150°C. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum power dissipation limit is determined using Equation 1 : T max * T A P + J D(max) R qJA (1) Where: • • • TJmax is the maximum allowable junction temperature. RθJA is the thermal resistance junction-to-ambient for the package; see the package dissipation rating table. TA is the ambient temperature. The regulator dissipation is calculated using Equation 2: P D ǒ + V *V I O Ǔ I O (2) Power dissipation resulting from quiescent current is negligible. REGULATOR PROTECTION The TPS72118 pass element has a built-in back diode that safely conducts reverse current when the input voltage drops below the output voltage (for example, during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage is anticipated, external limiting might be appropriate. The TPS72118 also features internal current limiting and thermal protection. During normal operation, the TPS72118 limits output current to approximately 350 mA. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds 170°C, thermal-protection circuitry shuts it down. Once the device has cooled down to below 150°C, regulator operation resumes. 8 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS72118-EP PACKAGE OPTION ADDENDUM www.ti.com 2-Feb-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS72118MDBVREP ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/07636-01XE ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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OTHER QUALIFIED VERSIONS OF TPS72118-EP : • Catalog: TPS72118 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 3-Nov-2011 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS72118MDBVREP Package Package Pins Type Drawing SPQ SOT-23 3000 DBV 5 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 179.0 8.4 Pack Materials-Page 1 3.2 B0 (mm) K0 (mm) P1 (mm) 3.2 1.4 4.0 W Pin1 (mm) Quadrant 8.0 Q3 PACKAGE MATERIALS INFORMATION www.ti.com 3-Nov-2011 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS72118MDBVREP SOT-23 DBV 5 3000 203.0 203.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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