SFF73 0 730 annel MOS FET Silicon N-Ch Cha OSF Features ■5.5A,400V, RDS(on)(Max 1.0Ω)@VGS=10V ■ Ultra-low Gate Charge(Typical 32nC) ■ Fast Switching Capability ■ 100%Avalanche Tested ■ Maximum Junction Temperature Range(150℃) General Description Th i s Po w e r MOS F ET is pr o d uc e d usi n g Wi n se m i ’ s ad va n ce d planar stripe, DMOS technology. This latest technology has been especially designed to minimize on-state resistance, have a high rugg ed ava lan ch e cha racteristics. This devices is spe cially well suited for high efficiency switch model power supplies, power factor correction and half bridge and full bridge resonant topology line a electronic lamp ballast. Absolute Maximum Ratings Symbol VDSS Parameter Value Units Drain Source Voltage 400 V Continuous Drain Current(@Tc=25℃) 5.5* A Continuous Drain Current(@Tc=100℃) 2.9* A 22* A ±30 V ID IDM Drain Current Pulsed (Note1) V GS Gate to Source Voltage EAS Single Pulsed Avalanche Energy (Note 2) 330 mJ E AR Repetitive Avalanche Energy (Note 1) 7.4 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) 4 V/ns Total Power Dissipation(@Tc=25℃) 38 W Derating Factor above 25℃ 0.3 W/℃ -55~150 ℃ 300 ℃ PD TJ, Tstg TL Junction and Storage Temperature Channel Temperature *Drain current limited by maximum junction temperature Thermal Characteristics Symbol Parameter Value Min Typ Max Units R QJC Thermal Resistance, Junction-to-Case - - 3.3 ℃/W R QJA Thermal Resistance, Junction-to-Ambient - - 62 ℃/W Rev.A Dec.2010 Copyright@Winsemi Microelectronics Co., Ltd., All right reserved. 0 SFF73 730 Electrical Characteristics (Tc = 25°C) Characteristics Gate leakage current Gate−source breakdown voltage Drain cut−off current Drain−source Symbol Min Type Max Unit IGSS VGS = ±30 V, VDS = 0 V Test Condition - - ±100 nA V(BR)GSS IG = ±10 μA, VDS = 0 V ±30 - - V IDSS VDS = 400 V, VGS = 0 V - - 1 μA V(BR)DSS ID = 250 μA, VGS = 0 V 400 - - V - 0.4 - V/℃ breakdown voltage Break Voltage Temperature Coefficient ΔBVDSS/ ΔTJ ID=250μA, Referenced to 25℃ Gate threshold voltage VGS(th) VDS = 10 V, ID =250 μA 2 - 4 V Drain−source ON resistance RDS(ON) VGS = 10 V, ID = 2.75A - 0.83 1 Ω Forward Transconductance gfs VDS = 50 V, ID = 2.75A - 4.5 - S Input capacitance C iss VDS = 25 V, - 550 720 Reverse transfer capacitance C rss VGS = 0 V, - 23 30 C oss f = 1 MHz - 85 110 VDD =200 V, - 15 40 ton ID =5.5A - 55 120 tf RG=25Ω - 85 180 - 50 110 - 32 38 - 4.3 5.7 - 14 22 Output capacitance Rise time Turn−on time tr Switching time Fall time Turn−off time ns (Note4,5) toff Total gate charge (gate−source pF VDD = 320 V, Qg plus gate−drain) VGS = 10 V, nC Gate−source charge Qgs Gate−drain (“miller”) Charge Qgd ID =5.5 A (Note4,5) Source−Drain Ratings and Characteristics (Ta = 25°C) Characteristics Symbol Test Condition Min Type Max Unit Continuous drain reverse current IDR - - - 5.5 A Pulse drain reverse current IDRP - - - 22 A Forward voltage (diode) VDSF IDR = 5.5 A, VGS = 0 V - 1.4 1.5 V Reverse recovery time trr IDR = 5.5 A, VGS = 0 V, - 265 530 ns Reverse recovery charge Qrr dIDR / dt = 100 A / μs - 2.32 - μC Note 1.Repeativity rating :pulse width limited by junction temperature 2.L=18.5mH,IAS=5.5A,VDD =50V,RG=25Ω,Starting TJ=25℃ 3.ISD≤5.5A,di/dt≤300A/us, VDD<BVDSS,STARTING T J=25℃ 4.Pulse Test: Pulse Width≤300us,Duty Cycle≤2% 5.Essentially independent of operating temperature. This transistor is an electrostatic sensitive device Please handle with caution 2/7 Steady, keep you advance 0 SFF73 730 3/7 Steady, keep you advance 0 SFF73 730 4/7 Steady, keep you advance 0 SFF73 730 Fig.10 Gate Test Circuit & Waveform Fig.11 Resistive Switching Test Circuit & Waveform Fig.12 Unclamped Inductive Switching Test Circuit & Waveform 5/7 Steady, keep you advance 0 SFF73 730 Fig.13 Peak Diode Recovery dv/dt Test Circuit & Waveform 6/7 Steady, keep you advance 0 SFF73 730 220F Pa cka ge Dim ension TO TO2 Pac kage Dime Uni Unitt: mm 7/7 Steady, keep you advance