LMH6551 Differential, High Speed Op Amp General Description Features The LMH™6551 is a high performance voltage feedback differential amplifier. The LMH6551 has the high speed and low distortion necessary for driving high performance ADCs as well as the current handling capability to drive signals over balanced transmission lines like CAT 5 data cables. The LMH6551 can handle a wide range of video and data formats. n n n n n With external gain set resistors, the LMH6551 can be used at any desired gain. Gain flexibility coupled with high speed makes the LMH6551 suitable for use as an IF amplifier in high performance communications equipment. The LMH6551 is available in the space saving SOIC and MSOP packages. 370 MHz −3 dB bandwidth (VOUT = 0.5 VPP) 50 MHz 0.1 dB bandwidth 2400 V/µs slew Rate 18 ns settling time to 0.05% −94/−96 dB HD2/HD3 @ 5 MHz Applications n n n n n n n Differential AD driver Video over twisted pair Differential line driver Single end to differential converter High speed differential signaling IF/RF amplifier SAW filter buffer/driver Typical Application 20133210 Single Ended Input Differential Output. Gain = AV=RF/RG Where VIN is measured single ended and VOUT is measured differentially. (Each individual output will equal ± VIN/2.) LMH™ is a trademark of National Semiconductor Corporation. © 2005 National Semiconductor Corporation DS201332 www.national.com LMH6551 Differential, High Speed Op Amp February 2005 LMH6551 Connection Diagram 8-Pin SOIC & MSOP 20133208 Top View Ordering Information Package 8-Pin SOIC 8–Pin MSOP www.national.com Part Number LMH6551MA LMH6551MAX LMH6551MM LMH6551MMX Package Marking LMH6551MA Transport Media 95/Rails 2.5k Units Tape and Reel 1k Units Tape and Reel AU1A 3.5k Units Tape and Reel 2 NSC Drawing M08A MUA08A Soldering Information If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 5) Human Body Model Machine Model Supply Voltage Common Mode Input Voltage Maximum Input Current (pins 1, 2, 7, 8) Maximum Output Current (pins 4, 5) Infrared or Convection (20 sec) 235˚C Wave Soldering (10 sec) 260˚C Operating Ratings (Note 1) 2000V 200V Operating Temperature Range −40˚C to +125˚C 13.2V Storage Temperature Range −65˚C to +150˚C Total Supply Voltage ± Vs 3V to 12V Package Thermal Resistance (θJA) (Note 4) 30mA (Note 3) 8-Pin MSOP 235˚C/W 8-Pin SOIC 150˚C/W ± 5V Electrical Characteristics (Note 2) Single ended in differential out, TA= 25˚C, G = +1, VS = ± 5V, VCM = 0V, RF = RG = 365Ω, RL = 500Ω;; Unless specified Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 8) Typ (Note 7) Max (Note 8) Units AC Performance (Differential) SSBW Small Signal −3 dB Bandwidth VOUT = 0.5 VPP 370 MHz LSBW Large Signal −3 dB Bandwidth VOUT = 2 VPP 340 MHz Large Signal −3 dB Bandwidth VOUT = 4 VPP 320 MHz 0.1 dB Bandwidth VOUT = 2 VPP 50 MHz Slew Rate 4V Step(Note 6) 2400 V/µs Rise/Fall Time 2V Step 1.8 ns Settling Time 2V Step, 0.05% 18 ns 200 MHz VCM Pin AC Performance (Common Mode Feedback Amplifier) Common Mode Small Signal Bandwidth VCMbypass capacitor removed Distortion and Noise Response HD2 VO = 2 VPP, f = 5 MHz, RL=800Ω −94 dBc HD2 VO = 2 VPP, f = 20MHz, RL=800Ω −85 dBc HD3 VO = 2 VPP, f = 5 MHz, RL=800Ω −96 dBc HD3 VO = 2 VPP, f = 20 MHz, RL=800Ω −72 dBc en Input Referred Voltage Noise Freq ≥ 1 MHz 6.0 nV/ in Input Referred Noise Current Freq ≥ 1 MHz 1.5 pA/ Input Offset Voltage Differential Mode, VID = 0, VCM = 0 0.5 Input Offset Voltage Average Temperature Drift (Note 10) −0.8 Input Bias Current (Note 9) -4 Input Bias Current Average Temperature Drift (Note 10) −2.6 nA/˚C Input Bias Difference Difference in Bias currents between the two inputs 0.03 µA CMRR Common Mode Rejection Ratio DC, VCM = 0V, VID = 0V 80 dBc RIN Input Resistance Differential 5 MΩ CIN Input Capacitance Differential 1 pF CMVR Input Common Mode Voltage Range CMRR > 53dB +3.2 −4.7 V Input Characteristics (Differential) VOSD IBI 72 +3.1 −4.6 ±4 ±6 mV µV/˚C 0 -10 µA VCMPin Input Characteristics (Common Mode Feedback Amplifier) 3 www.national.com LMH6551 Absolute Maximum Ratings (Note 1) LMH6551 ± 5V Electrical Characteristics (Note 2) (Continued) Single ended in differential out, TA= 25˚C, G = +1, VS = ± 5V, VCM = 0V, RF = RG = 365Ω, RL = 500Ω;; Unless specified Boldface limits apply at the temperature extremes. Symbol VOSC Parameter Conditions Min (Note 8) Typ (Note 7) Max (Note 8) Units ±5 ±8 mV Input Offset Voltage Common Mode, VID = 0 0.5 Input Offset Voltage Average Temperature Drift (Note 10) 8.2 µV/˚C Input Bias Current (Note 9) VCM CMRR VID = 0V, 1V step on VCM pin, measure VOD −2 µA 70 75 dB ∆VO,CM/∆VCM 0.995 0.999 Output Voltage Swing Single Ended, Peak to Peak ± 7.8 V Output Common Mode Voltage Range VID = 0 V, ± 7.38 ± 7.18 ± 3.69 ± 3.8 V IOUT Linear Output Current VOUT = 0V ± 50 ± 65 mA ISC Short Circuit Current Output Shorted to Ground VIN = 3V Single Ended(Note 3)l 140 mA Output Balance Error ∆VOUTCommon Mode /∆VOUTDIfferential , VOUT = 0.5 Vpp Differential, f = 10 MHz −70 dB Input Resistance Common Mode Gain 25 kΩ 1.005 V/V Output Performance Miscellaneous Performance AVOL Open Loop Gain Differential 70 dB PSRR Power Supply Rejection Ratio DC, ∆VS = ± 1V 74 90 dB Supply Current RL = ∞ 11 12.5 14.5 16.5 mA 5V Electrical Characteristics (Note 2) Single ended in differential out, TA= 25˚C, G = +1, VS = 5V, VCM = 2.5V, RF = RG = 365Ω, RL = 500Ω; ; Unless specifiedBoldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 8) Typ (Note 7) Max (Note 8) Units SSBW Small Signal −3 dB Bandwidth RL = 500Ω, VOUT = 0.5 VPP 350 MHz LSBW Large Signal −3 dB Bandwidth RL = 500Ω, VOUT = 2 VPP 300 MHz 0.1 dB Bandwidth VOUT = 2 VPP 50 MHz Slew Rate 4V Step(Note 6) 1800 V/µs Rise/Fall Time, 10% to 90% 4V Step 2 ns Settling Time 4V Step, 0.05% 17 ns 170 MHz −84 dBc VCM Pin AC Performance (Common Mode Feedback Amplifier) Common Mode Small Signal Bandwidth Distortion and Noise Response 2nd Harmonic Distortion VO = 2 VPP, f = 5 MHz, RL=800Ω VO = 2 VPP, f = 20 MHz, RL=800Ω −69 dBc 3rd Harmonic Distortion VO = 2 VPP, f = 5 MHz, RL=800Ω −93 dBc VO = 2 VPP, f = 20 MHz, RL=800Ω −67 en Input Referred Noise Voltage Freq ≥ 1 MHz 6.0 nV/ in Input Referred Noise Current Freq ≥ 1 MHz 1.5 pA/ HD2 HD2 HD3 HD3 Input Characteristics (Differential) www.national.com 4 dBc (Note 2) (Continued) Single ended in differential out, TA= 25˚C, G = +1, VS = 5V, VCM = 2.5V, RF = RG = 365Ω, RL = 500Ω; ; Unless specifiedBoldface limits apply at the temperature extremes. Symbol VOSD IBIAS CMRR VICM Parameter Conditions Min (Note 8) Typ (Note 7) Max (Note 8) Units ±4 ±6 mV Input Offset Voltage Differential Mode, VID = 0, VCM = 0 0.5 Input Offset Voltage Average Temperature Drift (Note 10) −0.8 Input Bias Current (Note 9) −4 Input Bias Current Average Temperature Drift (Note 10) −3 nA/˚C Input Bias Current Difference Difference in Bias currents between the two inputs 0.03 µA 70 µV/˚C 0 -10 µA Common-Mode Rejection Ratio DC, VID = 0V 78 dBc Input Resistance Differential 5 MΩ Input Capacitance Differential 1 pF Input Common Mode Range CMRR > 53 dB +3.1 +0.4 +3.2 +0.3 VCMPin Input Characteristics (Common Mode Feedback Amplifier) Input Offset Voltage Common Mode, VID = 0 0.5 Input Offset Voltage Average Temperature Drift Input Bias Current mV 5.8 µV/˚C 3 µA 75 dB 25 kΩ VCM CMRR VID = 0, 1V step on VCM pin, measure VOD Input Resistance VCM pin to ground Common Mode Gain ∆VO,CM/∆VCM 0.995 0.991 70 ±5 ±8 1.005 V/V Output Performance VOUT Output Voltage Swing Single Ended, Peak to Peak, VS= ± 2.5V, VCM= 0V ± 2.4 ± 2.8 V IOUT Linear Output Current VOUT = 0V Differential ± 45 ± 60 mA ISC Output Short Circuit Current Output Shorted to Ground VIN = 3V Single Ended(Note 3) 230 mA CMVR Output Common Mode Voltage Range VID = 0, VCMpin = 1.2V and 3.8V 3.8 1.2 V Output Balance Error ∆VOUTCommon Mode /∆VOUTDIfferential , VOUT = 1Vpp Differential, f = 10 MHz −65 dB 3.72 1.23 Miscellaneous Performance PSRR IS Open Loop Gain DC, Differential 70 dB Power Supply Rejection Ratio DC, ∆VS = ± 0.5V 72 88 dB Supply Current RL = ∞ 10 11.5 13.5 15.5 mA 3.3V Electrical Characteristics (Note 2) Single ended in differential out, TA= 25˚C, G = +1, VS = 3.3V, VCM = 1.65V, RF = RG = 365Ω, RL = 500Ω; ; Unless specifiedBoldface limits apply at the temperature extremes. Symbol SSBW Parameter Small Signal −3 dB Bandwidth Conditions RL = 500Ω, VOUT = 0.5 VPP 5 Min (Note 8) Typ (Note 7) 320 Max (Note 8) Units MHz www.national.com LMH6551 5V Electrical Characteristics LMH6551 3.3V Electrical Characteristics (Note 2) (Continued) Single ended in differential out, TA= 25˚C, G = +1, VS = 3.3V, VCM = 1.65V, RF = RG = 365Ω, RL = 500Ω; ; Unless specifiedBoldface limits apply at the temperature extremes. Symbol LSBW Parameter Conditions Min (Note 8) Typ (Note 7) Max (Note 8) Units RL = 500Ω, VOUT = 1 VPP 300 MHz Slew Rate 1V Step(Note 6) 700 V/µs Rise/Fall Time, 10% to 90% 1V Step 2 ns 95 MHz VO = 1 VPP, f = 5 MHz, RL=800Ω −93 dBc VO = 1 VPP, f = 20 MHz, RL=800Ω −74 dBc VO = 1VPP, f = 5 MHz, RL=800Ω −85 dBc VO = 1VPP, f = 20 MHz, RL=800Ω −69 dBc Large Signal −3 dB Bandwidth VCM Pin AC Performance (Common Mode Feedback Amplifier) Common Mode Small Signal Bandwidth Distortion and Noise Response HD2 2nd Harmonic Distortion HD2 HD3 3 rd Harmonic Distortion HD3 Input Characteristics (Differential) VOSD IBIAS CMRR VICM Input Offset Voltage Differential Mode, VID = 0, VCM = 0 1 mV Input Offset Voltage Average Temperature Drift (Note 10) 1.6 µV/˚C Input Bias Current (Note 9) −8 µA Input Bias Current Average Temperature Drift (Note 10) 9.5 nA/˚C Input Bias Current Difference Difference in Bias currents between the two inputs 0.3 µA Common-Mode Rejection Ratio DC, VID = 0V 78 dBc Input Resistance Differential 5 MΩ Input Capacitance Differential 1 pF Input Common Mode Range CMRR > 53 dB +1.5 +0.3 VCMPin Input Characteristics (Common Mode Feedback Amplifier) Input Offset Voltage Common Mode, VID = 0 1 Input Offset Voltage Average Temperature Drift Input Bias Current VCM CMRR VID = 0, 1V step on VCM pin, measure VOD Input Resistance VCM pin to ground Common Mode Gain ∆VO,CM/∆VCM ±5 mV 18.6 µV/˚C 3 µA 60 dB 25 kΩ 0.999 V/V ± 0.75 ± 0.9 V ± 30 Output Performance VOUT Output Voltage Swing Single Ended, Peak to Peak, VS= 3.3V, VCM= 1.65V IOUT Linear Output Current VOUT = 0V Differential ± 40 mA ISC Output Short Circuit Current Output Shorted to Ground VIN = 2V Single Ended(Note 3) 200 mA CMVR Output Common Mode Voltage Range VID = 0, VCMpin = 1.2V and 2.1V 2.1 1.2 V Output Balance Error ∆VOUTCommon Mode /∆VOUTDIfferential , VOUT = 1Vpp Differential, f = 10 MHz −65 dB Open Loop Gain DC, Differential 70 dB Power Supply Rejection Ratio DC, ∆VS = ± 0.5V 75 dB Miscellaneous Performance PSRR www.national.com 6 (Note 2) (Continued) Single ended in differential out, TA= 25˚C, G = +1, VS = 3.3V, VCM = 1.65V, RF = RG = 365Ω, RL = 500Ω; ; Unless specifiedBoldface limits apply at the temperature extremes. Symbol IS Parameter Supply Current Conditions Min (Note 8) RL = ∞ Typ (Note 7) 8 Max (Note 8) Units mA Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables. Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Note 3: The maximum output current (IOUT) is determined by device power dissipation limitations. Note 4: The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is P D= (TJ(MAX) — TA)/ θJA. All numbers apply for package soldered directly into a 2 layer PC board with zero air flow. Note 5: Human body model: 1.5 kΩ in series with 100 pF. Machine model: 0Ω in series with 200pF. Note 6: Slew Rate is the average of the rising and falling edges. Note 7: Typical numbers are the most likely parametric norm. Note 8: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Note 9: Negative input current implies current flowing out of the device. Note 10: Drift determined by dividing the change in parameter at temperature extremes by the total temperature change. Note 11: Parameter is guaranteed by design. 7 www.national.com LMH6551 3.3V Electrical Characteristics LMH6551 Typical Performance Characteristics (TA = 25˚C, VS = ± 5V, RL = 500Ω, RF = 365Ω, AV=1; Unless Specified). Frequency Response vs. Supply Voltage Frequency Response 20133214 20133215 Frequency Response vs. VOUT Frequency Response vs. Capacitive Load 20133221 20133216 Suggested ROUT vs. Cap Load Suggested ROUT vs. Cap Load 20133222 www.national.com 20133223 8 1 VPP Pulse Response Single Ended Input 2 VPP Pulse Response Single Ended Input 20133226 20133227 Large Signal Pulse Response Output Common Mode Pulse Response 20133224 20133235 Distortion vs. Frequency Distortion vs. Frequency 20133229 20133228 9 www.national.com LMH6551 Typical Performance Characteristics (TA = 25˚C, VS = ±5V, RL = 500Ω, RF = 365Ω, AV=1; Unless Specified). (Continued) LMH6551 Typical Performance Characteristics (TA = 25˚C, VS = ±5V, RL = 500Ω, RF = 365Ω, AV=1; Unless Specified). (Continued) Distortion vs. Frequency Distortion vs. Supply Voltage (Split Supplies) 20133238 20133236 Distortion vs. Supply Voltage (Single Supply) Maximum VOUT vs. IOUT 20133237 20133230 Minimum VOUT vs. IOUT Closed Loop Output Impedance 20133217 20133231 www.national.com 10 Closed Loop Output Impedance Closed Loop Output Impedance 20133218 20133239 PSRR PSRR 20133219 20133220 CMRR Balance Error 20133213 20133233 11 www.national.com LMH6551 Typical Performance Characteristics (TA = 25˚C, VS = ±5V, RL = 500Ω, RF = 365Ω, AV=1; Unless Specified). (Continued) LMH6551 Application Section quencies board layout symmetry becomes a factor as well. Precision resistors of at least 0.1% accuracy are recommended and careful board layout will also be required. The LMH6551 is a fully differential amplifier designed to provide low distortion amplification to wide bandwidth differential signals. The LMH6551, though fully integrated for ultimate balance and distortion performance, functionally provides three channels. Two of these channels are the V+ and V− signal path channels, which function similarly to inverting mode operational amplifiers and are the primary signal paths. The third channel is the common mode feedback circuit. This is the circuit that sets the output common mode as well as driving the V+ and V− outputs to be equal magnitude and opposite phase, even when only one of the two input channels is driven. The common mode feedback circuit allows single ended to differential operation. The LMH6551 is a voltage feedback amplifier with gain set by external resistors. Output common mode voltage is set by the VCM pin. This pin should be driven by a low impedance reference and should be bypassed to ground with a 0.1 µF ceramic capacitor. Any signal coupling into the VCM will be passed along to the output and will reduce the dynamic range of the amplifier. 20133202 FULLY DIFFERENTIAL OPERATION The LMH6551 will perform best when used with split supplies and in a fully differential configuration. See Figure 1 and Figure 3 for recommend circuits. FIGURE 2. Fully Differential Cable Driver With up to 15 VPP differential output voltage swing and 80 mA of linear drive current the LMH6551 makes an excellent cable driver as shown in Figure 2. The LMH6551 is also suitable for driving differential cables from a single ended source. 20133204 FIGURE 1. Typical Application The circuit shown in Figure 1 is a typical fully differential application as might be used to drive an ADC. In this circuit closed loop gain, (AV) = VOUT/ VIN = RF/RG. For all the applications in this data sheet VINis presumed to be the voltage presented to the circuit by the signal source. For differential signals this will be the difference of the signals on each input (which will be double the magnitude of each individual signal), while in single ended inputs it will just be the driven input signal. The resistors RO help keep the amplifier stable when presented with a load CL as is typical in an analog to digital converter (ADC). When fed with a differential signal, the LMH6551 provides excellent distortion, balance and common mode rejection provided the resistors RF, RG and RO are well matched and strict symmetry is observed in board layout. With a DC CMRR of over 80dB, the DC and low frequency CMRR of most circuits will be dominated by the external resistors and board trace resistance. At higher fre- www.national.com 20133210 FIGURE 3. Single Ended in Differential Out 12 (Continued) The LMH6551 requires supply bypassing capacitors as shown in Figure 4 and Figure 5. The 0.01 µF and 0.1 µF capacitors should be leadless SMT ceramic capacitors and should be no more than 3 mm from the supply pins. The SMT capacitors should be connected directly to a ground plane. Thin traces or small vias will reduce the effectiveness of bypass capacitors. Also shown in both figures is a capacitor from the VCM pin to ground. The VCM pin is a high impedance input to a buffer which sets the output common mode voltage. Any noise on this input is transferred directly to the output. Output common mode noise will result in loss of dynamic range, degraded CMRR, degraded Balance and higher distortion. The VCM pin should be bypassed even if the pin in not used. There is an internal resistive divider on chip to set the output common mode voltage to the mid point of the supply pins. The impedance looking into this pin is approximately 25kΩ. If a different output common mode voltage is desired drive this pin with a clean, accurate voltage reference. 20133201 FIGURE 4. Split Supply Bypassing Capacitors 20133212 FIGURE 5. Single Supply Bypassing Capacitors 13 www.national.com LMH6551 Application Section LMH6551 Application Section (Continued) SINGLE ENDED INPUT TO DIFFERENTIAL OUTPUT The LMH6551 provides excellent performance as an active balun transformer. Figure 3 shows a typical application where an LMH6551 is used to produce a differential signal from a single ended source. In single ended input operation the output common mode voltage is set by the VCMpin as in fully differential mode. In this mode the common mode feedback circuit must also, recreate the signal that is not present on the unused differential input pin. The performance chart titled “Balance Error” is the measurement of the effectiveness of the amplifier as a transformer. The common mode feedback circuit is responsible for ensuring balanced output with a single ended input. Balance error is defined as the amount of input signal that couples into the output common mode. It is measured as a the undesired output common mode swing divided by the signal on the input. Balance error when the amplifier is driven with a differential signal is nearly unmeasurable if the resistors and board are well matched. Balance error can be caused by either a channel to channel gain error, or phase error. Either condition will produce a common mode shift. The chart titled “Balance Error” measures the balance error with a single ended input as that is the most demanding mode of operation for the amplifier. Supply and VCMpin bypassing is also critical in this mode of operation. See the above section on FULLY DIFFERENTIAL OPERATION for bypassing recommendations. 20133209 FIGURE 7. AC Coupled for Single Supply Operation DRIVING ANALOG TO DIGITAL CONVERTERS Analog to digital converters (ADC) present challenging load conditions. They typically have high impedance inputs with large and often variable capacitive components. As well, there are usually current spikes associated with switched capacitor or sample and hold circuits. Figure 8 shows a typical circuit for driving an ADC. The two 56Ω resistors serve to isolate the capacitive loading of the ADC from the amplifier and ensure stability. In addition, the resistors form part of a low pass filter which helps to provide anti alias and noise reduction functions. The two 39 pF capacitors help to smooth the current spikes associated with the internal switching circuits of the ADC and also are a key component in the low pass filtering of the ADC input. In the circuit of Figure 8the cutoff frequency of the filter is 1/ (2*π*56Ω *(39 pF + 14pF)) = 53MHz (which is slightly less than the sampling frequency). Note that the ADC input capacitance must be factored into the frequency response of the input filter, and that being a differential input the effective input capacitance is double. Also as shown in Figure 8 the input capacitance to many ADCs is variable based on the clock cycle. See the data sheet for your particular ADC for details. SINGLE SUPPLY OPERATION The input stage of the LMH6551 has a built in offset of 0.7V towards the lower supply to accommodate single supply operation with single ended inputs. As shown in Figure 6, the input common mode voltage is less than the output common voltage. It is set by current flowing through the feedback network from the device output. The input common mode range of 0.4V to 3.2V places constraints on gain settings. Possible solutions to this limitation include AC coupling the input signal, using split power supplies and limiting stage gain. AC coupling with single supply is shown in Figure 7. In Figure 6 below closed loop gain = AV= RF/RG. Please note that in single ended to differential operation VIN is measured single ended while VOUT is measured differentially. This means that gain is really 1/2 or 6 dB less when measured on either of the output pins separately. VICM= Input common mode voltage = (V+IN+V−IN)/2. 20133211 FIGURE 6. Relating AVto Input/Output Common Mode Voltages www.national.com 14 USING TRANSFORMERS (Continued) Transformers are useful for impedance transformation as well as for single to differential, and differential to single ended conversion. A transformer can be used to step up the output voltage of the amplifier to drive very high impedance loads as shown in Figure 9. Figure 11 shows the opposite case where the output voltage is stepped down to drive a low impedance load. Transformers have limitations that must be considered before choosing to use one. Compared to a differential amplifier, the most serious limitations of a transformer are the inability to pass DC and balance error (which causes distortion and gain errors). For most applications the LMH6551 will have adequate output swing and drive current and a transformer will not be desirable. Transformers are used primarily to interface differential circuits to 50Ω single ended test equipment to simplify diagnostic testing. 20133205 FIGURE 8. Driving an ADC The amplifier and ADC should be located as closely together as possible. Both devices require that the filter components be in close proximity to them. The amplifier needs to have minimal parasitic loading on the output traces and the ADC is sensitive to high frequency noise that may couple in on its input lines. Some high performance ADCs have an input stage that has a bandwidth of several times its sample rate. The sampling process results in all input signals presented to the input stage mixing down into the Nyquist range (DC to Fs/2). See AN-236 for more details on the subsampling process and the requirements this imposes on the filtering necessary in your system. 20133207 FIGURE 9. Transformer Out High Impedance Load 20133232 FIGURE 10. Calculating Transformer Circuit Net Gain 15 www.national.com LMH6551 Application Section LMH6551 Application Section 1. Calculate the quiescent (no-load) power: PAMP = ICC* (VS), where VS = V+ - V−. (Be sure to include any current through the feedback network if VOCM is not mid rail.) 2. Calculate the RMS power dissipated in each of the output stages: PD (rms) = rms ((VS - V+OUT) * I+OUT) + rms ((VS − V−OUT) * I−OUT) , where VOUT and IOUT are the voltage and the current measured at the output pins of the differential amplifier as if they were single ended amplifiers and VS is the total supply voltage. 3. Calculate the total RMS power: PT = PAMP + PD. The maximum power that the LMH6551 package can dissipate at a given temperature can be derived with the following equation: PMAX = (150˚ – TAMB)/ θJA, where TAMB = Ambient temperature (˚C) and θJA = Thermal resistance, from junction to ambient, for a given package (˚C/W). For the SOIC package θJA is 150˚C/W. NOTE: If VCM is not 0V then there will be quiescent current flowing in the feedback network. This current should be included in the thermal calculations and added into the quiescent power dissipation of the amplifier. (Continued) 20133206 FIGURE 11. Transformer Out Low Impedance Load ESD PROTECTION The LMH6551 is protected against electrostatic discharge (ESD) on all pins. The LMH6551 will survive 2000V Human Body model and 200V Machine model events. Under normal operation the ESD diodes have no effect on circuit performance. There are occasions, however, when the ESD diodes will be evident. If the LMH6551 is driven by a large signal while the device is powered down the ESD diodes will conduct . The current that flows through the ESD diodes will either exit the chip through the supply pins or will flow through the device, hence it is possible to power up a chip with a large signal applied to the input pins. Using the shutdown mode is one way to conserve power and still prevent unexpected operation. BOARD LAYOUT The LMH6551 is a very high performance amplifier. In order to get maximum benefit from the differential circuit architecture board layout and component selection is very critical. The circuit board should have low a inductance ground plane and well bypassed broad supply lines. External components should be leadless surface mount types. The feedback network and output matching resistors should be composed of short traces and precision resistors (0.1%). The output matching resistors should be placed within 3-4 mm of the amplifier as should the supply bypass capacitors. The LMH730154 evaluation board is an example of good layout techniques. Evaluation boards are available free of charge through the product folder on National’s web site. The LMH6551 is sensitive to parasitic capacitances on the amplifier inputs and to a lesser extent on the outputs as well. Ground and power plane metal should be removed from beneath the amplifier and from beneath RF and RG. With any differential signal path symmetry is very important. Even small amounts of assymetery will contribute to distortion and balance errors. 20133203 FIGURE 12. Driving 50Ω Test Equipment CAPACITIVE DRIVE As noted in the Driving ADC section, capacitive loads should be isolated from the amplifier output with small valued resistors. This is particularly the case when the load has a resistive component that is 500Ω or higher. A typical ADC has capacitive components of around 10 pF and the resistive component could be 1000Ω or higher. If driving a transmission line, such as 50Ω coaxial or 100Ω twisted pair, using matching resistors will be sufficient to isolate any subsequent capacitance. For other applications see the “Suggested Rout vs. Cap Load” charts in the Typical Performance Characteristics section. POWER DISSIPATION The LMH6551 is optimized for maximum speed and performance in the small form factor of the standard SOIC package, and is essentially a dual channel amplifier. To ensure maximum output drive and highest performance, thermal shutdown is not provided. Therefore, it is of utmost importance to make sure that the TJMAX is never exceeded due to the overall power dissipation. Follow these steps to determine the Maximum power dissipation for the LMH6551: www.national.com 16 evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization: (Continued) EVALUATION BOARD Generally, a good high frequency layout will keep power supply and ground traces away from the inverting input and output pins. Parasitic capacitances on these nodes to ground will cause frequency response peaking and possible circuit oscillations (see Application Note OA-15 for more information). National Semiconductor suggests the following Device Package Evaluation Board Part Number LMH6551MA SOIC LMH730154 These evaluation boards can be shipped when a device sample request is placed with National Semiconductor. 17 www.national.com LMH6551 Application Section LMH6551 Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin SOIC NS Package Number M08A 8–Pin MSOP NS Package Number MUA08A www.national.com 18 LMH6551 Differential, High Speed Op Amp Notes National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. 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