NSC CD40174BCN

CD40174BM/CD40174BC Hex D Flip-Flop
CD40175BM/CD40175BC Quad D Flip-Flop
General Description
The CD40174B consists of six positive-edge triggered
D-type flip-flops; the true outputs from each flip-flop are externally available. The CD40175B consists of four positiveedge triggered D-type flip-flops; both the true and complement outputs from each flip-flop are externally available.
All flip-flops are controlled by a common clock and a common clear. Information at the D inputs meeting the set-up
time requirements is transferred to the Q outputs on the
positive-going edge of the clock pulse. The clearing operation, enabled by a negative pulse at Clear input, clears all Q
outputs to logical ‘‘0’’ and Qs (CD40175B only) to logical ‘‘1’’.
All inputs are protected from static discharge by diode
clamps to VDD and VSS.
Features
Y
Y
Y
Y
Y
Wide supply voltage range
3V to 15V
High noise immunity
0.45 VDD (typ.)
Low power TTL
fan out of 2 driving 74L
compatibility
or 1 driving 74 LS
Equivalent to MC14174B, MC14175B
Equivalent to MM74C174, MM74C175
Connection Diagrams
CD40174B
Dual-In-Line Package
CD40175B
Dual-In-Line Package
TL/F/5987 – 1
TL/F/5987 – 2
Top View
Top View
Order Number CD40174B or CD40175B
Truth Table
Inputs
H
L
X
u
NC
*
C1995 National Semiconductor Corporation
TL/F/5987
Outputs
Clear
Clock
D
Q
Q*
L
H
H
H
H
X
u
u
X
H
L
X
X
L
H
L
NC
NC
H
L
H
NC
NC
e
e
e
e
e
e
H
L
High level
Low level
Irrelevant
Transition from low to high level
No change
Q for CD40175B only
RRD-B30M105/Printed in U. S. A.
CD40174BM/CD40174BC Hex D Flip-Flop
CD40175BM/CD40175BC Quad D Flip-Flop
February 1988
Absolute Maximum Ratings (Notes 1 & 2)
Recommended Operating
Conditions (Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
DC Supply Voltage (VDD)
Input Voltage (VIN)
Storage Temperature Range (TS)
Power Dissipation (PD)
Dual-In-Line
Small Outline
Lead Temperature (TL)
(Soldering, 10 seconds)
DC Supply Voltage (VDD)
Input Voltage (VIN)
Operating Temperature Range (TA)
CD40XXXBM
CD40XXXBC
b 0.5V to a 18V
b 0.5V to VDD a 0.5VDC
b 65§ C to a 150§ C
3V to 15 VDC
0V to VDD VDC
b 55§ C to a 125§ C
b 40§ C to a 85§ C
700 mW
500 mW
260§ C
DC Electrical Characteristics CD40174BM/CD40175BM (Note 2)
Symbol
Parameter
b 55§ C
Conditions
Min
a 25§ C
Max
Min
Typ
a 125§ C
Max
Min
Units
Max
IDD
Quiescent Device Current
VDD e 5V, VIN e VDD or VSS
VDD e 10V, VIN e VDD or VSS
VDD e 15V, VIN e VDD or VSS
1.0
2.0
4.0
1.0
2.0
4.0
30
60
120
mA
mA
mA
VOL
Low Level Output Voltage
lIOl k 1 mA
VDD e 5V
VDD e 10V
VDD e 15V
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
VOH
High Level Output Voltage
lIOl k 1 mA
VDD e 5V
VDD e 10V
VDD e 15V
4.95
9.95
14.95
4.95
9.95
14.95
VIL
Low Level Input Voltage
VDD e 5V, VO e 0.5V or 4.5V
VDD e 10V, VO e 1V or 9V
VDD e 15V, VO e 1.5V or 13.5V
VIH
High Level Input Voltage
VDD e 5V, VO e 0.5V or 4.5V
VDD e 10V, VO e 1V or 9V
VDD e 15V, VO e 1.5V or 13.5V
3.5
7.0
11.0
3.5
7.0
11.0
IOL
Low Level Output Current
(Note 3)
VDD e 5V, VO e 0.4V
VDD e 10V, VO e 0.5V
VDD e 15V, VO e 1.5V
0.64
1.6
4.2
0.51
1.3
3.4
IOH
High Level Output Current VDD e 5V, VO e 4.6V
(Note 3)
VDD e 10V, VO e 9.5V
VDD e 15V, VO e 13.5V
IIN
Input Current
5
10
15
1.5
3.0
4.0
b 0.64
b 1.6
b 4.2
VDD e 15V, VIN e 0V
VDD e 15V, VIN e 15V
4.95
9.95
14.95
V
V
V
1.5
3.0
4.0
0.88
2.25
8.8
b 0.51 b 0.8.8
b 1.3 b 2.25
b 3.4
b 8.8
1.5
3.0
4.0
3.5
7.0
11.0
V
V
V
0.36
0.9
2.4
mA
mA
mA
b 0.36
b 0.9
b 2.4
mA
mA
mA
b 10 b 5 b 0.1
b 0.1
10b5
0.1
V
V
V
b 1.0
0.1
1.0
mA
mA
DC Electrical Characteristics CD40174BC/CD40175BC (Note 2)
Symbol
Parameter
b 40§ C
Conditions
Min
IDD
Quiescent Device Current
VDD e 5V, VIN e VDD or VSS
VDD e 10V, VIN e VDD or VSS
VDD e 15V, VIN e VDD or VSS
Max
4
8
16
a 25§ C
Min
Typ
a 85§ C
Max
4
8
16
Min
Units
Max
30
60
120
mA
mA
mA
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device
operation.
Note 2: VSS e 0V unless otherwise specified.
Note 3: IOH and IOL are tested one output at a time.
2
DC Electrical Characteristics CD40174BC/CD40175BC (Note 2) (Continued)
Symbol
Parameter
b 40§ C
Conditions
Min
VOL
Low Level Output Voltage VDD e 5V
VDD e 10V
VDD e 15V
VOH
High Level Output Voltage VDD e 5V
VDD e 10V
VDD e 15V
VIL
Low Level Input Voltage
VDD e 5V, VO e 0.5V or 4.5V
VDD e 10V, VO e 1V or 9V
VDD e 15V, VO e 1.5V or 13.5V
VIH
High Level Input Voltage
VDD e 5V, VO e 0.5V or 4.5V
VDD e 10V, VO e 1V or 9V
VDD e 15V, VO e 1.5V or 13.5V
IOL
Low Level Output Current VDD e 5V, VO e 0.4V
(Note 3)
VDD e 10V, VO e 0.5V
VDD e 15V, VO e 1.5V
IOH
High Level Output Current VDD e 5V, VO e 4.6V
(Note 3)
VDD e 10V, VO e 9.5V
VDD e 15V, VO e 13.5V
IIN
Input Current
Max
a 25§ C
Min
Typ
0.05
0.05
0.05
4.95
9.95
14.95
Min
3.5
7.0
11.0
0.52
1.3
3.6
0.44
1.1
3.0
0.88
2.25
8.8
10b5
V
V
V
3.5
7.0
11.0
V
V
V
0.36
0.9
2.4
mA
mA
mA
b 0.36
b 0.9
b 2.4
mA
mA
mA
b 10 b 5 b 0.30
0.30
V
V
V
1.5
3.0
4.0
b 0.44 b 0.88
b 1.1 b 2.25
b 3.0
b 8.8
b 0.30
V
V
V
4.95
9.95
14.95
1.5
3.0
4.0
3.5
7.0
11.0
Units
Max
0.05
0.05
0.05
5
10
15
1.5
3.0
4.0
VDD e 15V, VIN e 0V
VDD e 15V, VIN e 15V
Max
0.05
0.05
0.05
4.95
9.95
14.95
b 0.52
b 1.3
b 3.6
a 85§ C
b 1.0
0.30
1.0
mA
mA
AC Electrical Characteristics*
TA e 25§ C, CL e 50 pF, RL e 200k and tr e tf e 20 ns, unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Units
190
75
60
300
110
90
ns
ns
ns
tPHL, tPLH
Propagation Delay Time to a
Logical ‘‘0’’ or Logical ‘‘1’’ from
Clock to Q or Q (CD40175 Only)
VDD e 5V
VDD e 10V
VDD e 15V
tPHL
Propagation Delay Time to a
Logical ‘‘0’’ from Clear to Q
VDD e 5V
VDD e 10V
VDD e 15V
180
70
60
300
110
90
ns
ns
ns
tPLH
Propagation Delay Time to a Logical
‘‘1’’ from Clear to Q (CD40175 Only)
VDD e 5V
VDD e 10V
VDD e 15V
230
90
75
400
150
120
ns
ns
ns
tSU
Time Prior to Clock Pulse that
Data must be Present
VDD e 5V
VDD e 10V
VDD e 15V
45
15
13
100
40
35
ns
ns
ns
tH
Time after Clock Pulse that
Data Must be Held
VDD e 5V
VDD e 10V
VDD e 15V
b 11
b4
b3
0
0
0
ns
ns
ns
tTHL, tTLH
Transition Time
VDD e 5V
VDD e 10V
VDD e 15V
100
50
40
200
100
80
ns
ns
ns
tWH, tWL
Minimum Clock Pulse Width
VDD e 5V
VDD e 10V
VDD e 15V
130
45
40
250
100
80
ns
ns
ns
3
AC Electrical Characteristics*
TA e 25§ C, CL e 50 pF, RL e 200k and tr e tf e 20 ns, unless otherwise specified (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
120
45
40
250
100
80
ns
ns
ns
tWL
Minimum Clear Pulse Width
VDD e 5V
VDD e 10V
VDD e 15V
tRCL
Maximum Clock Rise Time
VDD e 5V
VDD e 10V
VDD e 15V
15
5.0
5.0
tfCL
Maximum Clock Fall Time
VDD e 5V
VDD e 10V
VDD e 15V
15
5.0
5.0
50
50
50
ms
ms
ms
fCL
Maximum Clock Frequency
VDD e 5V
VDD e 10V
VDD e 15V
2.0
5.0
6.0
3.5
10
12
MHz
MHz
MHz
CIN
Input Capacitance
Clear Input
Other Input
10
5.0
CPD
Power Dissipation
Per Package (Note 4)
130
ms
ms
ms
15
7.5
pF
pF
pF
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the
devices should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual
device operation.
Note 2: VSS e 0V unless otherwise specified.
Note 3: IOH and IOL are tested one output at a time.
Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see 54C/74C Family Characteristics application
note, AN-90.
Switching Time Waveforms
TL/F/5987 – 3
tr e tf e 20 ns
4
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number CD40174BMJ, CD40174BCJ, CD40175BMJ or CD40175BCJ
NS Package Number J16A
5
CD40174BM/CD40174BC Hex D Flip-Flop
CD40175BM/CD40175BC Quad D Flip-Flop
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number CD40174BMN, CD40174BCN, CD40174BMN or CD40175BCN
NS Package Number N16E
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