ADTECH ADT7310

ADT7310
General Description
The ADT7310 is system specific power supply IC
that is suitable for color CCD camera.
ADT7310
Other features include over-current protection,
YYWW
thermal shutdown. It reduces design complexity
and external component count.
Package outline of the ADT7310
Features
Applications
• Input voltage range : 4.75V to 18V
• Color CCD camera
• Multiple output voltage channel available
• CCTV camera
- 2 channel 3.3V outputs , 200mA / 60mA max.
• distributed power system
- 1.8V output , 40mA max.
(3.3V / 1.8V / 5V / 15V / -7V)
- 5V boost converter output , 100mA max.
- 15V output , 10mA max.
- Externally adjustable negative voltage output (-7V typical)
• Power-on-reset output & power sequence
• Protection : thermal shutdown , over-current protection
• Small size(5x5 mm2 body) and thermally enhanced 28 Pin MLF Package
Typical Application Circuit
U1
CL1
CF1
L2
D2
VIN
QN1
5V
1.8V
C2
CL7
C20
Rs2
C100
U2
CF2
C200
CL2
Rs1
QP1
CF3
U0
(ADT7310)
C10
Rn2
L1
D1
VIN2
U3
-7V
Rn1
CL3
15V
C1
CL6
C30
Ct
CL4
CL5
RBO
3.3VD
C40
3.3VA
* This specifications are subject to be changed without notice
Oct. 17. 2008 / Rev. 0.0
1/15
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ADT7310
Part List
Component
Type
Value ( Model )
Manufacturer
U0
IC
ADT7310
ADTech
U1, 2, 3
IC
BAT54SWT1
ON Semiconductor
QP1
Chip transistor
2SB1424
ROHM
QN1
Chip transistor
MMBT4401LT1
ON Semiconductor
Chip SBD
RSX101M-30
ROHM
L1
Chip inductor
47uH / 590mA (SLF6028T-470MR59)
TDK
L2
Chip inductor
47uH / 590mA (SLF6028T-470MR59)
TDK
C1 , 2
MLCC
10uF / 10V / X5R
Murata
C100
Tantalum capacitor
10uF / 25V (T91C106K025AT)
KEMET
C200
MLCC
0.1uF / 25V
-
CF1 , 2 , 3
MLCC
1uF / 25V / X5R
Murata
CL1 , 2 , 3
MLCC
2.2uF / 25V / X5R
Murata
C10
MLCC
1nF
-
C20
MLCC
22nF
-
C30
MLCC
22nF
-
Ct
MLCC
18pF
-
CL4, 5, 7
MLCC
2.2uF / 25V / X5R
Murata
CL6
MLCC
4.7uF / 25V / X5R
Murata
C40
MLCC
10nF
-
Rs1 , 2
Chip resistor
0.1Ω / 1%
-
Rn1
Chip resistor
45.3㏀ / 1%
-
Rn2
Chip resistor
12.1㏀ / 1%
-
D1, D2
※ SBD (Schottky Barrier Diode)
* This specifications are subject to be changed without notice
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ADT7310
Pin Configuration
28 27 26 25 24 23 22
1
21
2
20
3
19
ADT7310
4
5
17
6
16
7
15
8
Pin Description
18
9
10 11 12 13 14
I : Input , O : Output , IO : Input/Output , P : Power , G : Ground , A : Analog , D : Digital
Pin No.
Name
I/O
Type
Description
1
RS2
I
A
Current sensing and voltage feed-forward for boost converter
2
VIN1
-
P
Main power input
3
RS1
I
A
Current sensing and voltage feed-forward for buck converter
4
PWM
O
D
PWM output for buck converter
5
CC1
O
A
Capacitor terminal for phase compensation of buck converter
6
GND2
-
G
Ground
7
VIN2
-
P
Second power input
8
VO1
O
A
3.3V output for digital part
9
GND3
-
G
Ground
10
DLY
O
A
Delay time control for RBO signal
11
RBO
O
D
Power on reset output
12
CT
O
A
Capacitor terminal for tuning oscillation frequency
13
VO2
O
A
3.3V output for analog part
14
GND4
-
G
Ground
15
VHO
O
A
15V output for CCD positive voltage
16
VREG
O
A
Internal reference voltage output
17
VNO1
I
A
Feedback voltage input for VNO (-7V typical)
18
DRV3
O
D
Driving signal output of charge pump inverter
19
GND5
-
G
Ground
20
VIN5
-
P
Power input for 15V output
21
DRV2
O
D
Driving signal output of charge pump doubler
22
VIN4
-
P
Power input for charge pump block
23
GND6
-
G
Ground
24
VLO
O
A
1.8V output
25
VIN3
-
P
Feedback voltage input for boost converter
26
DRV1
O
D
PWM output for boost converter
27
CC2
O
A
Capacitor terminal for phase compensation of boost converter
28
GND1
-
G
Ground
* This specifications are subject to be changed without notice
Oct. 17. 2008 / Rev. 0.0
3/15
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ADT7310
Functional Block Diagram
RS2 CC2 DRV1
VIN1
5V
1.8V
PWM
controller
Internal
Reg
BIAS
LDO
VIN4
OSC
C/P
doubler
DRV2
VIN5
Thermal
Shutdown
RS1
PWM
PWM
controller
Power Sequencer
C/P
inverter
DRV3
feedback
VNO1
CC1
VIN2
LDO
POR
LDO
3.3VD
RBO
3.3VA
LDO
15V
* This specifications are subject to be changed without notice
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ADT7310
Absolute Maximum Ratings
Parameter
Symbol
Min.
Typ.
Max.
Unit
VIN
-
-
20
V
Power dissipation (Ta=70℃) *1
PDmax
-
-
2.2
W
Storage temperature
TSTG
-65
-
+150
℃
Junction temperature
TJmax
-
-
+150
℃
Thermal resistance
ΘJA
-
35
-
℃/W
Power supply voltage
*1 derate 35℃/W above +70℃.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. These are stress ratings only, and functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Operating Ratings
Parameter
Symbol
Min.
Typ.
Max.
Unit
Power supply voltage
VIN
4.75
12
18
V
Operating temperature
TOPR
-20
-
+85
℃
Junction temperature
TJ
-
-
+125
℃
Max. power dissipation (Ta=70℃)*1
PD
-
-
1.5
W
*1 This spec. indicates that junction temperature of the device is under 125℃. In specific applications,
this is recommended under this power dissipation specification.
Electrical Characteristics (Ta = 25℃ , VIN = 12V , unless otherwise noted.)
Parameter
Condition
Min
Typ
Max
Unit
-
4.75
12
18
V
VIN=12V, w/o loading
5.0
8.0
11.0
㎃
VIN=12V , C30 =22㎋
-
8.5
-
㎳
3.0
3.3
3.6
V
Note
Basic Function
Operating supply voltage
ICC with no load
Tdelay
Power on reset
VOH
Over-temperature
protection
-
On
Junction temperature at OT enable
-
140
-
℃
Off
Junction temperature at OT release
-
110
-
℃
VIN=12V , max. load current
-
58
-
%
Continuous mode , Ct=13㎊
400
500
600
㎑
Note1
Continuous mode , Ct=18㎊
300
400
500
㎑
Note2
VIN=12V
3.5
3.7
3.9
V
Efficiency
Switching frequency
Buck Converter (+3.7V output)
Output voltage (VIN2)
* This specifications are subject to be changed without notice
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ADT7310
Electrical Characteristics (continued)
Parameter
Condition
Min.
Typ.
Max.
Unit
3.0
3.3
3.6
V
Note
+3.3VD output
VIN=12V , IO=180㎃
Output voltage
Output drive current
VIN=12V
-
180
200
㎃
Current limit
VIN=12V
-
480
-
㎃
Load regulation
IO=0 to 200㎃
-
90
200
㎷
Ripple rejection
IO=200㎃ , freq=10㎑
-
40
-
㏈
3.0
3.3
3.6
V
+3.3VA output
Output voltage
VIN=12V , IO=50㎃
Output drive current
VIN=12V
-
50
60
㎃
Current limit
VIN=12V
-
180
-
㎃
Load regulation
IO=0 to 60㎃
-
60
100
㎷
Ripple rejection
IO=60㎃ , freq=10㎑
-
40
-
㏈
VIN=12V , IO=25㎃
1.7
1.8
1.9
V
+1.8V output
Output voltage
Output drive current
VIN=12V
-
25
40
㎃
Current limit
VIN=12V
-
200
-
㎃
Load regulation
IO=0 to 40㎃
-
20
40
㎷
Ripple rejection
IO=40㎃ , freq=10㎑
-
40
-
㏈
14.55
15.00
15.45
V
+15V output
VIN=12V , IO=5㎃
Output voltage
Output drive current
VIN=12V
-
5
10
㎃
Current limit
VIN=12V
-
20
-
㎃
IO=0 to 10㎃
-
30
50
㎷
-7.5
-7.0
-6.5
V
Inflow current
-
2
5
㎃
Io=0 to -5㎃
-
30
100
㎷
4.75
5.00
5.25
V
-
50
100
㎃
Load regulation
-7V output (Rn1=45.3㏀ , Rn2=12.1㏀ , unless otherwise noted.)
Output voltage
VIN=12V , Io=-2㎃
Output drive current
Load regulation
Boost Converter (+5V output)
Output voltage (VIN3)
Maximum output current
VIN=12V , IO=80㎃
VIN=12V
Note 1. This switching frequency is suitable to 5V VIN operating condition.
Note 2. This switching frequency is suitable to 12V VIN operating condition.
* This specifications are subject to be changed without notice
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ADT7310
Typical Performance Characteristics
3.3VA Change vs Temperature
3.0
2.0
2.0
3.3VA Change (%)
3.3VD Change (%)
3.3VD Change vs. Temperature
3.0
1.0
0.0
-1.0
1.0
0.0
-1.0
-2.0
-2.0
-3.0
-3.0
-20
0
20
40
60
80
Temperature (℃)
100
120
-20
0
3.0
2.0
2.0
1.0
0.0
-1.0
-2.0
120
1.0
0.0
-1.0
-2.0
-3.0
-3.0
-20
0
20
40
60
80
Temperature (℃)
100
120
-20
0
15V Change vs Temperature
3.0
2.0
2.0
1.0
0.0
-1.0
-1.0
-3.0
-3.0
20
40
60
80
Temperature (℃)
100
120
0.0
-2.0
0
100
1.0
-2.0
-20
20
40
60
80
Temperature (℃)
-7V Change vs Temperature
3.0
-7V Change (%)
15V Change (%)
100
1.8V Change vs Temperature
3.0
1.8V Change (%)
5V Change (%)
5V Change vs Temperature
20
40
60
80
Temperature (℃)
120
-20
0
20
40
60
80
Temperature (℃)
100
120
* This specifications are subject to be changed without notice
Oct. 17. 2008 / Rev. 0.0
7/15
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ADT7310
Typical Performance Characteristics
Switching Frequency vs Temperature
Efficiency vs Load Current (Buck)
100
500
VIN=5V
450
80
Efficiency (%)
Frequency (kHz)
475
425
400
375
350
VIN=12V
VIN=18V
60
40
325
300
20
-20
0
20
40
60
80
Temperature (℃)
100
120
0
200
400
600
Load Current (mA)
800
1000
* This specifications are subject to be changed without notice
Oct. 17. 2008 / Rev. 0.0
8/15
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ADT7310
Operation Description
DEVICE INFORMATION
Note that external resistors for tuning negative voltage output
The ADT7310 includes one step down DC-DC switching buck
required as accurate as possible. It is recommended 1% accur-
converter, one step up DC-DC switching boost converter, cha-
acy. Because -7V output is generated by two cascaded charge
rge pump boost converter, charge pump inverting converter,
pump converter, this channel has operating voltage limitation.
and several LDOs.
With the operation above -7.5V, it is saturated and its regulati-
Especially produced for powering CCD camera applications,
on performance degraded.
this device provides various power channels for composing the
+15V channel is generated with two cascaded charge pump co-
CCD applied camera system. These channel are 3.3V, 5V, 15V
nverters and one LDO. This channel output supplied current to
, -7V and 1.8V. From these channel, it is possible to supply
CCD device. So, its channel output noise affects image to noi-
all the powers required for the application in one power supply
se directly. This is why one LDO is added and therefore the
device, ADT7310.
ADT7310 provides clear +15V output to the system.
The ADT7310 is assembled with small size and thermally enhanced MLF (Micro Lead Frame) package.
LDO
With wide input operating voltage range and one stop power
This device has four LDOs integrated (+3.3V 2 channel, +15V
supply configuration, it is very easy to design new specific set.
and +1.8V channel). Because the ADT7310 provided for using
CCD camera application, the noise of each channel output mu-
BUCK CONVERTER
st be minimized. Integration of LDOs trade off noiseless output
Buck converter generates internal supply voltage (approxima-
and heat dissipation performance of the device. From these
tely 3.7V). As required wide input supply range from 4.75V to
aspect, each channel load capability and input-output dropout
18V, intermediate power is needed. From this intermediate
conditions are designed. By these considerations this device
power all the channel outputs re-generated. Using a current
provides optimum application function. Note that the heavy
mode architecture with asynchronous rectification, the buck
load current and high line voltage application will produce the-
converter have the ability to deliver sufficient current to the
mal constraint.
following power supply channels.
POWER ON SEQUENCE
BOOST CONVERTER
CCD camera application made by various devices requires ma-
5V output channel is generated by the boost converter. Operat-
ny different supply voltages. Also with different operating rati-
ing with current mode step-up DC-DC converter, its input volt-
ng between devices, it is seriously considered to power up se-
age is buck converter output voltage (3.7V typical). With this
quence. Fortunately CCD camera application has only two cri-
boost converter output, supplied the power at the following
tical power supplies, +15V and -7V for powering the CCD.
charge pump converters for generating +15V and -7V output.
Power on sequence that the system needs is as follows :
Also it is provided +5V output with 100mA load current inde-
i) the -7V must be supplied lastly.
pendently. In case of upper 100mA load, must be considered
ii) the +15V must be supplied before the -7V.
the device’s heat dissipation constraint.
iii) other power supplies have no order.
Followed by the upper sequence, the ADT7310 operate succe-
CHARGE PUMP CONVERTER
ssfully when it is powered up. Further the ADT7310 will mon-
By these converters the ADT7310 provides +15V and -7V cha-
itor +3.3V channel voltage and generate RBO signal to reset
nnel outputs. For these two channel generation, it is used three
the DSP device. This RBO signal also follows after the -7V
charge pump converters, one with externally composed and
channel settling.
others with integrated. In case of generating charge pump inve-
VIN
rter the part of the inverter are placed at the outside of the devi-7V
ce for its inherent limitation of negative voltage operation. -7V
+15V
inverter is possible to change its output voltage by tuning the
RBO
external resistors.
* This specifications are subject to be changed without notice
Oct. 17. 2008 / Rev. 0.0
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ADT7310
Application Hints
LDO CONSIDERATIONS
re range of -55℃ to +125℃, will only vary the capacitance to
EXTERNAL CAPACITORS
The ADT7310’s regulators requires external capacitors for
within ±15%. The capacitor type X5R has a similar tolerance
regulator stability. These are specifically designed for CCTV
over a reduced temperature range of -55℃ to +85℃. Many
camera applications requiring minimum board space and
large value ceramic capacitors, larger than 1uF are manufactu-
smallest components. These capacitors must be correctly sel-
red with Z5U or Y5V temperature characteristics. Their capa-
ected for good performance.
citance can drop by more than 50% as the temperature varies
from 25℃ to +85℃. Therefore X7R is recommended over
OUTPUT CAPACITOR
Z5U and Y5V in applications where the ambient temperature
The LDO’s are designed specifically to work with small cera-
will change significantly above or below 25℃.
mic output capacitors. And each LDO’s has its own output
capacitor ranges. Be sure to be connected proper output capa-
Tantalum capacitors are less desirable than ceramic for use as
citor between the output pin and ground.
output capacitors because they are more expensive when com-
For using MLCC, output capacitor value is good to use more
paring equivalent capacitance and voltage ratings in the 0.47uF
than that of the specified to ‘Typical Application Circuit’.
to 4.7uF range.
And its required ESR range are between 10mΩ to 1Ω.
Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This mea-
The output capacitor must meet the requirement for the min-
ns that while it may be possible to find a tantalum capacitor
imum value of capacitance and also have an ESR value that
with an ESR value within the stable range, it would have to be
is within the optimum range for stability.
larger in capacitance than a ceramic capacitor with the same
ESR value. It should also be noted that the ESR of a typical
The LDO’s will remain stable and in regulation with no ext-
tantalum will increase about 2:1 as the temperature goes from
ernal load.
25℃ down to -40℃, so some guard band must be allowed.
CAPACITOR CHARACTERISTICS
BUCK CONSIDERATIONS
The LDO’s are designed to work with ceramic capacitors on
the output to take advantage of the benefits they offer. For
INDUCTOR SELECTION
capacitance values in the range of 0.47uF to 4.7uF, ceramic
There are two main considerations when choosing an inductor;
capacitors are the smallest, least expensive and have the low-
the inductor should not saturate, and the inductor current ripple
est ESR values, thus making them best for eliminating high
is small enough to achieve the desired output voltage ripple.
frequency noise. The ESR of a typical 1.0uF ceramic capacitor
Different saturation current rating specs are followed by differ-
is in the range of 20mΩ to 40mΩ.
ent manufacturers so attention must be given to details. Satura-
The capacitor value can change greatly, depending on the oper-
tion current ratings are typically specified at 25℃ so rating at
ation conditions and capacitor type. So, the output capacitor
max ambient temperature of application should be requested
selection should take account of all the capacitor parameters,
from manufacturer.
to ensure that the specification is met within the application.
The capacitance can vary with DC bias conditions as well as
The saturation current is greater than the sum of the maximum
temperature and frequency of operation. Normally increasing
load current and the worst case average to peak inductor curr-
the DC bias condition can result in the capacitance value fall-
ent. A 47uH inductor with a saturation current rating of at least
ing below the minimum specified limit. It is therefore recom-
590mA is recommended in this application. The inductor’s res-
mended that the capacitor manufacturer’s specifications for
istance should be as low as possible for better efficiency. For
the nominal value capacitor are consulted for all conditions.
CCTV camera application, radiated RF noise from inductor is
critical for high definitive video image. In this application,
The ceramic capacitor’s capacitance can vary with temperatu-
a toroidal or shielded bobbin inductor should be used.
re. The capacitor type X7R, which operates over a temperatu-
* This specifications are subject to be changed without notice
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ADT7310
Application Hints (continued)
where
OUTPUT CAPACITOR SELECTION
IOUTMAX : maximum load current
L : min. inductor value including worst case tolerance
Use a 10uF, 10V ceramic capacitor. Use X7R or X5R types,
do not use Y5V.
The output filter capacitor smoothes out current flow from the
CHARGE PUMP CONSIDERATIONS
inductor to the load, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple.
DOUBLER / INVERTER CAPACITOR SELECTION
These capacitors must be selected with sufficient capacitance
The flying capacitor (CF*) transfers charge from the its input
and sufficiently low ESR to perform these functions.
power supply to the output. A polarized capacitor (tantalum,
The output voltage ripple is caused by the charging and disch-
aluminum electrolytic, etc.) must not be used here, as the
arging of the output capacitor and also due to its ESR and can
capacitor will be reverse biased upon start-up of the ADT7310.
be calculated as :
The size of the flying capacitor and its ESR affect output cur-
Voltage peak-to-peak ripple due to capacitance can be express-
rent capability and ripple characteristic. In this applications,
ed as follows
a 1uF, X7R or X5R type ceramic capacitor is recommended
VPP-C = IRIPPLE / (4 * f * C)
for the flying capacitor.
where IRIPPLE : Average to peak inductor current
f : Minimum switching frequency
The load capacitor (CL1,2,3) of the charge pump plays an imp-
Voltage peak-to-peak ripple due to ESR can be expressed as
ortant part in determining the characteristics of the doubler
follows
output. The ESR of the output load capacitor affects charge
VPP-ESR = (2 * IRIPPLE) * RESR
pump output resistance, which plays a role in determining
Because these two components are out of phase the rms value
output current capability. Both output capacitance and ESR
can be used to get an approximate value of peak-to-peak
affect output voltage ripple. For these reasons, a low value
ripple.
ESR capacitor is recommended.
Voltage peak-to-peak ripple, root mean squared can be expressed as follows
BOOST CONSIDERATIONS
VPP-RMS = √ (VPP-C2 + VPP-ESR2)
Note that the output voltage ripple is dependent on the inductor
current ripple and the ESR of the output capacitor. The ESR
As previously mentioned from the inductor selection at the
is frequency dependent (as well as temperature dependent),
buck converter, inductor at the boost converter also needs to be
make sure the value used for calculations is at the switching
considered two factors when choosing an inductor;
frequency of the part.
the inductor should not saturate, and the inductor current ripple
is small enough to achieve the desired output voltage ripple.
INPUT CAPACITOR SELECTION
By the property of cascading boost converter from buck conv-
The ADT7310 uses 10uF, 25V tantalum capacitor for input
capacitor. Use a mix of input bypass capacitors to control the
voltage overshoot. Use ceramic capacitor for the high frequency decoupling and tantalum capacitor to supply the required
rms input current. Place the input capacitor as close as possible
to the VIN pin of the device. The input filter capacitor supplies
current to the PNP switching transistor of the converter in the
first half of each cycle and reduces voltage ripple imposed on
the input power source. The input current ripple can be calculated as :
I RMS
INDUCTOR SELECTION
V
= I OUTMAX ∗ 1 − OUT
VIN
⎛V
r2 ⎞
∗ ⎜⎜ OUT + ⎟⎟
⎝ VIN 12 ⎠
erter, its inductor saturation current is lower than the that of the
buck converter. In this application, the same 47uH adopted and
is sufficient. Boost converter drives both its load current and
the following charge pump converters for generating +15V and
-7V. For proper operation at the power up time this inductor
needs more saturation current than its total load current required.
OUTPUT CAPACITOR SELECTION
Use a 10uF, 10V ceramic capacitor. Use X7R or X5R types,
do not use Y5V. (the same component as buck converter)
(V − VOUT ) ∗ VOUT
r = IN
L ∗ f ∗ I OUTMAX ∗ VIN
* This specifications are subject to be changed without notice
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ADT7310
Application Hints (continued)
The output filter capacitor smoothes out current flow from the
inductor to the load, helps maintain a steady output voltage
during transient load changes and reduces output voltage ripple
. These capacitors must be selected with sufficient capacitance
and sufficiently low ESR to perform these functions. Though
the output ripple at the boost converter is not critical at the
CCD camera application, care must be needed because its output ripple attacks other power supplies composed in the board
to add ripple voltage noise and induce noise at the image. So,
if produced output ripple don’t affect to the image than it is
recommended to choose one by considering component cost.
* This specifications are subject to be changed without notice
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ADT7310
PCB design for optimized thermal performance
1. Overview
Temperature characteristic of the ADT7310 is dependant to
power dissipation and heat away of the PCB pattern.
Therefore, in design of the PCB pattern, Consideration of the
heat away characteristic is important.
ADT7310 package is designed to provide enhanced thermal
characteristics through the exposed PAD on the bottom surface
of the package. Exposed PAD effectively decrease the thermal
resistance, which in turn provides excellent heat dissipation
from the die.
In order to take full advantage of exposed PAD, the PCB must
have features to effectively conduct heat away from the
package. This can be achieved by incorporating thermal PAD
and thermal VIAs.
PCB to the bottom layers, thermal VIAs need to be
incorporated into the thermal pad design. The number of
thermal VIAs improve the package thermal performance.
Generally, web-constructed VIA is often used in through-hole
applications to facilitate the soldering of a pin to a large plane.
It has a large thermal resistance to the surrounding layer. For
this reason, do not use web-constructed VIA to the thermal
PAD. It is recommended use completely connected VIA to the
surrounding layer (Figure 2).
If the diameter of the VIAs is too large, solder will be pulled
away from the exposed paddle (solder wicking) during the
reflow process. This will decrease thermal characteristic of the
VIA
2. PCB Layout considerations
2.1 Heat transfer
For enhanced thermal performance, the exposed PAD on the
package needs to be soldered to thermal PAD on the PCB.
Furthermore, for proper heat conduction through the PCB,
thermal VIAs need to be incorporated in the PCB in the
thermal PAD region. The exposed PAD should be attached to
the ground plane for proper thermal and electrical
performance.
Figure 1 illustrates primary heat away through GND layer of
the PCB. The presence of large metal planes in the PCB can
heat away 90% of the generated heat in the ADT7310
(Reference 1)
<Figure 2. Thermal Landing and Thermal VIA>
3. Recommended PCB patterns
Figure 3 and 4 show adoptive PCB pattern of the ADT7310.
Top and bottom of the thermal PAD patterns are the same and
connected through the thermal VIAs. Also the bottom thermal
PAD must be connected to adjacent ground plane. It is recommended that an array of thermal VIAs should be incorporated
at 1.0 to 1.2mm pitch with VIA diameter of 0.3 to 0.33mm.
<Figure 1. Heat transfer>
2.2 Thermal PAD
To maximize thermal performance, the size of the thermal
PAD should at least match the exposed PAD size. The size of
the thermal PAD on the bottom PCB layer should be at least as
large as the thermal PAD on the top PCB layer. It is
recommended that the bottom thermal PAD be thermally
connected to a GND layer (Reference 2)
2.3 Thermal VIAs
In order to effectively transfer heat from the top layer of the
<Figure 3. PCB land pattern – Top Layer>
* This specifications are subject to be changed without notice
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ADT7310
PCB design for optimized thermal performance
<Figure 4. PCB land pattern – Bottom Layer>
4. Stencil MASK
In order to effectively remove the heat from the package and to
enhance electrical performance the exposed PAD needs to be
soldered to the thermal PAD, preferably with minimum voids.
If the solder paste coverage is too big, out gassing occurs
during reflow process which may cause defects (splatter,
solder balling). Therefore, It is recommended that smaller
multiple openings in stencil should be used instead of one big
opening for printing solder paste on the thermal PAD region
(Figure 5). This will typically result in 50 to 80% solder paste
coverage
1.0mm dia. Circles
@1.2mm Pitch
<Figure 5. Thermal PAD stencil MASK>
5. Reflow condition
Reflow profile and peak temperature has a strong influence on
void formation. Voids in the thermal PAD region reduce as the
peak reflow temperature is 250~270℃. Solder extrusion from
the bottom side of the PCB reduces as the reflow temperature
is reduced.
Reference :
1. B.Guenin, “Packaging: Designing for Thermal Performance.” Electronics Cooling, May1997.
2. Application Note: “Application Notes for Surface Mount Assembly of Amkor’s Micro Lead Frame
( MLF) Packages.” Amkor Technology, March2001
* This specifications are subject to be changed without notice
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ADT7310
Package ; 28MLF, 5mm x 5mm body (units : mm)
TOP VIEW
SIDE VIEW
BOTTOM VIEW
* This specifications are subject to be changed without notice
Oct. 17. 2008 / Rev. 0.0
15/15
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