[AK1222] AK1222 900MHz Low Power Mixer 1. Overview The AK1222 is a low power mixer. RF and LO frequency range coverage from 100 to 900MHz and IF coverage is from 20 to 100MHz. The RF input provides single-ended 50 interface. LO ports are 50 matched and complementary inputs should be decoupled to the ground. IF output ports are differential open drain outputs. The linearity and power consumption performances can optimize with the resistance connected to the BIAS pin. 2. Features Operating Frequency: Linearity vs Power Selectable architecture 100 to 900MHz Power Consumption:5.3mA, IIP3:+11dBm, Gain:-2dB, NF:12dB Power Consumption:2.9mA, IIP3:+2dBm, Gain:-3.5dB, NF:11.5dB LO input level: 0dBm±5dB Operating Supply Voltage: 4.75 to 5.25 V Package: 16pin UQFN (0.5mm pitch, 3mm x 3mm x 0.60mm) Operating Temperature Range: -40 to 85C MS1314-E-01 2013/05 -1- [AK1222] Table of Contents 1. Overview _______________________________________________________________ 1 2. Features _______________________________________________________________ 1 3. Block Dagram ___________________________________________________________ 3 4. System Diagram _________________________________________________________ 4 5. Pin Functional Description ________________________________________________ 5 6. Absolute Maximum Ratings _______________________________________________ 7 7. Recommended Operating Range ___________________________________________ 7 8. Electrical Characteristics__________________________________________________ 8 9. Typical Performance _____________________________________________________ 9 10. Typical Evaluation Board Schematic _______________________________________ 16 11. IC Interface Schematic ___________________________________________________ 24 12. Outer Dimensions ______________________________________________________ 25 13. Marking _______________________________________________________________ 26 MS1314-E-01 2013/05 -2- [AK1222] BIAS 3. Block Diagram LOINP Iref Lo Buffer LOINN IFOUTP RFIN Mixer VSS VDD IFOUTN Fig. 1 Block Diagram MS1314-E-01 2013/05 -3- [AK1222] 4. System Diagram VSS Current Adjustment Resistor VDD BIAS (Power feeding for Open-drain Output) AK1222 LO Input LOINP LO Buffer Iref LOINN VSS IFOUTP Mixer RF Input Output Load Resistor VSS RLoad BALUN IF Output RFIN IFOUTN VDD VSS VSS VSS VDD VSS Fig. 2 System Diagram MS1314-E-01 2013/05 -4- [AK1222] 5. Pin Functional Description Table 1 Pin Function No. Name I/O Pin Functions 1 RFIN AI RF Input 2 VSS G Ground pin 3 LOINN AI LO Input Negative 4 LOINP AI LO Input Positive 5 NC - Non Connect 6 NC - Non Connect 7 NC - Non Connect 8 NC - Non Connect 9 BIAS Resistance pin for current Remarks Connecting an inductor between this pin and ground. Connecting a resistor between this pin and ground. AIO adjustment 10 VDD 11 IFOUTN P Power Supply IF Output Negative This pin is open drain output. AO It needs power feeding via an inductor. 12 IFOUTP IF Output Positive This pin is open drain output. AO It needs power feeding via an inductor. 13 NC - Non Connect 14 NC - Non Connect 15 NC - Non Connect 16 NC - Non Connect Note) It is recommended to connect NC pins to ground, although it will not make any impact on the electrical characteristics if the pin is open. AI: Analog input pin P: Power supply pin AO: Analog output pin G: Ground pin AIO: Analog I/O pin MS1314-E-01 2013/05 -5- LOINN 3 LOINP 4 NC NC NC 13 TOP VIEW 5 6 7 8 NC 2 14 NC VSS 15 NC 1 16 NC RFIN NC [AK1222] 12 IFOUTP 11 IFOUTN 10 VDD 9 BIAS Fig. 3 Package Pin Layout MS1314-E-01 2013/05 -6- [AK1222] 6. Absolute Maximum Ratings Table 2 Absolute Maximum Ratings Parameter Symbol Min. Max. Unit -0.3 5.5 V Supply Voltage VDD RF Input Power RFPOW 7 dBm LO Input Power LOPOW 12 dBm Storage Temperature Tstg 125 C -55 Remarks Exceeding these maximum ratings may result in damage to the AK1222. Normal operation is not guaranteed at these extremes. 7. Recommended Operating Range Table 3 Recommended Operating Range Symbol Min. Operating Temperature Parameter Ta -40 Supply Voltage VDD 4.75 Typ. 5 Max. Unit 85 C 5.25 V Remarks The specifications are applicable within the recommended operating range (supply voltage/operating temperature). MS1314-E-01 2013/05 -7- [AK1222] 8. Electrical Characteristics 1.Analog Circuit Characteristics Unless otherwise noted IF output=50MHz, LO Input Level=-5dBm to +5dBm, Output Load Resistor (RLoad)=2.2k, VDD=4.75 to 5.25V, Ta=-40 to 85°C Parameter Min. Typ. Max. Unit RF Input Frequency 100 900 MHz LO Input Frequency 100 900 MHz IF output Frequency 20 100 MHz LO Input Power -5 +5 dBm Current Adjustment Resistor(BIAS) 22 56 k IDD 0 Remarks BIAS=22k 5.3 7.9 mA The total current of VDD pin, BIAS=56k 2.9 4.7 mA IFOUTP pin and IFOUTN pin. RFIN=600MHz, Output Load Resistor = 22k Conversion Gain -4 SSB Noise Figure (NF) -2 0 dB 12 14 dB IP1dB -3 0 dBm IIP3 +8 +11 dBm Design guarantee value RFIN=600MHz, Output Load Resistor = 56k Conversion Gain -5.5 SSB Noise Figure (NF) -3.5 -1.5 dB 11.5 13.5 dB IP1dB -9 -6 dBm IIP3 -1 +2 dBm Design guarantee value Note 1) In the shipment test, NC pins and the exposed pad on the center of the back of the package is connected to ground. MS1314-E-01 2013/05 -8- [AK1222] 9. Typical Performance Unless otherwise noted, RF input =600MHz, LO input =550MHz, IF output =50MHz, Output Load Resistor (RLoad)=2.2k 1. Current Adjustment Resistor vs. IIP3, NF, IP1dB, Gain, IDD 14.0 16.0 12.0 15.0 14.0 NF [dB] IIP3 [dBm] 10.0 8.0 6.0 4.0 13.0 12.0 11.0 10.0 2.0 9.0 0.0 8.0 20 30 40 50 60 20 30 BIAS [kΩ] 4.0 5.0 3.0 4.0 50 60 50 60 3.0 2.0 2.0 1.0 Gain [dB] IP1dB [dBm] 40 BIAS [kΩ] 0.0 -1.0 1.0 0.0 -1.0 -2.0 -2.0 -3.0 -3.0 -4.0 -4.0 -5.0 20 30 40 50 60 20 BIAS [kΩ] 30 40 BIAS [kΩ] 6.0 5.0 IDD [mA] 4.0 3.0 2.0 1.0 0.0 20 30 40 50 60 BIAS [kΩ] Fig. 4 Note 1) Current Adjustment Resistor vs. IIP3, NF, IP1dB, Gain, IDD A resistor with 5% tolerance are used. MS1314-E-01 2013/05 -9- [AK1222] 2. Over temperature vs. IIP3, NF, IP1dB, Gain, IDD 14.0 16.0 12.0 15.0 14.0 BIAS=22kΩ BIAS=56kΩ 8.0 6.0 NF [dB] 10.0 IIP3 [dBm] BIAS=22kΩ BIAS=56kΩ 4.0 13.0 12.0 11.0 10.0 2.0 9.0 0.0 8.0 -40 -20 0 20 40 60 80 100 -40 -20 0 Temperature [deg] 4.0 5.0 3.0 4.0 40 60 80 100 BIAS=22kΩ BIAS=56kΩ 3.0 2.0 2.0 1.0 BIAS=22kΩ BIAS=56kΩ 0.0 -1.0 Gain [dB] IP1dB [dBm] 20 Temperature [deg] 1.0 0.0 -1.0 -2.0 -2.0 -3.0 -3.0 -4.0 -5.0 -4.0 -40 -20 0 20 40 60 80 -40 100 -20 0 20 40 60 80 100 Tempurature [deg] Temperature [deg] 6.0 IDD [mA] 5.0 4.0 3.0 2.0 1.0 BIAS=22kΩ BIAS=56kΩ 0.0 -40 -20 0 20 40 60 80 100 Temperature [deg] Fig. 5 Over temperature vs. IIP3, NF, IP1dB, Gain, IDD MS1314-E-01 2013/05 - 10 - [AK1222] 3. Supply voltage vs. IIP3, NF, IP1dB, Gain, IDD 14.0 16.0 12.0 15.0 14.0 8.0 BIAS=22kΩ BIAS=56kΩ 6.0 NF [dB] IIP3 [dBm] 10.0 13.0 12.0 11.0 4.0 10.0 2.0 9.0 0.0 8.0 4.75 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 5.25 4.75 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 5.25 VDD [V] VDD [V] 4.0 3.0 1.0 BIAS=22kΩ BIAS=56kΩ 0.0 -1.0 Gain [dB] 2.0 IP1dB [dBm] BIAS=22kΩ BIAS=56kΩ -2.0 -3.0 -4.0 5.0 4.0 3.0 2.0 1.0 0.0 -1.0 -2.0 -3.0 -4.0 -5.0 BIAS=22kΩ BIAS=56kΩ 4.75 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 5.25 4.75 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 5.25 VDD [V] VDD [V] 6.0 IDD [mA] 5.0 4.0 3.0 2.0 1.0 BIAS=22kΩ BIAS=56kΩ 0.0 4.75 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 5.25 VDD [V] Fig. 6 Supply voltage vs. IIP3, NF, IP1dB, Gain, IDD MS1314-E-01 2013/05 - 11 - [AK1222] 14.0 16.0 12.0 15.0 10.0 14.0 8.0 NF [dB] IIP3 [dBm] 4. RF input frequency vs. IIP3, NF, IP1dB, Gain BIAS=22kΩ BIAS=56kΩ 6.0 4.0 13.0 12.0 11.0 10.0 2.0 9.0 0.0 8.0 100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 RF Frequency [MHz] 600 700 800 900 1000 RF Frequency [MHz] 4.0 5.0 3.0 4.0 3.0 2.0 2.0 1.0 0.0 Gain [dB] IP1dB [dBm] BIAS=22kΩ BIAS=56kΩ BIAS=22kΩ BIAS=56kΩ -1.0 BIAS=22kΩ BIAS=56kΩ 1.0 0.0 -1.0 -2.0 -2.0 -3.0 -3.0 -4.0 -4.0 -5.0 100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 RF Frequency [MHz] Fig. 7 600 700 800 900 1000 RF Frequency [MHz] RF input frequency vs. IIP3, NF, IP1dB, Gain Note 1) AK1222 supports 100MHz to 900MHz RF Input. MS1314-E-01 2013/05 - 12 - [AK1222] 5. IF output frequency vs. IIP3, NF, IP1dB, Gain 14.0 16.0 12.0 15.0 14.0 10.0 BIAS=22kΩ BIAS=56kΩ 8.0 NF [dB] IIP3 [dBm] BIAS=22kΩ BIAS=56kΩ 6.0 4.0 13.0 12.0 11.0 10.0 2.0 9.0 0.0 8.0 20 40 60 80 100 120 20 40 IF Frequency [MHz] 4.0 5.0 3.0 4.0 80 Gain [dB] 2.0 1.0 BIAS=22kΩ BIAS=56kΩ 0.0 100 120 BIAS=22kΩ BIAS=56kΩ 3.0 2.0 IP1dB [dBm] 60 IF Frequency [MHz] -1.0 1.0 0.0 -1.0 -2.0 -2.0 -3.0 -3.0 -4.0 -4.0 -5.0 20 40 60 80 100 120 20 IF Frequency [MHz] 40 60 80 100 120 IF Frequecy [MHz] Fig. 8 IF output frequency vs. IIP3, NF, IP1dB, Gain Note 1) AK1222 supports 20MHz to 100MHz IF Output. MS1314-E-01 2013/05 - 13 - [AK1222] 14.0 16.0 12.0 15.0 10.0 14.0 8.0 NF [dB] IIP3 [dBm] 6. LO input power vs. IIP3, NF, IP1dB, Gain BIAS=22kΩ BIAS=56kΩ 6.0 4.0 BIAS=22kΩ BIAS=56kΩ 13.0 12.0 11.0 10.0 2.0 9.0 0.0 8.0 -20 -15 -10 -5 0 5 10 -20 -15 Lo Level[dBm] [dBm] LOInput Input Level -5 0 4.0 5.0 3.0 4.0 3.0 Gain [dB] 1.0 BIAS=22kΩ BIAS=56kΩ -1.0 10 BIAS=22kΩ BIAS=56kΩ 2.0 0.0 5 Lo [dBm] LOInput Input Level Level [dBm] 2.0 IP1dB [dBm] -10 1.0 0.0 -1.0 -2.0 -2.0 -3.0 -3.0 -4.0 -4.0 -5.0 -20 -15 -10 -5 0 5 10 -20 Lo [dBm] LOInput Input Level Level [dBm] -15 -10 -5 0 5 10 Lo [dBm] LOInput Input Level Level [dBm] Fig. 9 LO input power vs. IIP3, NF, IP1dB, Gain Note 1) AK1222 supports -5dBm to 5dBm LO input power. MS1314-E-01 2013/05 - 14 - [AK1222] 14.0 16.0 12.0 15.0 10.0 14.0 8.0 NF [dB] IIP3 [dBm] 7. Output Load Resistor (RLoad) vs. IIP3, NF, IP1dB, Gain BIAS=22kΩ BIAS=56kΩ 6.0 4.0 BIAS=22kΩ BIAS=56kΩ 13.0 12.0 11.0 10.0 2.0 9.0 0.0 8.0 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 1.4 1.6 1.8 RLoad [kΩ] 4.0 5.0 3.0 4.0 2.2 2.4 2.6 2.8 3.0 2.0 BIAS=22kΩ BIAS=56kΩ 2.0 1.0 Gain [dB] IP1dB [dBm] 2 RLoad [kΩ] BIAS=22kΩ BIAS=56kΩ 0.0 -1.0 1.0 0.0 -1.0 -2.0 -2.0 -3.0 -3.0 -4.0 -4.0 -5.0 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 1.4 1.6 RLoad [kΩ] Fig. 10 1.8 2 2.2 2.4 2.6 2.8 RLoad [kΩ] Output Load Resistor (RLoad) vs. IIP3, NF, IP1dB, Gain 8.Leakage RF input=600MHz, -20dBm, LO input=600MHz, 0dBm, Ta=25°C VDD=5V Parameter RF – LO Leakage RF – IF Leakage LO – RF Leakage LO – IF Leakage BIAS Typ. Unit 22k -50 dBc 56k -50 dBc 22k -80 dBc 56k -80 dBc 22k -50 dBc 56k -50 dBc 22k -80 dBc 56k -80 dBc MS1314-E-01 2013/05 - 15 - [AK1222] 10. Typical Evaluation Board Schematic 1. Typical Evaluation Board Schematic VSS Current Adjustment Resistor 22 to 56kΩ BIAS AK1222 LO Input 50Ω 100pF 100pF VSS RF Input C1 LOINP LO Buffer VDD (Powefeeding for Open-drain Output) Iref 10nF 100pF LOINN IFOUTP Mixer RFIN Output Load Resistor RLoad VSS BALUN IF Output IFOUTN L1 VDD VSS RF Input Impedance Matching VSS IF Output Impedance Matching 100pF VSS 10nF VDD VSS Fig. 11 Typical Evaluation Board Schematic Note 1) The open drain output needs power feeding via a inductor. (IFOUTP pin and IFOUTN) Note 2) It is necessary to adjust impedance matching as to its setting frequency. (RF input and IF output) MS1314-E-01 2013/05 - 16 - [AK1222] 2. Example of impedance matching ・RFIN RF Input RFIN C1 AK1222 L1 Frequency[MHz] C1[pF] L1[nH] 150 15 82 450 5.1 22 600 3.6 15 900 3.9 6.8 Frequency[MHz] C1[pF] L1[nH] 150 15 82 Start 50MHz, Stop 1GHz 1 -1 Marker 1 1 0 1 150MHz: 36.1 4.2 Fig. 12 RFIN 150MHz example of impedance matching MS1314-E-01 2013/05 - 17 - [AK1222] Frequency[MHz] C1[pF] L1[nH] 450 5.1 22 Start 50MHz, Stop 1GHz 1 -1 21 Marker 1 2 0 3 1 450MHz: 51.1 3.3 Marker 2 3 394MHz: 25.1 -7.6 Marker 3 524MHz: 85.6 -30.1 Fig. 13 RFIN 450MHz example of impedance matching Frequency[MHz] C1[pF] L1[nH] 600 3.6 15 Start 50MHz, Stop 1GHz 1 -1 1 Marker 1 0 1 600MHz: 46.2 -3.3 Fig. 14 RFIN 600MHz example of impedance matching MS1314-E-01 2013/05 - 18 - [AK1222] Frequency[MHz] C1[pF] L1[nH] 900 3.9 6.8 Start 50MHz, Stop 1GHz 1 -1 Marker 1 0 1 900MHz: 61.8 11.0 Fig. 15 RFIN 900MHz example of impedance matching MS1314-E-01 2013/05 - 19 - [AK1222] ・IFOUT VDD (Powefeeding for Open-drain Output) 10nF 100pF Output Load Resistor VSS RLoad L2 AK1222 BALUN IF Output IFOUTP R1 C2 IFOUTN L3 VSS Frequency [MHz] R1 [k] C2 [pF] L2 [nH] L3 [nH] 30 2.2 3.9 1800 1800 50 2.2 2.0 1000 1000 60 2.2 0.5 1000 1000 80 2.2 N/A 680 680 470nH : Murata LQW21HNR47J00L 100 2.2 N/A 470 470 BALUN:Mini-Circuits ADT4-6T+ 1800nH : Murata LQW21HN1R8J00L 1000nH : Murata LQW21HN1R0J00L 680nH : Murata LQW21HNR68J00L Frequency [MHz] R1 [k] C2 [pF] L2 [nH] L3 [nH] 30 2.2 3.9 1800 1800 3 Start 10MHz, Stop 140MHz -1 1 0 1 Marker 1 30MHz: 55.5 2 -19.7 Marker 2 28MHz: 55.7 -37.3 Marker 3 36MHz: 72.8 38.4 Fig. 16 IFOUT 30MHz example of impedance matching MS1314-E-01 2013/05 - 20 - [AK1222] Frequency [MHz] R1 [k] C2 [pF] L2 [nH] L3 [nH] 50 2.2 2 1000 1000 3 Start 10MHz, Stop 140MHz 1 -1 0 1 Marker 1 50MHz: 43.2 2 -7.5 Marker 2 45MHz: 37.3 -28.6 Marker 3 59MHz: 81.6 34.6 Fig. 17 IFOUT 50MHz example of impedance matching Frequency [MHz] R1 [k] C2 [pF] L2 [nH] L3 [nH] 60 2.2 0.5 1000 1000 Start 10MHz, Stop 140MHz -1 0 1 3 1 Marker 1 60MHz: 52.7 2 -19.0 Marker 2 54MHz: 43.4 -33.1 Marker 3 70MHz: 100.7 -8.4 Fig. 18 IFOUT 60MHz example of impedance matching MS1314-E-01 2013/05 - 21 - [AK1222] Frequency [MHz] R1 [k] C2 [pF] L2 [nH] L3 [nH] 80 2.2 N/A 680 680 Start 10MHz, Stop 140MHz 1 -1 0 1 Marker 1 3 2 80MHz: 38.5 -14.5 Marker 2 75MHz: 31.2 -21.3 Marker 3 95MHz: 78.7 -33.8 Fig. 19 IFOUT 80MHz example of impedance matching 2 R1 [k] C2 [pF] L2 [nH] L3 [nH] 100 2.2 N/A 470 470 Start 10MHz, Stop 140MHz 1 -1 Frequency [MHz] 0 1 Marker 1 100MHz: 38.9 1.6 Marker 2 90MHz: 26.9 -12.2 Fig. 20 IFOUT 100MHz example of impedance matching MS1314-E-01 2013/05 - 22 - [AK1222] ・LOINP/LOINN LO Input 50ohm 100pF LOINP LOINN AK1222 100pF VSS Fig. 21 LOINP/LOINN example of impedance matching MS1314-E-01 2013/05 - 23 - [AK1222] 11. IC Interface Schematic No. Name I/O Function 1 RFIN I RF input pin 3 LOINN I LO input pins 4 LOINP I 27kohm 9 BIAS I/O Analog I/O pin 300ohm 11 IFOUTN O 12 IFOUTP O IF output pins IFOUTP IFOUTN MS1314-E-01 2013/05 - 24 - [AK1222] 12. Outer Dimensions 1 pin marking (Note 1) 0.58±0.05 3.0±0.10 3.0±0.10 1 4 16 5 13 8 9 12 Fig. 22 Outer Dimensions Note 1. 1 pin marking is only a reference for the 1 pin location on the top of package. MS1314-E-01 2013/05 - 25 - [AK1222] 13. Marking (a) Style : QFN (b) Number of pins : 16 (c) 1 pin marking: : ○ (d) Product number : 1222 (e) Date code : YWWL (4 digits) Y: Lower 1 digit of calendar year (Year 2011 → 1, 2012 → 2 ...) WW: Week Lot identification, given to each product lot which is made in a week LOT ID is given in alphabetical order (A, B, C…). 1222(d) YWWL (e) (c) Fig. 23 Marking MS1314-E-01 2013/05 - 26 - [AK1222] IMPORTANT NOTICE 0. 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