ALLEGRO A1323LLHLT-T2

A1321, A1322, and A1323
Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
Discontinued Product
This device is no longer in production. The device should not be
purchased for new design applications. Samples are no longer available.
Date of status change: October 31, 2011
• for the A1321EUA-T and the A1321LUA-T use the A1324LUA-T
• for the A1321ELHLT-T and the A1321LLHLT-T use the A1324LLHLX-T
• for the A1322LUA-T use the A1325LUA-T
• for the A1322LLHLT-T use the A1325LLHLX-T
• for the A1323EUA-T and the A1323LUA-T use the A1326LUA-T
• for the A1323LLHLT-T use the A1326LLHLX-T
NOTE: For detailed information on purchasing options, contact your
local Allegro field applications engineer or sales representative.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
A1321, A1322, and A1323
Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
Features and Benefits
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Description
Temperature-stable quiescent output voltage
Precise recoverability after temperature cycling
Output voltage proportional to magnetic flux density
Ratiometric rail-to-rail output
Improved sensitivity
4.5 to 5.5 V operation
Immunity to mechanical stress
Solid-state reliability
Robust EMC protection
The A132X family of linear Hall-effect sensor ICs are optimized,
sensitive, and temperature-stable. These ratiometric Hall-effect
sensor ICs provide a voltage output that is proportional to the
applied magnetic field. The A132X family has a quiescent
output voltage that is 50% of the supply voltage and output
sensitivity options of 2.5 mV/G, 3.125 mV/G, and 5m V/G.
The features of this family of devices are ideal for use in the
harsh environments found in automotive and industrial linear
and rotary position sensing systems.
Packages: 3 pin SOT23W (suffix LH), and
3 pin SIP (suffix UA)
Each device has a BiCMOS monolithic circuit which integrates
a Hall element, improved temperature-compensating circuitry
to reduce the intrinsic sensitivity drift of the Hall element,
a small-signal high-gain amplifier, and a rail-to-rail lowimpedance output stage.
A proprietary dynamic offset cancellation technique, with
an internal high-frequency clock, reduces the residual offset
voltage normally caused by device overmolding, temperature
dependencies, and thermal stress. The high frequency clock
allows for a greater sampling rate, which results in higher
accuracy and faster signal processing capability. This technique
produces devices that have an extremely stable quiescent output
voltage, are immune to mechanical stress, and have precise
Continued on the next page…
Not to scale
Functional Block Diagram
V+
Amp
Filter
Dynamic Offset
Cancellation
VCC
Gain
Out
Offset
0.1 μF
Trim
Control
GND
A1321-DS, Rev. 23
VOUT
Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
A1321, A1322,
and A1323
Description (continued)
recoverability after temperature cycling. Having the Hall element
and an amplifier on a single chip minimizes many problems normally
associated with low-level analog signals.
Output precision is obtained by internal gain and offset trim adjustments
made at end-of-line during the manufacturing process.
The A132X family is provided in a 3-pin single in-line package
(UA) and a 3-pin surface mount package (LH). Each package is
available in a lead (Pb) free version (suffix, –T) , with a 100% matte
tin plated leadframe.
Selection Guide
Packing1
Part Number
A1321ELHLT-T2
A1321EUA-T3
A1321LLHLT-T2
A1321LUA-T3
A1322LLHLT-T2
Mounting
7-in. reel, 3000 pieces/reel
Surface Mount
Bulk, 500 pieces/bag
SIP through hole
7-in. reel, 3000 pieces/reel
Surface Mount
Bulk, 500 pieces/bag
SIP through hole
7-in. reel, 3000 pieces/reel
Surface Mount
A1322LUA-T3
Bulk, 500 pieces/bag
SIP through hole
A1323EUA-T3
Bulk, 500 pieces/bag
SIP through hole
7-in. reel, 3000 pieces/reel
Surface Mount
Bulk, 500 pieces/bag
SIP through hole
A1323LLHLT-T2
A1323LUA-T3
Ambient, TA
(ºC)
Sensitivity,
Typ. (mV/G)
–40 to 85
5.000
–40 to 150
–40 to 150
3.125
–40 to 85
–40 to 150
2.500
1Contact Allegro
for additional packing options.
2This variant is in production, however, it has been deemed Pre-End of Life. The product is approaching end of life. Within a minimum of 6 months,
the device will enter its final, Last Time Buy, order phase. Status change: January 31, 2011. Suggested replacements: for the A1321ELHLT-T and
the A1321LLHLT-T use the A1324LLHLX-T, for the A1322LLHLT-T use the A1325LLHLX-T, and for the A1323LLHLT-T use the A1326LLHLX-T.
3Variant is in production but has been determined to be NOT FOR NEW DESIGN. This classification indicates that sale of the variant is currently
restricted to existing customer applications. The variant should not be purchased for new design applications because obsolescence in the near
future is probable. Samples are no longer available. Status change: January 31, 2011.
Absolute Maximum Ratings
Characteristic
Symbol
Notes
Rating
Units
8
V
*Additional
current draw may be observed at
voltages above the minimum supply Zener
clamp voltage, VZ(min), due to the Zener diode
turning on.
Supply Voltage
VCC
Output Voltage
VOUT
8
V
Reverse Supply Voltage
VRCC
–0.1
V
Reverse Output Voltage
VROUT
–0.1
V
Output Sink Current
IOUT
10
mA
–40 to 150
ºC
TJ(max)
165
ºC
Tstg
–65 to 170
ºC
Operating Ambient Temperature
TA
Maximum Junction Temperature
Storage Temperature
Range L
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
A1321, A1322,
and A1323
Pin-out Drawings
Package UA
Package LH
3
1
2
1
2
3
Terminal List
Symbol
VCC
VOUT
GND
Number
Package LH
Package UA
1
1
2
3
3
2
Description
Connects power supply to chip
Output from circuit
Ground
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115 Northeast Cutoff
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3
A1321, A1322,
and A1323
Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
DEVICE CHARACTERISTICS1 over operating temperature (TA) range, unless otherwise noted
Characteristic
Symbol
Test Conditions
Min.
Electrical Characteristics; VCC = 5 V, unless otherwise noted
Supply Voltage
Vcc(op)
Operating; Tj < 165°C
4.5
Supply Current
Icc
B = 0, Iout = 0
–
Quiescent Voltage
Vout(q)
B = 0, TA = 25ºC, Iout = 1 mA
2.425
Vout(H)
B = +X, Iout = –1 mA
–
Output Voltage3
B = –X, Iout = 1 mA
–
Vout(L)
3
Output Source Current Limit
Iout(LM)
B = –X, Vout → 0
–1.0
Supply Zener Clamp Voltage
VZ
Icc = 11 mA = Icc(max) + 3
6
Output Bandwidth
BW
–
Clock Frequency
fC
–
Output Characteristics; over VCC range, unless otherwise noted
A1321; Cbypass = 0.1 μF, no load
–
Noise, Peak-to-Peak4
VN
A1322; Cbypass = 0.1 μF, no load
–
A1323; Cbypass = 0.1 μF, no load
–
Output Resistance
Rout
Iout ≤ ±1 mA
–
Output Load Resistance
RL
Iout ≤ ±1 mA, VOUT to GND
4.7
VOUT to GND
–
Output Load Capacitance
CL
Typ.2
Max.
Units
5.0
5.6
2.5
4.7
0.2
–1.5
8.3
30
150
5.5
8
2.575
–
–
–
–
–
–
V
mA
V
V
V
mA
V
kHz
kHz
–
–
–
1.5
–
–
40
25
20
3
–
10
mV
mV
mV
Ω
kΩ
nF
1 Negative
current is defined as conventional current coming out of (sourced from) the specified device terminal.
data is at TA = 25°C. They are for initial design estimations only, and assume optimum manufacturing and application
conditions. Performance may vary for individual units, within the specified maximum and minimum limits.
3 In these tests, the vector X is intended to represent positive and negative fields sufficient to swing the output driver between fully OFF
and saturated (ON), respectively. It is NOT intended to indicate a range of linear operation.
4 Noise specification includes both digital and analog noise.
2 Typical
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115 Northeast Cutoff
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1.508.853.5000; www.allegromicro.com
4
A1321, A1322,
and A1323
Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
MAGNETIC CHARACTERISTICS1,2 over operating temperature range, TA; VCC = 5 V, Iout = –1 mA; unless otherwise noted
Max
Units4
Characteristics
Symbol
Test Condition
Min
Typ3
A1321; TA = 25ºC
4.750
5.000
5.250
mV/G
5
Sensitivity
Sens
2.969
3.125
3.281
mV/G
A1322; TA = 25ºC
2.375
2.500
2.625
mV/G
A1323; TA = 25ºC
Delta Vout(q) as a funcVout(q)(ΔT)
Defined in terms of magnetic flux density, B
–
–
±10
G
tion of temperature
Vout(q)(ΔV)
–
–
±1.5
%
Ratiometry, Vout(q)
Ratiometry, Sens
ΔSens(ΔV)
–
–
±1.5
%
Positive Linearity
Lin+
–
–
±1.5
%
Negative Linearity
Lin–
–
–
±1.5
%
Symmetry
Sym
–
–
±1.5
%
UA Package
Delta Sens at TA = max5 ΔSens(TAmax) From hot to room temperature
–2.5
–
7.5
%
Delta Sens at TA = min5 ΔSens(TAmin) From cold to room temperature
–6
–
4
%
SensDrift
TA = 25°C; after temperature cycling and over time
–
±2
–
%
Sensitivity Drift6
LH Package
Delta Sens at TA = max5 ΔSens(TAmax) From hot to room temperature
–5
–
5
%
Delta Sens at TA = min5 ΔSens(TAmin) From cold to room temperature
–3.5
–
8.5
%
Sensitivity Drift6
SensDrift
TA = 25°C; after temperature cycling and over time
–
±2
–
%
1 Additional information on characteristics is provided in the section Characteristics Definitions, on the next page.
2 Negative current is defined as conventional current coming out of (sourced from) the specified device terminal.
3 Typical data is at T = 25°C, except for ΔSens, and at x.x Sens. Typical data are for initial design estimations only, and assume optimum
A
manufacturing and application conditions. Performance may vary for individual units, within the specified maximum and minimum limits.
In addition, the typical values vary with gain.
4 10 G = 1 millitesla.
5 After 150ºC pre-bake and factory programming.
6 Sensitivity drift is the amount of recovery with time.
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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5
Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
A1321, A1322,
and A1323
Characteristic Definitions
Quiescent Voltage Output. In the quiescent state (no
magnetic field), the output equals one half of the supply voltage
over the operating voltage range and the operating temperature
range. Due to internal component tolerances and thermal considerations, there is a tolerance on the quiescent voltage output
both as a function of supply voltage and as a function of ambient
temperature. For purposes of specification, the quiescent voltage
output as a function of temperature is defined in terms of magnetic flux density, B, as:
ΔVout(q)(ΔΤ) =
Vout(q)(ΤΑ) – Vout(q)(25ºC)
ΔVout(q)(ΔV) =
ΔSens(ΔV) =
2B
Sens(25ºC)
× 100%
× 100%
(4)
Sens(VCC) Sens(5V)
VCC 5 V
× 100%
(5)
Linearity and Symmetry. The on-chip output stage
is designed to provide a linear output with a supply voltage of
5 V. Although application of very high magnetic fields will not
damage these devices, it will force the output into a non-linear
region. Linearity in percent is measured and defined as:
Lin+ =
Lin– =
The stability of sensitivity as a function of temperature is
defined as:
Sens(ΤΑ) – Sens(25ºC)
VCC 5 V
and the percent ratiometric change in sensitivity is
defined as:
(2)
Vout(–B) – Vout(+B)
Vout(q)(VCC) Vout(q)(5V)
(1)
Sensitivity. The presence of a south-pole magnetic field perpendicular to the package face (the branded surface) increases
the output voltage from its quiescent value toward the supply
voltage rail by an amount proportional to the magnetic field
applied. Conversely, the application of a north pole will decrease
the output voltage from its quiescent value. This proportionality
is specified as the sensitivity of the device and is defined as:
ΔSens(ΔΤ) =
The percent ratiometric change in the quiescent voltage output is
defined as:
Sens(25ºC)
This calculation yields the device’s equivalent accuracy,
over the operating temperature range, in gauss (G).
Sens =
Ratiometric. The A132X family features a ratiometric output.
The quiescent voltage output and sensitivity are proportional to
the supply voltage (ratiometric).
Vout(+B) – Vout(q)
× 100%
2(Vout(+B / 2) – Vout(q) )
Vout(–B) – Vout(q)
2(Vout(–B / 2) – Vout(q) )
× 100%
(6)
(7)
and output symmetry as:
(3)
Sym =
Vout(+B) –Vout(q)
Vout(q) – Vout(–B)
× 100%
Allegro MicroSystems, Inc.
115 Northeast Cutoff
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(8)
6
Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
A1321, A1322,
and A1323
Typical Characteristics
150
125
115
85
25
0
-20
Average Supply Current (ICC) vs Temperature
Vcc = 5 V
8
7.5
7
6.5
6
5.5
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
-40
ICC (mA)
(30 pieces, 3 fabrication lots)
TA (°C)
Average Positive Linearity (Lin+) vs Temperature
Vcc = 5 V
104
104
103
103
102
102
101
Lin– (%)
100
99
101
100
98
99
98
97
97
96
96
150
150
125
85
25
TA (°C)
Average Ratiometry, ΔSens(ΔV), vs Temperature
Average Ratiometry, VOUT(q)(ΔV) vs Temperature
101
101
4.5 to 5.0V
5.5 to 5.0V
100.8
100.8
4.5 to 5.0 V
5.5 to 5.0 V
100.6
100.6
100.4
TA (°C)
150
125
150
125
115
85
25
0
99
-20
99.2
99
-40
99.4
99.2
115
99.6
99.4
85
99.6
100
99.8
25
100
99.8
100.2
0
100.2
-40
Ratiometry (%)
100.4
Ratiometry (%)
115
TA (°C)
0
95
-40
125
115
85
25
0
-20
-40
95
-20
Lin+ (%)
Average Negative Linearity (Lin–) vs Temperature
Vcc = 5 V
105
-20
105
TA (°C)
Continued on the next page...
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
A1321, A1322,
and A1323
Typical Characteristics, continued
(30 pieces, 3 fabrication lots)
Average Absolute Quiescent Output Voltage, Vout(q), vs Temperature
Quiescent Output Voltage, Vout(q), vs Vcc
TA = 25°C
Vcc = 5 V
2.575
3
2.9
2.55
2.7
Vout(q) (V)
Vout(q) (V)
2.8
2.525
2.5
2.475
2.6
1321
1322
1323
2.5
2.4
2.3
2.45
2.2
2.1
2
150
125
115
85
25
0
-20
-40
2.425
4.5
TA (°C)
6
Average Absolute Sensitivity, Sens, vs Temperature
Vcc = 5 V
5.5
Average Sensitivity, Sens, vs Vcc
TA = 25°C
6
5.5
5.5
5
5
1321
1322
1323
4.5
4.5
A1322
A1321
4
4
Sens (mV/G)
Sens (mV/G)
5
Vcc (V)
A1323
3.5
3
3.5
3
2.5
2
2.5
1.5
1
150
125
115
85
25
0
-20
-40
2
4.5
5
Vcc (V)
TA (°C)
10
8
8
6
6
4
4
0
TA (°C)
150
125
115
85
25
0
-20
-10
-40
-8
-10
150
-6
-8
125
-4
-6
115
-4
85
-2
25
-2
2
0
0
-20
2
ΔSens (%)
Vout(q)(ΔT) (G)
Average Delta Sensitivity, ΔSens, vs Temperature
Δ in readings at each temperature are relative to 25°C
Vcc = 5 V
-40
10
Average Delta Quiescent Output Voltage, Vout(q)(ΔT), vs Temperature
Δ in readings at each temperature are relative to 25°C
Vcc = 5 V
5.5
TA (°C)
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
A1321, A1322,
and A1323
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic
Symbol
RθJA
Package Thermal Resistance
Test Conditions*
Value Units
Package LH, 1-layer PCB with copper limited to solder pads
228
ºC/W
Package LH, 2-layer PCB with 0.463 in.2 of copper area each side
connected by thermal vias
110
ºC/W
Package UA, 1-layer PCB with copper limited to solder pads
165
ºC/W
*Additional thermal information available on Allegro website.
Power Derating Curve
6
Maximum Allowable VCC (V)
VCC(max)
5
1-layer PCB, Package LH
(RQJA = 228 ºC/W)
VCC(min)
1-layer PCB, Package UA
(RQJA = 165 ºC/W)
4
2-layer PCB, Package LH
(RQJA = 110 ºC/W)
3
2
1
0
20
40
60
80
100
120
140
160
180
Temperature (ºC)
Power Dissipation, PD (mW)
Power Dissipation versus Ambient Temperature
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
2l
(R aye
rP
QJ
C
A =
11 B, P
0 º ac
1-la
C/ ka
W
(R yer PC
) ge L
QJA =
B, P
H
165
ack
ºC/
a
W) ge U
A
1-lay
er P
(R
CB,
QJA =
228 Packag
ºC/W
e LH
)
20
40
60
80
100
120
Temperature (°C)
140
160
180
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
A1321, A1322,
and A1323
Power Derating
The device must be operated below the maximum junction
temperature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the
application. This section presents a procedure for correlating
factors affecting operating TJ. (Thermal data is also available on
the Allegro MicroSystems Web site.)
The Package Thermal Resistance, RJA, is a figure of merit summarizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity,
K, of the printed circuit board, including adjacent devices and
traces. Radiation from the die through the device case, RJC, is
relatively small component of RJA. Ambient air temperature,
TA, and air motion are significant external factors, damped by
overmolding.
The effect of varying power levels (Power Dissipation, PD), can
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD.
PD = VIN × IIN

(1)
T = PD × RJA (2)
TJ = TA + ΔT
Example: Reliability for VCC at TA = 150°C, package UA, using
minimum-K PCB.
Observe the worst-case ratings for the device, specifically:
RJA = 165°C/W, TJ(max) = 165°C, VCC(max) = 5.5 V, and
ICC(max) = 8 mA.
Calculate the maximum allowable power level, PD(max). First,
invert equation 3:
Tmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C
This provides the allowable increase to TJ resulting from internal
power dissipation. Then, invert equation 2:
PD(max) = Tmax ÷ RJA = 15°C ÷ 165 °C/W = 91 mW
Finally, invert equation 1 with respect to voltage:
VCC(est) = PD(max) ÷ ICC(max) = 91 mW ÷ 8 mA = 11.4 V
The result indicates that, at TA, the application and device can
dissipate adequate amounts of heat at voltages ≤VCC(est).
Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced
RJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and
VCC(max) is reliable under these conditions.
(3)
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC = 4 mA, and RJA = 140 °C/W, then:
PD = VCC × ICC = 12 V × 4 mA = 48 mW

T = PD × RJA = 48 mW × 140 °C/W = 7°C
TJ = TA + T = 25°C + 7°C = 32°C
A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding TJ(max),
at a selected RJA and TA.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
A1321, A1322,
and A1323
Package LH, 3-Pin (SOT-23W)
+0.12
2.98 –0.08
1.49 D
4°±4°
3
A
+0.020
0.180–0.053
0.96 D
+0.10
2.90 –0.20
+0.19
1.91 –0.06
2.40
0.70
D
0.25 MIN
1.00
2
1
0.55 REF
0.25 BSC
0.95
Seating Plane
Gauge Plane
8X 10° REF
B
PCB Layout Reference View
Branded Face
1.00 ±0.13
+0.10
0.05 –0.05
0.95 BSC
0.40 ±0.10
For Reference Only; not for tooling use (reference dwg. 802840)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
Active Area Depth, 0.28 mm REF
B
Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
C
Branding scale and appearance at supplier discretion
D
Hall element, not to scale
NNT
1
C
Standard Branding Reference View
N = Last two digits of device part number
T = Temperature code
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
11
Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
A1321, A1322,
and A1323
Package UA, 3-Pin SIP
+0.08
4.09 –0.05
45°
B
C
E
2.04
1.52 ±0.05
1.44 E
Mold Ejector
Pin Indent
+0.08
3.02 –0.05
E
2.16
MAX
Branded
Face
45°
1
D Standard Branding Reference View
0.79 REF
= Supplier emblem
N = Last two digits of device part number
T = Temperature code
A
0.51
REF
1
2
NNT
3
+0.03
0.41 –0.06
15.75 ±0.51
For Reference Only; not for tooling use (reference DWG-9049)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
Dambar removal protrusion (6X)
B Gate burr area
C Active Area Depth, 0.50 mm REF
+0.05
0.43 –0.07
D
Branding scale and appearance at supplier discretion
E
Hall element, not to scale
1.27 NOM
Copyright ©2004-2010, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
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nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
12