A1120 and A1125 Chopper Stabilized Precision Hall Effect Switches Features and Benefits Description ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ The A1120 and A1125 Hall-effect, unipolar switches are extremely temperature-stable and stress-resistant sensor ICs, especially suited for operation over extended temperature ranges to 150°C. Superior high-temperature performance is made possible through dynamic offset cancellation, which reduces the residual offset voltage normally caused by device overmolding, temperature dependencies, and thermal stress. Unipolar switchpoints Resistant to physical stress Superior temperature stability Output short-circuit protection Operation from unregulated supply Reverse battery protection Solid-state reliability Small package sizes Each device includes on a single silicon chip a voltage regulator, Hall-voltage generator, small-signal amplifier, chopper stabilization, Schmitt trigger, and a short-circuit protected open-collector output to sink up to 25 mA. An on-board regulator permits operation with supply voltages of 3 to 24 V. The advantage of operating down to 3 V is that the device can be used in 3 V applications or with additional external resistance in series with the supply pin for greater protection against high voltage transient events. Packages: For the A1120, a south pole of sufficient strength turns the output on. Removal of the magnetic field turns the output off. The A1125 is complementary to the A1120 in that, for the A1125, a south pole turns the output off, and removal of the magnetic field turns the output on. 3-pin SOT23W (suffix LH) 3-pin SIP (suffix UA) Two package styles provide a magnetically optimized package for most applications. Package type LH is a modified SOT23W, surface mount package, while UA is a three-lead ultra-mini SIP for through-hole mounting. Each package type is lead (Pb) free (suffix, –T), with a 100% matte tin plated leadframe. Not to scale Functional Block Diagram VCC Amp Sample and Hold Dynamic Offset Cancellation Regulator Low-Pass Filter To All Subcircuits VOUT Control Current Limit GND A1120-DS, Rev. 9 A1120 and A1125 Chopper Stabilized Precision Hall Effect Switches Selection Guide Packing1 Part Number Mounting Output In South (Positive) Magnetic Field Ambient, TA A1120ELHLX-T 13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount A1120ELHLT-T2 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount A1120EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1120LLHLX-T 13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount A1120LLHLT-T2 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount A1120LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1125ELHLX-T 13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount A1125EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1125LLHLX-T 13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount A1125LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole –40ºC to 85ºC On (logic low) –40ºC to 150ºC –40ºC to 85ºC Off (logic high) –40ºC to 150ºC *Contact Allegro 2Available for additional packing options. through authorized Allegro distributors only. Absolute Maximum Ratings Characteristic Symbol Notes Rating Units Forward Supply Voltage VCC 26.5 V Reverse Supply Voltage VRCC –30 V Output Off Voltage VOUT 26 V Continuous Output Current IOUT 25 mA Reverse Output Current IROUT –50 mA Range E –40 to 85 ºC Range L Operating Ambient Temperature TA –40 to 150 ºC Maximum Junction Temperature TJ(max) 165 ºC Tstg –65 to 170 ºC Storage Temperature GND Pin-out Diagrams 3 2 3 VOUT 1 GND 2 VCC 1 VOUT Package UA VCC Package LH Terminal List Name VCC VOUT GND Description Connects power supply to chip Output from circuit Ground Number Package LH Package UA 1 1 2 3 3 2 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 A1120 and A1125 Chopper Stabilized Precision Hall Effect Switches ELECTRICAL CHARACTERISTICS Valid valid over full operating voltage and ambient temperature ranges; unless otherwise noted Characteristics Min. Typ.1 Max. Unit2 Operating, TJ < 165°C 3 – 24 V A1120 VOUT = 24 V, B < BRP – – 10 μA A1125 VOUT = 24 V, B > BOP – – 10 μA A1120 IOUT = 20 mA, B > BOP – 185 500 mV Symbol Test Conditions Electrical Characteristics Forward Supply Voltage VCC Output Leakage Current IOUTOFF Output Saturation Voltage Output Current Limit VOUT(SAT) IOM A1125 IOUT = 20 mA, B < BRP – 185 500 mV A1120 B > BOP 30 – 60 mA A1125 B < BRP 30 – 60 mA – – 25 μs – 800 – kHz VCC > 3.0 V, B < BRP(min) – 10 G, B > BOP(max) + 10 G Power-On Time3 tPO Chopping Frequency fC Output Rise Time3,4 tr RL = 820 Ω, CS = 20 pF – 0.2 2 μs Output Fall Time3,4 tf RL = 820 Ω, CS = 20 pF – 0.1 2 μs ICC(ON) Supply Current ICC(OFF) Reverse Supply Current IRCC A1120 VCC = 12 V, B > BOP – – 4 mA A1125 VCC = 12 V, B < BRP – – 4 mA A1120 VCC = 12 V, B < BRP – – 4 mA A1125 VCC = 12 V, B > BOP – – 4 mA VRCC = –30 V – – –5 mA Supply Zener Clamp Voltage VZ ICC = 5 mA; TA = 25°C 28 – – V Zener Impedance IZ ICC = 5 mA; TA = 25°C – 50 – Ω A1120 – 35 50 G A1125 – 35 50 G A1120 5 25 – G A1125 5 25 – G (BOP – BRP) – 10 – G Magnetic Characteristics Operate Point BOP Release Point BRP Hysteresis BHYS 1Typical data are are at TA = 25°C and VCC = 12 V, and are for initial design estimations only. G (gauss) = 0.1 mT (millitesla). 3Guaranteed by device design and characterization. 4C = oscilloscope probe capacitance. S 21 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 A1120 and A1125 Chopper Stabilized Precision Hall Effect Switches THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information Characteristic Symbol Test Conditions RθJA Maximum Allowable VCC (V) Package Thermal Resistance Value Units Package LH, 1-layer PCB with copper limited to solder pads 228 ºC/W Package LH, 2-layer PCB with 0.463 in.2 of copper area each side connected by thermal vias 110 ºC/W Package UA, 1-layer PCB with copper limited to solder pads 165 ºC/W Power Derating Curve TJ(max) = 165ºC; ICC = ICC(max) 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 VCC(max) Package LH, 2-layer PCB (RQJA = 110 ºC/W) Package UA, 1-layer PCB (RQJA = 165 ºC/W) Package LH, 1-layer PCB (RQJA = 228 ºC/W) VCC(min) 20 40 60 80 100 120 140 160 180 Power Dissipation, PD (mW) Power Dissipation versus Ambient Temperature 1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 Pa (R cka ge QJ A = L 11 H, 2 0 º -la Pac C/ ye W (R kage ) r PC UA QJA = B , 165 1-la ºC/ yer W) PC B Pac k (R age LH , QJA = 228 1-laye ºC/W r PC B ) 20 40 60 80 100 120 Temperature (°C) 140 160 180 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 A1120 and A1125 Chopper Stabilized Precision Hall Effect Switches Functional Description Operation The output of the A1120 devices switches low (turns on) when a magnetic field perpendicular to the Hall element exceeds the operate point threshold, BOP (see panel A of figure 1). When the magnetic field is reduced below the release point, BRP , the device output goes high (turns off). The output of the A1125 devices switches high (turns off) when a magnetic field perpendicular to the Hall element exceeds the operate point threshold, BOP (see panel B of figure 1). When the magnetic field is reduced below the release point, BRP , the device output goes low (turns on). After turn-on, the output voltage is VOUT(SAT) . The output transistor is capable of sinking current up to the short circuit current limit, IOM, which is a minimum of 30 mA. The difference in the magnetic operate and release points is the hysteresis, BHYS , of the device. This built-in hysteresis allows clean switching of the output even in the presence of external mechanical vibration and electrical noise. Powering-on the device in the hysteresis range (less than BOP and higher than BRP) will Extensive applications information for Hall effect devicers is available in: • Hall-Effect IC Applications Guide, Application Note 27701 • Guidelines for Designing Subassemblies Using Hall-Effect Devices, Application Note 27703.1 • Soldering Methods for Allegro’s Products – SMT and ThroughHole, Application Note 26009 All are provided in Allegro Electronic Data Book, AMS-702, and the Allegro Web site, www.allegromicro.com. VS VCC VOUT VOUT It is strongly recommended that an external bypass capacitor be connected (in close proximity to the Hall element) between the supply and ground of the device to reduce external noise in the application. As is shown in panel B of figure 1, a 0.1 μF capacitor is typical. V+ Switch to Low Switch to Low Switch to High VCC Applications Switch to High V+ give an indeterminate output state. The correct state is attained after the first excursion beyond BOP or BRP . VOUT(SAT) 0 BRP B+ A1120 A1125 VOUT(SAT) 0 BOP BOP 0 BRP 0 VCC BHYS BHYS (A) (B) CBYP 0.1 μF RL VOUT Output GND B+ (C) Figure 1. Device switching behavior. In panels A and B, on the horizontal axis, the B+ direction indicates increasing south polarity magnetic field strength. This behavior can be exhibited when using an electrical circuit such as that shown in panel C. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 Chopper Stabilized Precision Hall Effect Switches Chopper Stabilization Technique When using Hall effect technology, a limiting factor for switchpoint accuracy is the small signal voltage developed across the Hall element. This voltage is disproportionally small relative to the offset that can be produced at the output of the Hall element. This makes it difficult to process the signal while maintaining an accurate, reliable output over the specified operating temperature and voltage ranges. Chopper stabilization is a unique approach used to minimize Hall offset on the chip. The patented Allegro technique, namely Dynamic Quadrature Offset Cancellation, removes key sources of the output drift induced by thermal and mechanical stresses. This offset reduction technique is based on a signal modulationdemodulation process. The undesired offset signal is separated from the magnetic field-induced signal in the frequency domain, through modulation. The subsequent demodulation acts as a modulation process for the offset, causing the magnetic field induced signal to recover its original spectrum at baseband, while the dc offset becomes a high-frequency signal. The magnetic sourced signal then can pass through a low-pass filter, while the modulated DC offset is suppressed. This configuration is illustrated in figure 2. The chopper stabilization technique uses a 400 kHz high frequency clock. For demodulation process, a sample and hold technique is used, where the sampling is performed at twice the chopper frequency (800 kHz). This high-frequency operation allows a greater sampling rate, which results in higher accuracy and faster signal-processing capability. This approach desensitizes the chip to the effects of thermal and mechanical stresses, and produces devices that have extremely stable quiescent Hall output voltages and precise recoverability after temperature cycling. This technique is made possible through the use of a BiCMOS process, which allows the use of low-offset, low-noise amplifiers in combination with high-density logic integration and sample-and-hold circuits. The repeatability of magnetic field-induced switching is affected slightly by a chopper technique. However, the Allegro high frequency chopping approach minimizes the affect of jitter and makes it imperceptible in most applications. Applications that are more likely to be sensitive to such degradation are those requiring precise sensing of alternating magnetic fields; for example, speed sensing of ring-magnet targets. For such applications, Allegro recommends its digital device families with lower sensitivity to jitter. For more information on those devices, contact your Allegro sales representative. Regulator Clock/Logic Hall Element Amp Sample and Hold A1120 and A1125 Low-Pass Filter Figure 2. Model of chopper stabilization technique Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 6 A1120 and A1125 Chopper Stabilized Precision Hall Effect Switches Power Derating The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro MicroSystems website.) The Package Thermal Resistance, RJA, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, RJC, is relatively small component of RJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at PD. PD = VIN × IIN T = PD × RJA TJ = TA + ΔT (1) (2) (3) For example, given common conditions such as: TA= 25°C, VCC = 12 V, ICC = 1.6 mA, and RJA = 165 °C/W, then: A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding TJ(max), at a selected RJA and TA. Example: Reliability for VCC at TA = 150°C, package LH, using a minimum-K PCB. Observe the worst-case ratings for the device, specifically: RJA = 228°C/W, TJ(max) = 165°C, VCC(max) = 24 V, and ICC(max) = 4 mA. Calculate the maximum allowable power level, PD(max). First, invert equation 3: Tmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = Tmax ÷ RJA = 15°C ÷ 228 °C/W = 66 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) ÷ ICC(max) = 66 mW ÷ 4 mA = 16.5 V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages ≤VCC(est). Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced RJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions. PD = VCC × ICC = 12 V × 1.6 mA = 19 mW T = PD × RJA = 19 mW × 165 °C/W = 3°C TJ = TA + T = 25°C + 3°C = 28°C Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 A1120 and A1125 Chopper Stabilized Precision Hall Effect Switches Package LH, 3-Pin (SOT-23W) +0.12 2.98 –0.08 1.49 D 3 +4° 4° –0° A +0.020 0.180–0.053 0.96 D +0.10 2.90 –0.20 +0.19 1.91 –0.06 2.40 0.70 D 0.25 MIN 1.00 2 1 0.55 REF 0.25 BSC 0.95 Seating Plane Gauge Plane 8X 10° REF B PCB Layout Reference View Branded Face 1.00 ±0.13 +0.10 0.05 –0.05 0.95 BSC 0.40 ±0.10 For Reference Only; not for tooling use (reference dwg. 802840) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Active Area Depth, 0.28 mm REF B Reference land pattern layout All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances C Branding scale and appearance at supplier discretion D Hall element, not to scale NNT 1 C Standard Branding Reference View N = Last two digits of device part number T = Temperature code Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 8 A1120 and A1125 Chopper Stabilized Precision Hall Effect Switches Package UA, 3-Pin SIP +0.08 4.09 –0.05 45° B C E 2.04 1.52 ±0.05 1.44 E Mold Ejector Pin Indent +0.08 3.02 –0.05 E Branded Face 45° 1 2.16 MAX D Standard Branding Reference View = Supplier emblem N = Last two digits of device part number T = Temperature code 0.79 REF A 0.51 REF NNT 1 2 3 +0.03 0.41 –0.06 15.75 ±0.51 For Reference Only; not for tooling use (reference DWG-9049) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Dambar removal protrusion (6X) B Gate burr area C Active Area Depth, 0.50 mm REF +0.05 0.43 –0.07 D Branding scale and appearance at supplier discretion E Hall element, not to scale 1.27 NOM Copyright ©2009, Allegro MicroSystems, Inc. The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 9