AMSCO AS3643

austriamicrosystems AG
is now
ams AG
The technical content of this austriamicrosystems datasheet is still valid.
Contact information:
Headquarters:
ams AG
Tobelbaderstrasse 30
8141 Unterpremstaetten, Austria
Tel: +43 (0) 3136 500 0
e-Mail: [email protected]
Please visit our website at www.ams.com
Datasheet
AS3643
1300mA High Current LED Flash Driver
1 General Description
2 Key Features
High
efficiency 4MHz fixed frequency DCDC Boost
converter with soft start allows small coils
The AS3643 includes flash timeout, overvoltage, overtemperature, undervoltage and LED short circuit protection functions. A TXMASK/TORCH function reduces the
flash current in case of parallel operation to the RF
power amplifier and avoids a system shutdown. Alternatively this pin can be used to directly operate the torch
light directly.
Automatic
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The AS3643 is an inductive high efficient DCDC step up
converter with two current sinks. The DCDC step up
converter operates at a fixed frequency of 4MHz and
includes soft startup to allow easy integration into noise
sensitive RF systems. The two current sinks can operate in flash / torch / assist (=video) light modes.
- Stable even in coil current limit
current adjustable up to 1300mA
LED
lv
current adjustment for low battery voltage
PWM
operation for lower output current for reliable
light output of the LED; running at 31.25kHz to avoid
audible noise
functions:
Automatic Flash Timeout timer to protect the LED(s)
Overvoltage and undervoltage Protection
Overtemperature Protection
LED short/open circuit protection
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Protection
2
The AS3643 is controlled by an I C interface and has a
hardware automatic shutdown if SCL=0 for 100ms.
Therefore no additional enable input is required for shutting down of the device once the system shuts down.
2
I
C Interface with automatic shutdown
5V
constant voltage mode operation
Available
in tiny WL-CSP Package, 13 balls 0.5mm
pitch 2.25x1.5x0.6mm, package size
The AS3643 is available in a space-saving WL-CSP
package measuring only 2.25x1.5x0.6mm and operates
over the -30ºC to +85ºC temperature range.
3 Applications
Figure 1. Typical Operating Circuit
Flash/torch/videolight for smartphones, feature-phones,
tablets, DSCs, DVCs
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AS3643
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1.5-4
1 - 33
AS3643
Datasheet, Confidential - P i n o u t
4 Pinout
Pin Assignment
Figure 2. Pin Assignments (Top View)
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Pin Description
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AS3643
Table 1. Pin Description for AS3643
Pin Number
Pin Name
Description
A1
VOUT1
DCDC converter output capacitor - make a short connection to CVOUT / VOUT2
A2
GND
Power and analog ground; make a short connection between both balls
Flash LED current sink
A3
LED_OUT1
B1
SW1
DCDC converter switching node - make a short connection to SW2 / coil LDCDC
GND
Power and analog ground; make a short connection between both balls
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B2
C1
C3
D1
DCDC converter output capacitor - make a short connection to CVOUT / VOUT1
SW2
DCDC converter switching node - make a short connection to SW1 /coil LDCDC
LED_OUT2
ni
C2
VOUT2
SCL
Flash LED current sink
2
serial clock input for I C interface
VIN
Positive supply voltage input - connect to supply and make a short connection
to input capacitor CVIN and to coil LDCDC
E1
SDA
serial data input/output for I C interface (needs external pullup resistor)
E2
STROBE
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D2
E3
TXMASK/
TORCH
2
Digital input with pulldown to control strobe time for flash function
Function 1: Connect to RF power amplifier enable signal - reduces currents
during flash to avoid a system shutdown due to parallel operation of the RF PA
and the flash driver
2
Function 2: Operate torch current level without using the I C interface to
2
operate the torch without need to start a camera processor (if the I C is
connected to the camera processor
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AS3643
Datasheet, Confidential - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 3 may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in Table 4, “Electrical
Characteristics,” on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
Table 3. Absolute Maximum Ratings
Max
Units
VIN to GND
-0.3
+7.0
V
STROBE, TXMASK/TORCH, SCL, SDA to
GND
-0.3
VIN +
0.3
V
SW1/2, VOUT1/2, LED_OUT1/2 to GND
-0.3
+7.0
V
VOUT1/2 to SW1/2
-0.3
voltage between GND pins
0.0
V
Comments
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Min
max. +7V
Note: Diode between VOUT1/2 and
SW1/2
lv
Parameter
V
short connection recommended
mA
Norm: EIA/JESD78
Continuous power dissipation
1230
mW
PT at 70ºC
Continuous power dissipation derating factor
16.7
mW/ºC
PDERATE
ESD HBM
3
pins LED_OUT1/2
±8000
V
ESD HBM
±2000
V
ESD CDM
±500
V
Norm: JEDEC JESD 22-C101E
ESD MM
±100
V
Norm: JEDEC JESD 22-A115-B
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0.0
+100
+IIN
Input Pin Current without causing latchup
-100
Continuous Power Dissipation (TA = +70ºC)
1
2
Electrostatic Discharge
Norm: JEDEC JESD22-A114F
Temperature Ranges and Storage Conditions
Junction to ambient thermal resistance
60
ºC/W
For more information about thermal
metrics, see application note AN01
Thermal Characteristics
Junction Temperature
+150
ºC
Internally limited (overtemperature
protection), max. 20000s
4
-55
+125
ºC
Humidity
5
85
%
Non condensing
+260
ºC
according to IPC/JEDEC J-STD-020
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Storage Temperature Range
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Body Temperature during Soldering
Moisture Sensitivity Level (MSL)
Represents a max. floor life time of
unlimited
MSL 1
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1. Depending on actual PCB layout and PCB used measured on demoboard; for peak power dissipation during
flashing see document 'AS3643 Thermal Measurements'
2. PDERATE derating factor changes the total continuous power dissipation (PT) if the ambient temperature is not
70ºC. Therefore for e.g. TAMB=85ºC calculate PT at 85ºC = PT - PDERATE * (85ºC - 70ºC)
3. Pins LED_OUT1 connected to LED_OUT2 and capacitor CVOUT connected to VOUT1/2 and GND; both GND
pins connected together
4. Measured on AS3643 Demoboard.
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AS3643
Datasheet, Confidential - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
VVIN = +2.7V to +4.4V, TAMB = -30ºC to +85ºC, unless otherwise specified. Typical values are at VVIN = +3.7V, TAMB =
+25ºC, unless otherwise specified.
Table 4. Electrical Characteristics
Symbol
Parameter
Condition
Min
Typ
3.7
Max
Unit
VVIN
Supply Voltage
pin VIN
2.7
VVINREDUCE
Supply Voltage
AS3643 functionally working, but not all
parameters fulfilled
2.5
ISHUTDOWN
Shutdown Current
TXMASK/TORCH=L, SCL=SDA=0V,
VVIN<3.7V
ISTANBY
Standby Current
interface active, TXMASK/TORCH=L,
1
VVIN<3.7V
TAMB
Operating
Temperature
Eta
Application Efficiency
(DCDC and current
sink)
4.4
2.7
4.4
5.5
2.0
V
V
µA
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0.6
-30
1.0
10
µA
25
85
ºC
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General Operating Conditions
LCOIL=0.6µH@3A, LESR=60m,
2
LED_OUT1,2=1300mA , tFLASH<300ms
84
%
DCDC Step Up Converter
VVOUT
DCDC Boost output
Voltage
(pin VOUT1/2)
VVOUT5V
DCDC Boost output
Voltage
(pin VOUT1/2)
constant voltage mode operation
const_v_mode (see page 23)=1
5.0
V
RPMOS
On-resistance
DCDC internal PMOS switch
70
m
RNMOS
On-resistance
DCDC internal NMOS switch
70
m
fCLK
Operating Frequency
All internal timings are derived from this
oscillator
-7.5%
4.0
+7.5%
MHz
3.4
4.2
V
Current Sinks
2.8
5.5
V
LED forward voltage
single LED at 1300mA
2.8
ILED_OUT
LED_OUT1/2 current
sinks output combined
single LED
0
1300
mA
ILED_OUT
LED_OUT1/2 current
sink accuracy
ILED_OUT>650mA or ILED_OUT<500mA
0ºC < TJ < 100ºC
-7
+7
%
500mA<ILED_OUT<650mA, 0ºC < TJ < 100ºC
-5
LED_OUT1/2 ramp
time
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RAMP
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ILED_OUT
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VLED
+5
%
Ramp-up During startup
250
1000
µs
Ramp-down
500
1000
µs
ILED_OUT
LED_OUT current
ripple
ILED_OUT = 1000mA, BW=20MHz
20
mAPP
VILED_COMP
LED_OUT current
sink voltage
compliance
Minimum voltage between pin LED_OUT1/2
and GND for operation of the current sink
286
mV
Te
RIPPLE
VHIGH_VDS Comparator High VDS low vds and high vds comparator - see 4MHz/
VLOW_VDS Comparator Low VDS 1MHz Operating Mode Switching on page 11
ILEAK_
LED_OUT
LED_OUT1/2
Leakage Current
Pins LED_OUT1 and LED_OUT2
870
mV
280
-1.0
0.0
+1.0
µA
Protection and Fault Detection Functions (see page 11)
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AS3643
Datasheet, Confidential - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 4. Electrical Characteristics (Continued)
Symbol
Parameter
Condition
Min
Typ
Max
Unit
VVOUTMAX
VVOUT overvoltage
protection
DCDC Converter Overvoltage Protection
5.0
5.3
5.6
V
ILIMIT
Current Limit for coil
LDCDC (Pin SW)
measured at 40%
3
PWM duty cycle
maximum 40000s
lifetime operation in
overcurrent limit
2.23
A
TOVTEMP
Overtemperature
Protection
UT
VUVLO
1.0
Junction temperature
V
144
ºC
5
ºC
Undervoltage Lockout
Can be adjusted with register
flash_timeout (page 24)
2
1280
ms
accuracy
-7.5
+7.5
%
Falling VVIN
2.25
2.5
V
Rising VVIN
VIH
High Level Input
Voltage
VIL
Low Level Input
Voltage
VIHFLASH
High Level Input
Voltage
VILFLASH
Low Level Input
Voltage
VOL
Low Level Output
Voltage
pin SDA, IOL=3mA
ILEAK
Leakage current
Pins SCL, SDA
IPD
Pulldown current to
5
GND
Pins TORCH, STROBE and TXMASK/TORCH
tDEBTORCH
TORCH debounce
time
2.4
VUVLO VUVLO VUVLO
+0.05 +0.1 +0.15
V
1.26
VVIN
V
0.0
0.54
V
Pin STROBE.
Pin TXMASK/TORCH for TxMask mode
4
(ext_torch_on=01)
0.7
VVIN
V
0.0
0.54
V
0.3
V
+1.0
µA
ca
Pins SCL, SDA.
Pin TXMASK/TORCH in external torch mode
(ext_torch_on=10)
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SCL timeout
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tTIMEOUT
2.0
2.5
Voltage measured between pins VOUT1,2 and
LED_OUT1,2
Flash Timeout Timer
Digital Interface
1.5
1.8
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ST
coil_peak=10b
coil_peak=11b
Overtemperature
Hysteresis
TOVTEMPHY
tFLASHTIMEO
coil_peak=01b
default value
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Flash LED short
circuit detection
voltage
1.0
lv
VLEDSHORT
coil_peak=00b
-1.0
36
6.3
In indicator, assist or flash mode, if SCL is low
longer than this timeout, the AS3643
automatically enters shutdown mode
0.0
9
µA
11.7
ms
35
100
ms
1/
tTIMEO
400
kHz
2
Te
I C mode timings - see Figure 3 on page 7
fSCLK
SCL Clock Frequency
UT
tBUF
Bus Free Time
Between a STOP and
START Condition
1.3
µs
tHD:STA
Hold Time (Repeated)
6
START Condition
0.6
µs
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AS3643
Datasheet, Confidential - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 4. Electrical Characteristics (Continued)
Parameter
tLOW
LOW Period of SCL
Clock
Condition
1.3
µs
tHIGH
HIGH Period of SCL
Clock
0.6
µs
tSU:STA
Setup Time for a
Repeated START
Condition
0.6
µs
tHD:DAT
Data Hold Time
tSU:DAT
Data Setup Time
100
tR
Rise Time of Both
SDA and SCL Signals
20 +
0.1CB
tF
Fall Time of Both SDA
and SCL Signals
20 +
0.1CB
tSU:STO
Setup Time for STOP
Condition
CB
Capacitive Load for
Each Bus Line
CI/O
I/O Capacitance
(SDA, SCL)
7
Min
0
Max
Unit
0.9
µs
ns
300
ns
300
ns
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Typ
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Symbol
0.6
CB — total capacitance of one bus line in pF
µs
400
pF
10
pF
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1. For VBAT=4.5V, SCL=1.8V, SDA=1.8V maximum ISTANBY is <16µA.
2. To improve efficiency at low output currents, the active part of the internal switching transistor PMOS is reduced
in size to 1/5 its original size. This reduces the current required to drive the PMOS transistor and therefore
improves overall efficiency at low output currents.
3. Due to slope compensation of the current limit, ILIMIT changes with duty cycle.
4. The logic input levels VIH and VIL allow for 1.2V or 1.8V supplied driving circuit
5. A pulldown current of 36µA is equal to a pulldown resistor of 42k at 1.5V
6. After this period, the first clock pulse is generated.
7. A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIHMIN of the
SCL signal) to bridge the undefined region of the falling edge of SCL.
8. A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT = to 250ns must then
be met. This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a
device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line tR max +
tSU:DAT = 1000 + 250 = 1250ns before the SCL line is released.
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AS3643
Datasheet, Confidential - E l e c t r i c a l C h a r a c t e r i s t i c s
Timing Diagrams
2
tBUF
tLOW
tR
tHD:STA
tF
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SCL
tHD:STA
tSU:STA
tHD:DAT
tHIGH
tSU:STO
tSU:DAT
REPEATED
START
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STOP START
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SDA
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Figure 3. I C mode Timing Diagram
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AS3643
Datasheet, Confidential - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
VVIN = 3.7V, TA = +25ºC (unless otherwise specified), LED: Osram Phaser 2 (VFLED=3.8V at 1A)
Figure 4. DCDC Efficiency vs. VVIN
Figure 5. Application Efficiency (PLED/PVIN) vs. VVIN
95
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90
100
85
90
80
85
75
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% 75
% 80
70
70
IOUT = 1300mA/1 LED
65
IOUT = 1000mA/1 LED
60
2,8
3,2
3,6
IOUT = 1300mA/1 LED
65
IOUT = 1300mA/1 LED/ 1/4MHz on
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IOUT = 1300mA/1 LED/ 1/4MHz on
4
4,4
4,8
IOUT = 1000mA/1 LED
60
5,2
2,8
3,2
3,6
Input Voltage (V)
Figure 6. Battery Current vs. VVIN
3
4,8
5,2
100
IOUT = 1300mA/1 LED/ 1/4MHz on
IOUT = 1000mA/1 LED
2
4,4
Figure 7. Efficiency at low currents (300mA)
IOUT = 1300mA/1 LED
2,5
4
Input Voltage (V)
95
90
85
A 1,5
% 80
75
1
70
0,5
IOUT = 300mA/1 LEDs
DCDC Efficiency
65
2,8
3,2
ca
0
3,6
4
4,4
4,8
5,2
IOUT = 300mA/1 LEDs
Application Efficiency
60
2,8
Input Voltage (V)
3,2
3,4
3,6
3,8
4,0
4,2
4,4
Input Voltage (V)
Figure 9. IVIN, ILED Startup (ILED_OUT=800mA)
Te
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Figure 8. ILED Startup (ILED_OUT=1.0A)
3,0
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AS3643
Datasheet, Confidential - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 11. VOUT / ILED_OUT ripple, ILED_OUT = 1.0A
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Figure 10. ILED Startup (ILED_OUT=60mA)
Figure 12. ILED Rampdown (ILED_OUT=1.0A)
Figure 13. ILED_OUT vs. TAMB
63
62
61
mA
60
59
58
-30
-10
10
30
50
70
ca
Ambient Temperature (C)
Figure 14. Oscillator frequency fCLK vs. TAMB
ni
4.2
Figure 15. Flash Timeout
ch
4.1
MHz
Te
4.0
3.9
3.8
-30
-10
10
30
50
70
Ambient Temperature (C)
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1.5-4
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AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
The AS3643 is a high performance DCDC step up converter with internal PMOS and NMOS switches. Its output is
2
connected to one flash LED with an internal current sink. The device is controlled by the pins SDA and SCL in I C
mode.
The actual operating mode like standby, assist light, indicator or flash mode, can then be chosen by the interface. If not
1
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in standby mode, the device automatically enters shutdown mode by keeping SCL low for more than tTIMEOUT .
The AS3643 includes a fixed frequency DCDC step-up with accurate startup control. Together with the current sink (on
LED_OUT1/2) it includes several protection and safety functions.
Internal Circuit Diagram
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Figure 16. Internal circuit Diagram
AS3643
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During startup and ramp down the LED current is smoothly ramped up and ramped down. If the DCDC converter goes
out of regulation (measured by monitoring the voltage across the current sinks), the ramp up is temporarily stopped in
2
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order for the DCDC to return to regulation .
1. Following registers are reset to their default value if the timeout expires: out_on=0, ext_torch_on=00,
mode_setting=00, const_v_mode=0.
2. The actual value of the LED current setting can be readout by the register led_current_actual (see page
26) to allow the camera processor to adopt to the actual operating conditions.
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1.5-4
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AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
4MHz/1MHz Operating Mode Switching
If freq_switch_on (see page 26)=1 and in flash and assist light mode (indicator mode or low current mode using PWM
mode -see mode_setting (page 24) - always will use pulseskip) if led_current>=40h , the DCDC converter always operates in PWM mode (exception: PFM mode is allowed during startup) to reduce EMI in EMI sensitive systems. For flash
and assist light mode and high duty cycles close to 100% on-time (maximum duty cycle) of the PMOS, the DCDC con3
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verter can switch into a 1MHz operating mode and maximum duty cycle to improve efficiency for this load condition .
The DCDC converter returns back to its normal 4MHz operating frequency when load or supply conditions change.
Due to this switching between two fixed frequencies the noise spectrum of the system is exactly defined and predictable. If improved efficiency is required, the fixed switching between 1MHz / 4MHz can be disabled by freq_switch_on
(see page 26)=0. In this case pulseskip will be used.
The internal circuit for switching between these two frequencies is shown in Figure 17:
AS3643
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Figure 17. Internal circuit of 4MHz/1Mhz selection
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Note: For simplicity Figure 17 shows only a single current sink.
Protection and Fault Detection Functions
The protection functions protect the AS3643 and the LED(s) against physical damage. In most cases a Fault register
2
2
bit is set, which can be readout by the I C interface. The fault bits are automatically cleared by a I C readout of the fault
ca
4
register. Additionally the DCDC is stopped and the current sinks are disabled by resetting out_on=0,
mode_setting=00 and ext_torch_on=00.
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Overvoltage Protection
In case of no or a broken LED(s) at the pin LED_OUT1/2 and an enabled DCDC converter, the voltage on VOUT1/2
5
rises until it reaches VVOUTMAX (overvoltage condition) and the voltage across the current source is below low_vds .,
ch
6
Te
the DCDC converter is stopped, the current sources are disabled and the bit fault_ovp (see page 25) is set .
3. Efficiency compared to a 4MHz only DCDC converter forced to operate with minimum duty cycle.
4. Applies for all faults except TXMASK event occurred
5. If overvoltage is reached, but none of the low_vds comparator(s) triggers, VOUT1/2 is still regulated below
VVOUTMAX.
6. In constant voltage mode (5V generation, register bit const_v_mode=1) this fault is disabled.
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AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
Short Circuit Protection
After the startup of the DCDC converter, the voltage on LED_OUT1/2 is continuously monitored and compared against
7
VLEDSHORT if the LED current is above 20mA (see Figure 18). If the voltage across the LED (VFLED = VOUT1/2LED_OUT1/2) stays below VLEDSHORT, the DCDC is stopped (as a shorted LED is assumed), the current sinks are disabled and the bit fault_led_short (see page 25) is set.
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Figure 18. Short LED detection
Overtemperature Protection
The junction temperature of the AS3643 is continuously monitored. If the temperature exceeds TOVTEMP, the DCDC is
stopped, the current sinks are disabled (instantaneous) and the bit fault_overtemp (see page 25) is set. The driver is
8
automatically re-enabled once the junction temperature drops below TOVTEMP-TOVTEMPHYST.
TXMASK event occurred
If during flash, TXMASK current reduction is enabled (see TXMASK on page 15, configured by ext_torch_on=01) and
a TXMASK event happened (pin TXMASK/TORCH=1), the fault register bit fault_txmask (see page 25) is set.
Flash Timeout
If the flash is started a timeout timer is started in parallel. If the flash duration defined by the STROBE input (strobe_on
= 1 and strobe_type = 1, see Figure 25 on page 17) exceeds tFLASHTIMEOUT (adjustable by register flash_timeout (see
page 24)), the DCDC is stopped and the flash current sinks (on pin LED_OUT1/2) are disabled and fault_timeout is
set.
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If the flash duration is defined by the timeout timer itself (strobe_on = 0, see Figure 23 on page 17), the register
fault_timeout is set after the flash has been finished.
Supply undervoltage Protection
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If the voltage on the pin VIN (=battery voltage) is or falls below VUVLO, the AS3643 is kept in shutdown state and all
registers are set to their default state.
Wakeup Circuit - Power off detection
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In flash, assist light and indicator mode (register mode_setting (page 24)=01, 10 or 11) and out_on (page 24)=1, if SCL
is L for more than tTIMEOUT, shutdown mode is automatically entered. This feature automatically detects a power-off of
the controlling circuit driving SCL and SDA (VDD_I/F goes to 0V e.g. due to a low power condition of the driving circuit)
- the internal circuit is shown in Figure 19:
7. To avoid errors in short LED detection for LEDs with a high leakage current
8. In constant voltage mode (const_v_mode=1) the DCDC will not be automatically re-enabled.
www.austriamicrosystems.com/AS3643
1.5-4
12 - 33
AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
Figure 19. Device Shutdown and Wakeup
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AS3643
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In shutdown mode once pin SCL goes high for the first time, the internal counter shown in Figure 19 is immediately
reset thus releasing the internal RESET (assuming VIN is above VUVLO) signal and allows instant communication on
2
2
the I C bus. Therefore no additional action is required to leave the shutdown mode and start I C communication.
Purpose of this circuit
The purpose of this circuit is an additional security mechanism.
Assume the user programmed torch or indicator operation (there is no timeout for these operating modes) and the battery slowly drops below the undervoltage limit of the system. The processor would get an reset by the PMIC and the
LDO operating VDD_I/F is switched off, but the processor might not have been able to switch-off the torch/indicator
operation of the AS3643. Due to the implemented security mechanism the AS3643 detects a power off of VDD_I/F and
automatically enters shutdown.
Current consumption in standby/shutdown mode
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The AS3643 is designed to draw minimum current in standby and shutdown mode. There is a small difference in current consumption between these two operating modes (typ. 300nA) only due to the internal level shifters (see the
schmitt trigger input buffers connected to SCL and SDA in Figure 19) for shifting up the voltage on SCL/SDA (VDD_I/F
e.g. 1.8V) to the supply voltage on VIN (e.g. 3.7V). If the AS3643 is driven with digital levels close to 0V/VIN, the current consumption for standby mode is identical to shutdown mode.
www.austriamicrosystems.com/AS3643
1.5-4
13 - 33
AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
Operating Mode and Currents
The output currents and operating mode are selected according to the following table:
Table 5. Operating Mode and current settings
X
X
X
X
X
10, 01
or 11
0
X
X
0
X
X
X
X
X
X
X
0->1
Always write same
content to register Current Set1 (led_current)
and Current Set2
0
standby
0
external torch mode
LED current is defined
2
by the 7LSB bits of
led_current and
led_current2
indicator mode or
3
low current pwm mode
LED current is defined
by the 6LSB bits (bits
5...0) of led_current and
led_current2 pwm
modulated with
31.25kHz defined by
register inct_pwm (1/
16...4/16)
assist light mode
LED current is defined
2
by the 7LSB bits (6...0)
of led_current and
led_current2
ext_torch_on =10
X
ext_torch_on =10
01
10
1
1
ni
1
ch
11
1
strobe_on (see page 25)
=0
flash mode;
strobe_on = 1 and
strobe_type (see page
25) = 0
flash duration defined by
flash_timeout (see page
24)
flash mode;
strobe_on = 1 and
strobe_type = 1
flash duration defined by
STROBE input; timeout
defined by flash_timeout
LED current is defined
by led_current and
led_current2 - the
current can be reduced
during flash, see Flash
Current Reductions
below
Te
X
shutdown
if previous operating
mode was indicator,
assist light or flash mode all registers are reset to
their default values
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X
2
I C commands are accepted
X
Mode
ext_torch_on (see page
22) not 10
00
1
Condition
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STROBE
X
1
LED_OUT1/2
output current
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OUT
mode_
setting out_on
(see
(see
page
page
24)
24)
operating mode and currents
lv
SCL
low
for
tTIME
TORCH
SCL and
SDA
AS3643 configuration
1. SCL low for tTIMEOUT and operating mode is indicator, assist or flash mode then shutdown mode is entered.
2. The MSB bit of this register not used to protect the LED; therefore the maximum assist / torch light current = half
the maximum flash current
3. The low current mode is a general purpose PWM mode to drive less current through the LED in average, but
keep the actual pulsed current in a range where the light output from the LED is still specified. As only the 6
LSBs of led_current are used the maximum current is limited to 1/4 of the maximum flash current.
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1.5-4
14 - 33
AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
Flash Current Reductions
TXMASK
Usually the flash current is defined by the register led_current . If the TXMASK/TORCH input is used and (configured
by ext_torch_on=01), the flash current is reduced to flash_txmask_current if TXMASK/TORCH=1.
Current Reduction by VIN measurements in Flash Mode
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Due to the high load of the flash driver and the ESR of the battery (especially critical at low temperatures), the voltage
on the battery drops. If the voltage drops below the reset threshold of the system would reset. To prevent this condition
the AS3643 monitors the battery voltage and keeps it above vin_low_v_run as follows:
Before a flash is started the voltage on VIN is measured. If the voltage is below the setting of vin_low_v the fault_uvlo
(see page 25) is set and the flash is disabled (driver stays in shutdown) if vin_low_v_shutdown=1. The flash current is
reduced to flash_txmask_current if vin_low_v_shutdown=0.
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During flash, if the voltage on VIN drops below the threshold defined by vin_low_v_run, the flash current is reduced (or
ramping of the current is stopped during flash current startup) and fault_uvlo is set. The timing for the reduction of the
current is 8µs/LSB current change.
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During the flash pulse the actual used current can be readout by the register led_current_actual.
After the flash pulse the minimum current can be readout by the register led_current_min - this allows to adjust the
camera sensitivity (gain or iso-settings) for the subsequent flash pulse (e.g. when using a pre-flash and a main flash
pulse).
The internal circuit for low voltage current reductions are shown in Figure 20:
Figure 20. Low Voltage current Reduction Internal Circuit
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A mobile phone camera flash system can trigger a diagnostic flash and a main-flash:
The diagnostic flash is initiated by the processor. After this diagnostic flash, the determined maximum flash current can
2
be read back through the I C interface from register led_current_min (see page 26) and used for the setting for the
main flash. Therefore the current in the main-flash is constant and additionally the camera system can use this current
for picture quality adjustments - the waveforms for this concept are shown in Figure 21:
www.austriamicrosystems.com/AS3643
1.5-4
15 - 33
AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
Figure 21. Low Voltage current Reduction Waveform with diagnostic-Flash and Main-Flash Phase
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If the diagnostic flash should be short (e.g. 10ms) it is recommended to operate this diagnostic flash at slightly higher
vin_low_v_run setting compared to the main flash as shown in Figure 22:
Figure 22. Low Voltage current Reduction Waveform with short diagnostic-Flash and Main-Flash Phase
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The different settings for vin_low_v_run allow a constant main flash current without dropping VIN below vin_low_v_run.
Flash Strobe Timings
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The flash timing are defined as follows:
1. Flash duration defined by register flash_timeout and flash is started immediately when this mode is selected by
2
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the I C command (see Figure 23):
set strobe_on = 0, start the flash by setting out_on = 1
2. Flash duration defined by register flash_timeout and flash started with a rising edge on pin STROBE (see Figure 24):
set strobe_on = 1 and strobe_type = 0
3. Flash start and timing defined by the pin STROBE; the flash duration is limited by the timeout timer defined by
flash_timeout (see Figure 25 and Figure 26):
set strobe_on = 1 and strobe_type = 1
www.austriamicrosystems.com/AS3643
1.5-4
16 - 33
AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
Figure 23. AS3643 flash duration defined by flash_timeout without using STROBE input
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Figure 24. AS3643 flash duration defined by flash_timeout, starting flash with STROBE rising edge
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Figure 25. AS3643 flash duration and start defined by STROBE, limited by flash_timeout; timer not expired
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Figure 26. AS3643 flash duration and start defined by STROBE, limited by flash_timeout; timer expired
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www.austriamicrosystems.com/AS3643
1.5-4
17 - 33
AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
I2C Serial Data Bus
2
The AS3643 supports the I C bus protocol. A device that sends data onto the bus is defined as a transmitter and a
device receiving data as a receiver. The device that controls the message is called a master. The devices that are
controlled by the master are referred to as slaves. A master device that generates the serial clock (SCL), controls the
bus access, and generates the START and STOP conditions must control the bus. The AS3643 operates as a slave on
2
The following bus protocol has been defined (Figure 27):
Data
transfer may be initiated only when the bus is not busy.
data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in the data line
while the clock line is HIGH are interpreted as control signals.
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During
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the I C bus. Within the bus specifications a standard mode (100kHz maximum clock rate) and a fast mode (400kHz
maximum clock rate) are defined. The AS3643 works in both modes. Connections to the bus are made through the
open-drain I/O lines SDA and SCL.
Accordingly, the following bus conditions have been defined:
Bus Not Busy
Start Data Transfer
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Both data and clock lines remain HIGH.
A change in the state of the data line, from HIGH to LOW, while the clock is HIGH, defines a START condition.
Stop Data Transfer
A change in the state of the data line, from LOW to HIGH, while the clock line is HIGH, defines the STOP condition.
Data Valid
The state of the data line represents valid data when, after a START condition, the data line is stable for the duration of
the HIGH period of the clock signal. The data on the line must be changed during the LOW period of the clock signal.
There is one clock pulse per bit of data.
Each data transfer is initiated with a START condition and terminated with a STOP condition. The number of data bytes
transferred between START and STOP conditions are not limited, and are determined by the master device. The
information is transferred byte-wise and each receiver acknowledges with a ninth bit.
Acknowledge
Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The
master device must generate an extra clock pulse that is associated with this acknowledge bit.
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A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a way that the
SDA line is stable LOW during the HIGH period of the acknowledge-related clock pulse. Of course, setup and hold
times must be taken into account. A master must signal an end of data to the slave by not generating an acknowledge
bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the data line HIGH to
enable the master to generate the STOP condition.
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1.5-4
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AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
2
Figure 27. Data Transfer on I C Serial Bus
SDA
SLAVE
ADDRESS
R/W
DIRECTION
BIT
ACKNOWLEDGEMENT
SIGNAL FROM
RECEIVER
SCL
1
2
6
7
8
9
1
2
3-7
8
lv
ACKNOWLEDGEMENT
SIGNAL FROM
RECEIVER
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MSB
9
ACK
REPEATED IF
MORE BYTES ARE
TRANSFERRED
STOP CONDITION
OR REPEATED
START CONDITION
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START
CONDITION
Depending upon the state of the R/W bit, two types of data transfer are possible:
1. Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the master is the
slave address. Next follows a number of data bytes. The slave returns an acknowledge bit after each received
byte. Data is transferred with the most significant bit (MSB) first.
2. Data transfer from a slave transmitter to a master receiver. The master transmits the first byte (the slave
address). The slave then returns an acknowledge bit, followed by the slave transmitting a number of data
bytes. The master returns an acknowledge bit after all received bytes other than the last byte. At the end of the
last received byte, a “not acknowledge” is returned. The master device generates all of the serial clock pulses
and the START and STOP conditions. A transfer is ended with a STOP condition or with a repeated START
condition. Since a repeated START condition is also the beginning of the next serial transfer, the bus is not
released. Data is transferred with the most significant bit (MSB) first.
The AS3643 can operate in the following two modes:
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1. Slave Receiver Mode (Write Mode): Serial data and clock are received through SDA and SCL. After each
byte is received an acknowledge bit is transmitted. START and STOP conditions are recognized as the beginning and end of a serial transfer. Address recognition is performed by hardware after reception of the slave
address and direction bit (see Figure 28). The slave address byte is the first byte received after the master
generates the START condition. The slave address byte contains the 7-bit AS3643 address, which is 0110000,
9
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ni
followed by the direction bit (R/W), which, for a write, is 0. After receiving and decoding the slave address
byte the device outputs an acknowledge on the SDA line. After the AS3643 acknowledges the slave address +
write bit, the master transmits a register address to the AS3643. This sets the register pointer on the AS3643.
The master may then transmit zero or more bytes of data, with the AS3643 acknowledging each byte received.
The address pointer will increment after each data byte is transferred. The master generates a STOP condition
to terminate the data write.
2. Slave Transmitter Mode (Read Mode): The first byte is received and handled as in the slave receiver mode.
However, in this mode, the direction bit indicates that the transfer direction is reversed. Serial data is transmitted on SDA by the AS3643 while the serial clock is input on SCL. START and STOP conditions are recognized
as the beginning and end of a serial transfer (Figure 29 and Figure 30). The slave address byte is the first byte
received after the master generates a START condition. The slave address byte contains the 7-bit AS3643
10
address, which is 0110000, followed by the direction bit (R/W), which, for a read, is 1. After receiving and
decoding the slave address byte the device outputs an acknowledge on the SDA line. The AS3643 then
begins to transmit data starting with the register address pointed to by the register pointer. If the register
9. The address for writing to the AS3643 is 60h = 01100000b
10.The address for read mode from the AS3643 is 61h = 01100001b
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1.5-4
19 - 33
AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
pointer is not written to before the initiation of a read mode the first address that is read is the last one stored in
the register pointer. The AS3643 must receive a “not acknowledge” to end a read.
0110000
0
<Data(n)>
XXXXXXXX
XXXXXXXX
A
A
S - Start
A - Acknowledge (ACK)
P - Stop
A
XXXXXXXX
XXXXXXXX
A
Data Transferred
(X + 1 Bytes + Acknowledge)
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S
<Data(n+X)>
<Data(n+1)>
<Word Address (n)>
A
P
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lv
<Slave Address>
<RW>
Figure 28. Data Write - Slave Receiver Mode
<Slave Address>
S
0110000
<RW>
Figure 29. Data Read (from Current Pointer Location) - Slave Transmitter Mode
1
<Data(n+1)>
<Data(n)>
A
XXXXXXXX
A
XXXXXXXX
S - Start
A - Acknowledge (ACK)
P - Stop
NA - Not Acknowledge (NACK)
<Data(n+X)>
<Data(n+2)>
A
XXXXXXXX
XXXXXXXX
A
NA
P
Data Transferred
(X + 1 Bytes + Acknowledge)
Note: Last data byte is followed by a NACK
ch
S
0110000
0
Te
A
XXXXXXXX
A
XXXXXXXX
S - Start
Sr - Repeated Start
A - Acknowledge (ACK)
P - Stop
NA - Not Acknowledge (NACK)
www.austriamicrosystems.com/AS3643
A
<Slave Address>
Sr
0110000
A
XXXXXXXX
1
A
<Data(n+X)>
<Data(n+2)>
<Data(n+1)>
<Data(n)>
XXXXXXXX
<Word Address (n)>
<RW>
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<RW>
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Figure 30. Data Read (Write Pointer, Then Read) - Slave Receive and Transmit
A
XXXXXXXX
NA
P
Data Transferred
(X + 1 Bytes + Acknowledge)
Note: Last data byte is followed by a NACK
1.5-4
20 - 33
AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
Register Description
Table 6. ChipID Register
ChipID Register
Addr: 0
This register has a fixed ID
Bit Name
Default Access
Description
2:0
version
Xh
R
AS3643 chip version number
7:3
fixed_id
10110b
R
This is a fixed identification (e.g. to verify the I C
communication)
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Bit
2
Current Set1 Register
Addr: 1
Bit
lv
Table 7. Current Set1 Register
This register defines design versions
Bit Name
Default Access
Description
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Define the current on pin LED_OUT1/2 (combined; each
current sink has identical currents)assist mode uses bits 6:0
of this current setting (max. half of full current setting)
indicator or low current pwm mode uses only 5:0 of this
current setting (max. 1/4 of full current setting)
Caution:
led_current
9Ch
R/W
0h
0mA
1h
5.1mA
2h
10.2mA
...
...
3Fh
321.2mA (maximum current for indicator or low
current pwm mode, mode_setting=01)
...
...
7Fh
647.5mA (maximum current for assist light mode,
mode_setting=10)
...
...
9Ch
795.3mA - default setting
...
...
FEh
1295mA
FFh
1300mA
Te
ch
ni
ca
7:0
Always write same content to this register
Current Set1 (1h) and Current Set2 (2h)
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1.5-4
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AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
Table 9. TXMask Register
TXMask Register
Addr: 3
Bit
This register defines the TXMask settings and coil peak current
Bit Name
Default Access
Description
Defines operating mode for input pin TXMASK/TORCH
01
txmask-mode; during flash if TXMASK/TORCH=1, the
LED current is set to flash_txmask_current - (see
TXMASK on page 15)
10
external torch mode: if TXMASK/TORCH=1 and
mode_setting=00, the AS3643is set into external
1
torch mode (LED current is defined by the 7LSB bits
of led_current )
11
don’t use
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id
00
pin has no effect
R/W
lv
ext_torch_on
1:0
00
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Defines the maximum coil current (parameter ILIMIT)
coil_peak
3:2
10
R/W
00
ILIMIT = 1.0A
01
ILIMIT = 1.5A
10
ILIMIT = 2.0A
11
ILIMIT = 2.5A
Define the current on pin LED_OUT1/2 in flash mode if
ext_torch_on=01 and TXMASK/TORCH=1
flash_txmask_current
2
6h
R/W
0mA
1h
82mA
2h
163mA
3h
245mA
4h
326mA
5h
408mA
6h
489mA - default
7h
571mA
8h
653mA
9h
734mA
Ah
816mA
Bh
897mA
Ch
979mA
Dh
1060mA
Eh
1142mA
Fh
1224mA
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ca
7:4
0h
1. The MSB bit of this register not used to protect the LED; therefore the maximum current = half the maximum
flash current
2.
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1.5-4
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AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
Table 10. Low Voltage Register
Low Voltage Register
Addr: 4
Bit
This register defines the operating mode with low battery voltages
Bit Name
Default Access
Description
R/W
1h
3.0V
2h
3.07V
3h
3.14V
4h
3.22V - default
5h
3.3V
6h
3.38V
7h
3.47V
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4h
function is disabled
lv
vin_low_v_run
2:0
0h
al
id
Voltage level on VIN where current reduction triggers during
operation (see Current Reduction by VIN measurements in
Flash Mode on page 15) - only in flash mode; if VIN drops
below this voltage during current ramp up, the current ramp
up is stopped; during operation the current is decreased
until the voltage on VIN rises above this threshold fault_uvlo is set
Voltage level on VIN where driver will change current before
startup (only in flash mode)
if before startup (out_on set from 0 to 1), the voltage on VIN
is below vin_low_v, the current is changed to
flash_txmask_current (vin_low_v_shutdown=0) or
0=shutdown (vin_low_v_shutdown=1) and fault_uvlo is set
vin_low_v
5h
R/W
vin_low_v_shutdown
0
Te
7
const_v_mode
www.austriamicrosystems.com/AS3643
function is disabled
1h
3.0V
2h
3.07V
3h
3.14V
4h
3.22V
5h
3.3V - default
6h
3.38V
7h
3.47V
Enables Shutdown of current reduction under low voltage
conditions
R/W
ch
6
ni
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5:3
0h
0
if before startup (out_on set from 0 to 1), the voltage
on VIN is below vin_low_v, the current is changed to
flash_txmask_current and fault_uvlo is set
1
if before startup (out_on set from 0 to 1), the voltage
on VIN is below vin_low_v, the operating mode stays
in shutdown (zero LED current) and fault_uvlo is set
Enables Constant output voltage mode
0
R/W
0
Normal operation defined by mode_setting
1
5V constant voltage mode on VOUT1/2;
reset registers mode_setting, out_on and
ext_torch_on before setting this bit
1.5-4
23 - 33
AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
Table 11. Flash Timer Register
Flash Timer Register
Addr: 5
Bit
This register identifies the flash timer and timeout settings
Bit Name
Default Access
Description
Define the duration of the flash timer and timeout timer
R/W
4ms
2h
6ms
...
...
23h
72ms - default
...
...
7F
256ms
80
264ms(now 8 ms LSB steps from here on)
81
272ms
82
280ms
...
...
FEh
1272ms
FFh
1280ms
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1h
1
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23h
2ms
lv
flash_timeout
7:0
0h
1. Internal calculation for codes above 80h: flash timeout [ms] = (flash_timeout-127) * 8 + 256 [ms]
Table 12. Control Register
Addr: 6
Bit
Bit Name
Control Register
This register identifies the operating mode and includes an all on/off bit
Default Access
Description
Define the AS3643 operating mode
shutdown or external torch mode if
ext_torch_on (page 22)=10
ni
mode_setting
00
R/W
Te
2
3
reserved
indicator mode (or low current mode using PWM)
LED
current is defined by the 6LSB bits of led_current
01
pwm modulated with 31.25kHz defined by register
inct_pwm (1/16...4/16)
assist light mode:
1
10
ch
1:0
ca
00
11
X
LED current is defined by the 7LSB bits of
led_current
flash mode:
LED current is defined by led_current
(out_on and mode_setting are automatically cleared
after a flash pulse)
R
reserved - don’t use, always write 0
Enables the output current sinks (pin LED_OUT1/2)
out_on
www.austriamicrosystems.com/AS3643
0
R/W
0
outputs disabled
1
outputs enabled
(out_on and mode_setting are automatically cleared
after a flash pulse)
1.5-4
24 - 33
AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
1. The MSB bit of this register not used to protect the LED; therefore the maximum assist light current = half the
maximum flash current
Table 13. Strobe Signalling Register
Strobe Signalling Register
Addr: 7
Bit Name
Default Access
Description
al
id
Bit
This register defines the flash current reducing and mode for STROBE
Defines if the STROBE input is edge or level sensitive; see
also bit strobe_on (page 25)
1
R/W
0
STROBE input is edge sensitive
1
STROBE input is level sensitive
lv
strobe_type
6
Enables the STROBE input
strobe_on
1
R/W
0
STROBE input disabled
STROBE input enabled
in flash mode
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1
Table 14. Fault Register
Fault Register
Addr: 8
Bit
Bit Name
This register identifies all the different fault conditions and provide
information about the LED detection
Default Access
fault_uvlo
0
0
R/sC
1
Description
an undervoltage event has happened - see Current
Reduction by VIN measurements in Flash Mode on page 15
0
No
1
Yes
1
reserved
0
R
reserved - don’t use
2
reserved
0
R
reserved - don’t use
fault_txmask
ni
fault_timeout
ch
4
Te
5
6
7
0
ca
3
fault_overtemp
fault_led_short
0
R/sC
1
TXMASK/TORCH event triggered during flash - see
TXMASK event occurred on page 12
0
No
1
Yes
see Flash Timeout on page 12
R/sC
1
0
No fault
1
Flash timeout exceeded
see Overtemperature Protection on page 12
0
R/sC
1
0
No fault
1
Junction temperature limit has been exceeded
see Short Circuit Protection on page 12
0
R/sC
1
0
No fault
1
A shorted LED is detected (pin LED_OUT1/2)
see Overvoltage Protection on page 11
fault_ovp
www.austriamicrosystems.com/AS3643
0
R/sC
1
0
No fault
1
An overvoltage condition is detected (pin VOUT)
1.5-4
25 - 33
AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
1. R/sC = Read, self clear; after readout the register is automatically cleared
Table 15. PWM and Indicator Register
PWM and Indicator Register
Addr: 9
Bit Name
Default Access
Description
al
id
Bit
This register defines the PWM mode (e.g. for indicator) and 4/1MHz mode
switching
Define the AS3643 PWM with 31.25kHz operation for
indicator or low current mode (mode_setting=01)
00
R/W
00
1/16 duty cycle
01
2/16 duty cycle
10
3/16 duty cycle
11
4/16 duty cycle
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inct_pwm
1:0
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Exact frequency switching between 4MHz/1MHz for assist
and flash modes for operation close to maximum
pulsewidth
freq_switch_on
2
0
R/W
0
Pulseskip operation is allowed for all modes results in better efficiency
1
In flash and assist light mode (indicator mode or low
current mode using PWM always will use pulseskip) if
led_current>=40h , the DCDC is running at 4MHz or
1MHz (pulseskip is disabled) - results in improved
noise performance;
Table 17. Minimum LED Current Register
Minimum LED Current Register
Addr: Eh
Bit
Bit Name
Default Access
12
00h
led_current_min
R
Description
Minimum current through the current sink (only including all
current reductions as described in Current Reduction by
VIN measurements in Flash Mode excluding current
reductions caused by TXMASK)
ca
7:0
This register reports the minimum LED current from the last operation
cycle
ch
ni
1. As the internal change of this register is asynchronous to the readout, it is recommended to readout the register
after the flash pulse. The register will store the minimum current through the LED after e.g. a previous flash.
This current can be used for a subsequent flash pulse for a safe operating range.
2. This register is only set if an actual current reduction happens (fault_uvlo (see page 25)=1) otherwise
led_current_min=0.
Table 18. Actual LED Current Register
Actual LED Current Register
Te
Addr: Fh
Bit
Bit Name
7:0
led_current_actual
This register reports the actual set LED current
Default Access
1
00h
R
Description
Actual set current through the current sink (including all
current reductions as described in Flash Current
Reductions including LED current ramp up/down)
1. As the internal change of this register is asynchronous to the readout, it is recommended to readout the register
twice and compare the results.
www.austriamicrosystems.com/AS3643
1.5-4
26 - 33
AS3643
Datasheet, Confidential - D e t a i l e d D e s c r i p t i o n
Register Map
Table 21. Register Map
Register
Definition
1
Addr
Default
Name
Content
b7
b6
b5
b4
b3
b2
b1
0
Bxh
version
Current Set1
1
9Ch
led_current
always write same content in register Current Set1 and Current Set2
Current Set2
2
9Ch
always write same content in register Current Set1 and Current Set2
TXMask
3
68h
Low Voltage
4
2Ch
Flash Timer
5
23h
vin_low
const_v _v_shut
_mode
down
coil_peak
vin_low_v
vin_low_v_run
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flash_timeout
out_on
reserve
d
fault_tx
mask
reserve reserve fault_uvl
d
d
o
6
00h
7
C0h
strobe_ strobe_t
on
ype
8
00h
fault_ov fault_le fault_ov
p
d_short ertemp
9
00h
Minimum LED
Current
Eh
00h
led_current_min
Actual LED
Current
Fh
00h
led_current_actual
Strobe Signalling
Fault
PWM and
Indicator
ext_torch_on
lv
flash_txmask_current
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ChipID
Control
fixed_id
b0
fault_ti
meout
freq_swi
tch_on
mode_setting
inct_pwm
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1. Always write’0’ to undefined register bits (e.g. to bits 4..7 of register 6)
www.austriamicrosystems.com/AS3643
1.5-4
27 - 33
AS3643
Datasheet, Confidential - A p p l i c a t i o n I n f o r m a t i o n
9 Application Information
External Components
Input Capacitor CVIN
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Low ESR input capacitors reduce input switching noise and reduce the peak current drawn from the battery. Ceramic
capacitors are required for input decoupling and should be located as close to the device as is practical.
Table 22. Recommended Input Capacitor
C
TC Code
Rated
Voltage
Size
Manufacturer
GRM188R60J106ME47
10µ
>3µ[email protected]
>2µ[email protected]
X5R
6V3
0603
Murata
www.murata.com
LMK107BBJ106MA
10µ
>3µ[email protected]
X5R
6V3
0603
lv
Part Number
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Taiyo Yuden
www.t-yuden.com
If a different input capacitor is chosen, ensure similar ESR value and at least 3µF capacitance at the maximum input
supply voltage. Larger capacitor values (C) may be used without limitations.
Add a smaller capacitor in parallel to the input pin VIN (e.g. Murata GRM155R61C104, >50nF @ 3V, 0402 size).
Output Capacitor CVOUT
Low ESR capacitors should be used to minimize VOUT ripple. Multi-layer ceramic capacitors are recommended since
they have extremely low ESR and are available in small footprints. The capacitor should be located as close to the
device as is practical.
X5R dielectric material is recommended due to their ability to maintain capacitance over wide voltage and temperature
range.
Table 23. Recommended Output Capacitor
Part Number
GRM219R61A116U
TC Code
Rated
Voltage
Size
10µF +/-10%
>4.2µF@5V
X5R
10V
0805
6.3V
0603
(1.6x0.8x0.85mm
max. 0.95mm
height)
10µF +/-20%
>4.2µF@4V
X5R
ca
GRM188R60J106ME84
1
C
Manufacturer
Murata
www.murata.com
ni
1. Use only for VLED < 3.75V
Te
ch
If a different output capacitor is chosen, ensure similar ESR values and at least 4.2µF capacitance at 5V output voltage.
www.austriamicrosystems.com/AS3643
1.5-4
28 - 33
AS3643
Datasheet, Confidential - A p p l i c a t i o n I n f o r m a t i o n
Inductor LDCDC
The fast switching frequency (4MHz) of the AS3643 allows for the use of small SMDs for the external inductor. The
11
saturation current ISATURATION should be chosen to be above the maximum value of ILIMIT . The inductor should have
2
very low DC resistance (DCR) to reduce the I R power losses - high DCR values will reduce efficiency.
Table 24. Recommended Inductor
L
DCR
ISATURATION
Size
Manufacturer
C3-P1.5R
1.5µH
58m
2.4A@25ºC,
1
2.0A
3x3x1.5mm
(height is
max.)
Mitsumi
www.mitsumi.com
LQM32PN1R0MG0
1.0µH
>0.6µH @ 3.0A
60m
3.0A
3.2x2.5x0.9
mm
max 1.0mm
height
NRH2412T1R0N
CKP3225N1R0M
MAMK2520T1R0M
MDMK2020T1R0M
1.0µH
>0.7µH @ 2.7A
>0.6µH @ 3.0A
60m
+/-25%
3.0A
3.2x2.5mm
max 1.0mm
height
1.0µH
>0.6µH @ 2.5A
77m
2.5A
2.4x2.4x1.2
mm (height
is max.)
1.0µH
>0.6µH @ 3.0A
<60m
3.0A
3.2x2.5x0.9
mm
max 1.0mm
height
1.0µH
>0.6µH @ 2.75A
45m
3.0A
2.5x2.0x1.2
mm
height is max
1.0µH
>0.6µH @ 2.75A
56m
2.55A
2.0x2.0x1.2
mm
height is max
1.0µH
>0.6µH @ 2.75A
65m
2.0A
3
2.0x1.6x1.0
mm
height is max
Samsung ElectroMechancs
www.sem.samsung.co.kr
Taiyo Yuden
www.t-yuden.com
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MAKK2016T1R0M
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CIG32W1R0MNE
100m
Murata
www.murata.com
lv
1.0µH
>0.6µH @ 2.0A
LQM2HPN1R0MGC
2.5x2.0x0.9
mm
2
1.5A (2.0A) max 1.00mm
height
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Part Number
ni
1. Do not exceed maximum ISATURATION - can be ensured by setting coil_peak (will limit LED current)
2. Flash cycle limit: 150ms on, 500ms off; repeat maximum 50 times.(if used with default coil_peak=0b (2A))
3. Set current limit to 2A ()coil_peak=10b) - can limit maximum output current.
ch
If a different inductor is chosen, ensure similar DCR values and at least0.6µH inductance at ILIMIT.
PCB Layout Guideline
Te
The high speed operation requires proper layout for optimum performance. Route the power traces first and try to minimize the area and wire length of the two high frequency/high current loops:
Loop1: CVIN/CVIN2 - LDCDC - pin SW1/2 - pin GND - CVIN/CVIN2
Loop2: CVIN/CVIN2 - LDCDC - pin SW1/2 - pin VOUT1/2 - CVOUT - pin GND - CVIN/CVIN2
2
11.Can be adjusted in I C mode with register coil_peak (see page 22)
www.austriamicrosystems.com/AS3643
1.5-4
29 - 33
AS3643
Datasheet, Confidential - A p p l i c a t i o n I n f o r m a t i o n
At the pin GND a single via (or more vias, which are closely combined) connects to the common ground plane. This
via(s) will isolate the DCDC high frequency currents from the common ground (as most high frequency current will flow
between Loop1 and Loop2 and will not pass the ground plane) - see the ‘island’ in Figure 31.
Figure 31. Layout recommendation
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$!
%
&!&"&
%
)*(
AS3643
(
!"
#!
!!
Note: If component placement rules allow, move all components close to the AS3643 to reduce the area and length
of Loop1 and Loop2.
An additional 100nF (e.g. Murata GRM155R61C104, >50nF @ 3V, 0402 size) capacitor CVIN2 in parallel to CVIN is recommended to filter high frequency noise for the power supply of AS3643. This capacitor should be as close as possible to the GND/VIN pins of AS3643.
5V Operating Mode
The AS3643 can be used to power a 5V system (e.g. audio amplifier). The operating mode is selected by setting register bit const_v_mode (page 23)=1. In this operating mode, the current sinks are disabled and cannot be switched on
(no flash/torch operation is possible).
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Note: There is always a diode between VIN and VOUT1/2 due to the internal circuit. Therefore VOUT1/2 cannot be
completely switched off
ni
Figure 32. 5V Operating Mode
Te
ch
AS3643
www.austriamicrosystems.com/AS3643
1.5-4
30 - 33
AS3643
Datasheet, Confidential - P a c k a g e D r a w i n g s a n d M a r k i n g s
10 Package Drawings and Markings
Figure 33. WL-CSP13 Marking
AS3643
<Code>
Note:
austriamicrosystems logo
AS3643
<Code>
Encoded Datecode (4 characters)
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Line 1:
Line 2:
Line 3:
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Figure 34. WL-CSP13 Package Dimensions
!"
(
#$%
&$'
%
%
%
%
%
%
+
)
)
)
*
*
+
+
+
+
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+
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*
)
)
)
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(
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The coplanarity of the balls is 40µm.
www.austriamicrosystems.com/AS3643
1.5-4
31 - 33
AS3643
Datasheet, Confidential - O r d e r i n g I n f o r m a t i o n
11 Ordering Information
The devices are available as the standard products shown in Table 25.
Table 25. Ordering Information
Description
AS3643-ZWLT
1300mA High Current LED Flash Driver
Delivery Form
Package
Tape & Reel
13-pin WL-CSP
(2.25x1.5x0.6mm)
0.5mm pitch
RoHS compliant / Pb-Free /
Green
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Model
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Note: All products are RoHS compliant and austriamicrosystems green.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect
Technical support is found at http://www.austriamicrosystems.com/Technical-Support
Note: AS3643-ZWLT
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For further information and requests, please contact us mailto:[email protected]
or find your local distributor at http://www.austriamicrosystems.com/distributor
Te
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AS3643Z
Temperature Range: -30ºC - 85ºC
WL Package: Wafer Level Chip Scale Package (WL-CSP) 2.25x1.5x0.6mm
T
Delivery Form: Tape & Reel
www.austriamicrosystems.com/AS3643
1.5-4
32 - 33
AS3643
Datasheet, Confidential - O r d e r i n g I n f o r m a t i o n
Copyrights
Copyright © 1997-2012, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe.
Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner.
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All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
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Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing
in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding
the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior
to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information.
This product is intended for use in normal commercial applications. Applications requiring extended temperature
range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for
each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard
production flow, such as test flow or test location.
ca
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However,
austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to
personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or
consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
ni
Contact Information
ch
Headquarters
austriamicrosystems AG
Te
Tobelbaderstrasse 30
Schloss Premstaetten
A-8141 Austria
Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com/contact
www.austriamicrosystems.com/AS3643
1.5-4
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