Analog Power AM9412N N-Channel 30-V (D-S) MOSFET These miniature surface mount MOSFETs utilize High Cell Density process. Low rDS(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. Typical applications are PWMDC-DC converters, power management in portable and battery-powered products such as computers, printers, battery charger, telecommunication power system, and telephones power system. • • • • PRODUCT SUMMARY VDS (V) rDS(on) m(Ω) 22 @ VGS = 10V 30 36 @ VGS = 4.5V Low rDS(on) Provides Higher Efficiency and Extends Battery Life Miniature SO-8 Surface Mount Package Saves Board Space High power and current handling capability Low side high current DC-DC Converter applications TA=25oC Pulsed Drain Current o TA=70 C b a Continuous Source Current (Diode Conduction) TA=25oC Power Dissipationa o TA=70 C 8 2 7 3 6 4 5 THERMAL RESISTANCE RATINGS Parameter Maximum Junction-to-Ambienta t <= 10 sec Steady-State RθJA V A 7.4 IDM 30 IS 1.6 A 3.1 PD Symbol Units 9.0 ID W 2.0 TJ, Tstg Operating Junction and Storage Temperature Range 7.0 1 ABSOLUTE MAXIMUM RATINGS (TA = 25 oC UNLESS OTHERWISE NOTED) Parameter Symbol Limit VDS Drain-Source Voltage 30 ±20 Gate-Source Voltage VGS Continuous Drain Currenta ID (A) 9.0 o C -55 to 150 Maximum Units 40 o 70 o C/W C/W Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Pulse width limited by maximum junction temperature 1 November, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM9412_I Analog Power AM9412N Parameter Symbol Test Conditions VGS(th) IGSS VDS = VGS, ID = 250 uA Min Limits Unit Typ Max Static Gate-Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current A IDSS ID(on) A Drain-Source On-Resistance A Forward Tranconductance Diode Forward Voltage rDS(on) gfs VSD 1 VDS = 0 V, VGS = 20 V ±100 VDS = 24 V, VGS = 0 V 1 25 o VDS = 24 V, VGS = 0 V, TJ = 55 C VDS = 5 V, VGS = 10 V VGS = 10 V, ID = 9 A VGS = 4.5 V, ID = 7 A VDS = 15 V, ID = 9 A IS = 2.3 A, VGS = 0 V 20 V nA uA A 22 36 40 0.7 mΩ S V Dynamicb Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) Rise Time tr Turn-Off Delay Time td(off) Fall-Time tf Source-Ddrain Reverse Recovery Tim trr VDS = 15 V, VGS = 4.5 V, ID = 9 A VDD = 25 V, RL = 25 Ω , ID = 1 A, VGEN = 10 V IF = 2.3 A, Di/Dt = 100 A/uS 4.0 1.1 1.4 16 5 23 3 41 nC nS Notes a. Pulse test: PW <= 300us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing. Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. 2 November, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM9412_I Analog Power AM9412N Typical Electrical Characteristics (N-Channel) 30 25 6.0V 20 5.0V 4.0V 15 3.0V 10 5 25oC 25 125oC 20 15 10 5 0 0 0 0.5 1 1.5 2 0.5 2.5 1.5 2.5 3.5 Figure 2. Body Diode Forward Voltage Variation Figure 1. On-Region Characteristics with Source Current and Temperature 1500 CAPACITANCE (pF) 2.5 2 4.5V 1.5 6.0V 1 4.5 VGS, GATE TO SOURCE VOLTAGE (V) VDS, DRAIN-SOURCE VOLTAGE (V) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE TA = -55oC VDS = 5V VGS = 10V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 30 10V f = 1MHz VGS = 0 V 1200 CISS 900 600 COSS 300 CRSS 0 0.5 0 5 10 15 20 25 0 30 5 10 15 20 25 30 VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 3. On Resistance Vs Vgs Voltage Figure 4. Capacitance Characteristics 1.6 Normalized RDS (on) 10 Vgs Voltage ( V ) 8 6 4 VGS = 10V ID = 7A 1.4 1.2 1.0 0.8 2 0.6 0 -50 0 2 4 6 8 10 0 25 50 75 100 125 150 TJ Juncation Temperature (C) Qg, Gate Charge (nC) Figure 5. Gate Charge Characteristics Figure 6. On-Resistance Variation with Temperature 3 November, 2003 - Rev. A PRELIMINARY -25 Publication Order Number: DS-AM9412_I Analog Power AM9412N Typical Electrical Characteristics (N-Channel) RDS(ON), ON-RESISTANCE (OHM) IS, REVERSE DRAIN CURRENT (A) 100 VGS = 0V 10 o 1 TA = 125 C o 25 C 0.1 0.01 0.001 0.0001 0.1 ID = 7 A 0.08 0.06 0.04 o TA = 25 C 0.02 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 2 Figure 7. Transfer Characteristics 6 50 VDS = VGS ID = -250mA 2 1.8 1.6 1.4 1.2 1 -50 -25 0 25 50 75 100 125 8 10 Figure 8. On-Resistance with Gate to Source Voltage 2.2 P(pk), PEAK TRANSIENT POWER (W) -Vth, GATE-SOURCE THRESTHOLD VOLTAGE (V) 4 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) 150 175 SINGLE PULSE RqJA = 125oC/W TA = 25oC 40 30 20 10 0 0.001 0.01 TA, AMBIENT TEMPERATURE (oC) Figure 9. Vth Gate to Source Voltage Vs Temperature 0.1 1 t1, TIME (SEC) 10 100 Figure 10. Single Pulse Maximum Power Dissipation Normalized Thermal Transient Junction to Ambient 1 D = 0.5 R qJ A(t) = r(t) + R qJ A R qJ A = 125 癈/W 0.2 0.1 0.1 0.0 P (pk) 0.02 t1 t2 TJ - TA = P * R qJ A(t) Duty C yc le , D = t1 / t2 0.01 0.01 S INGLE P ULS E 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIM E (s e c ) Figure 11. Transient Thermal Response Curve 4 November, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM9412_I Analog Power AM9412N Package Information SO-8: 8LEAD H x 45° 5 November, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM9412_I