Analog Power AM4409P P-Channel 20-V (D-S) MOSFET PRODUCT SUMMARY VDS (V) rDS(on) m(Ω) 20 @ VGS = -4.5V These miniature surface mount MOSFETs utilize High Cell Density process. Low rDS(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. Typical applications are PWMDC-DC converters, power management in portable and battery-powered products such as computers, printers, battery charger, telecommunication power system, and telephones power system. • • • -20 ID (A) 10.2 29 @ VGS = -2.5V 8.5 54 @ VGS = -1.8V 6.2 Low rDS(on) Provides Higher Efficiency and Extends Battery Life Miniature SO-8 Surface Mount Package Saves Board Space High power and current handling capability 1 8 2 7 3 6 4 5 ABSOLUTE MAXIMUM RATINGS (TA = 25 oC UNLESS OTHERWISE NOTED) Symbol Maximum Units Parameter -20 VDS Drain-Source Voltage V VGS ±12 Gate-Source Voltage Continuous Drain Current TA=25oC a o TA=70 C Pulsed Drain Currentb a Continuous Source Current (Diode Conduction) 10.2 ID IDM ±30 IS -2.3 o TA=25 C Power Dissipationa o TA=70 C THERMAL RESISTANCE RATINGS Parameter Maximum Junction-to-Ambienta Symbol t <= 10 sec Steady State RθJA A 3.1 PD W 2 TJ, Tstg Operating Junction and Storage Temperature Range A 8.2 o C -55 to 150 Maximum 50 92 Units o C/W C/W o Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Pulse width limited by maximum junction temperature 1 November, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM4409_F Analog Power AM4409P SPECIFICATIONS (T A = 25oC UNLESS OTHERWISE NOTED) Parameter Symbol Test Conditions VGS(th) IGSS VDS = VGS, ID = -350 uA Min Limits Unit Typ Max Static Gate-Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current A IDSS ID(on) A Drain-Source On-Resistance A Forward Tranconductance Diode Forward Voltage rDS(on) gfs VSD -0.7 VDS = 0 V, VGS = ±12 V ±100 nA VDS = -16 V, VGS = 0 V -1 -10 uA o VDS = -16 V, VGS = 0 V, TJ = 55 C VDS = -5 V, VGS = -4.5 V VGS = -4.5 V, ID = -10.2 A VGS = -2.5 V, ID = -8.5 A VGS = -1.8 V, ID = -6.2 A -20 A 20 29 54 VDS = -10 V, ID = -10.2 A IS = -2.3 A, VGS = 0 V mΩ 36 -0.8 S V Dynamicb Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall-Time Qg Qgs Qgd td(on) tr td(off) tf VDS = -10 V, VGS = -5 V, ID = -10.2 A VDD = -10 V, RL = 15 Ω , ID = -1 A, VGEN = -5 V, RG = 6Ω 30 4 6 25 45 150 70 nC nS Notes a. Pulse test: PW <= 300us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing. Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. 2 November, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM4409_F Analog Power AM4409P Typical Electrical Characteristics 50 50 o -2.5V o TA = -55 C 40 -ID, DRAIN CURRENT (A) -ID, DRAIN CURRENT (A) VGS = -4.5V -3.0V -2.0V 30 20 -1.5V 10 25 C 40 o 125 C 30 20 10 0 0 0.5 0 0.5 1 1.5 2 2.5 -VDS, DRAIN TO SOURCE VOLTAGE (V) 3 1 3.5 2 2.5 3 Figure 2. Transfer Characteristics Figure 1. Output Characteristics 4000 2.2 2 3200 VGS = - 2.0V 1.8 CAPACITANCE (pF) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.5 -VGS, GATE TO SOURCE VOLTAGE (V) 1.6 1.4 -2.5V 1.2 -4.5V CISS 2400 1600 COSS 800 1 CRSS 0.8 0 0 10 20 30 -ID, DRAIN CURRENT (A) 40 50 0 5 10 15 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 3. On Resistance vs. Drain Current Figure 4. Capacitance 5 V DS = -1 0V 4 DRAIN-SOURCE ON-RESISTANCE 1.6 ID = -8 A ID = -10.2A VGS = - 4.5V 1.4 -1 5V RDS(ON), NORMALIZED -VGS, GATE-SOURCE VOLTAGE (V) 20 3 2 1.2 1 0.8 1 0.6 0 0 6 12 18 Q g , G A T E C H A R G E (n C ) 24 -50 30 Figure 5. Gate Charge 0 25 50 75 100 125 T J, JUNCTION TEMPERATURE (oC) 150 175 Figure 6. On-Resistance vs. Junction Temperature 3 November, 2003 - Rev. A PRELIMINARY -25 Publication Order Number: DS-AM4409_F Analog Power AM4409P Typical Electrical Characteristics -5A. 25d 0.055 RDS(ON), ON-RESISTANCE (OHM) -IS, REVERSE DRAIN CURRENT (A) 10 1 o TA = 125 C 0.1 o 25 C 0.01 0.001 ID = 0.045 0.035 0.025 o TA = 25 C 0.015 0.005 0.0001 1 0 0.2 0.4 0.6 0.8 2 3 4 -VGS, GATE TO SOURCE VOLTAGE (V) 1 5 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 7. Source-Drain Diode Forward Voltage Figure 8. On-Resistance vs. Gate-to-Source Voltage 50 100µ RDS(ON) LIMIT -ID, DRAIN CURRENT (A) P(pk), PEAK TRANSIENT POWER (W) 100 1ms 10 10ms 100ms 1s 10s DC 1 VGS = -4.5V SINGLE PULSE 0.1 o RθJA = 125 C/W o TA = 25 C 0.01 0.1 1 10 40 30 20 10 0 0.001 100 0.01 0.1 -VDS, DRAIN-SOURCE VOLTAGE (V) r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE Figure 9. Safe Operating Area 1 t1, TIME (sec) 10 100 1000 Figure 10. Single Pulse Power, Junction-to-Ambient 1 D = 0.5 RθJA(t) = r(t) + RθJA o 0.2 0.1 RθJA = 125 C/W 0.1 P(pk) 0.05 t1 0.02 0.01 t2 0.01 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Normalized Thermal Transient Impedance, Junction-to-Ambient 4 November, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM4409_F Analog Power AM4409P Package Information SO-8: 8LEAD H x 45° 5 November, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM4409_F