AM4929P Analog Power P-Channel 20-V (D-S) MOSFET These miniature surface mount MOSFETs utilize a high cell density trench process to provide low rDS(on) and to ensure minimal power loss and heat dissipation. Typical applications are DC-DC converters and power management in portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones. • • • • PRODUCT SUMMARY VDS (V) rDS(on) m(Ω) 52 @ VGS = -4.5V -20 89 @ VGS = -2.5V 124 @ Vgs = -1.8V Low rDS(on) provides higher efficiency and extends battery life Low thermal impedance copper leadframe SOIC-8 saves board space Fast switching speed High performance trench technology ID (A) -4.9 -4.0 -3.6 1 8 2 7 3 6 4 5 o ABSOLUTE MAXIMUM RATINGS (TA = 25 C UNLESS OTHERWISE NOTED) Parameter Symbol Maximum Units Drain-Source Voltage VDS -20 V Gate-Source Voltage VGS ±12 o T A=25 C a Continuous Drain Current o -5.2 ID T A=70 C b Pulsed Drain Current Continuous Source Current (Diode Conduction) a IDM ±50 IS -2.1 o Power Dissipation T A=25 C a o Maximum Junction-to-Case a Maximum Junction-to-Ambient W 1.3 o C T J, T stg -55 to 150 THERMAL RESISTANCE RATINGS Parameter a A 2.1 PD T A=70 C Operating Junction and Storage Temperature Range A -4.1 t <= 5 sec t <= 5 sec Symbol Maximum RθJC RθJA 40 60 Units o C/W C/W o Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Pulse width limited by maximum junction temperature 1 PRELIMINARY Publication Order Number: DS-AM4929_E AM4929P Analog Power o SPECIFICATIONS (TA = 25 C UNLESS OTHERWISE NOTED) Parameter Symbol Test Conditions VGS(th) IGSS VDS = VGS, ID = -250 uA Min Limits Unit Typ Max Static Gate-Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current IDSS On-State Drain CurrentA ID(on) Drain-Source On-ResistanceA Forward TranconductanceA Diode Forward Voltage rDS(on) gfs VSD -0.7 VDS = 0 V, VGS = ±12 V ±100 nA VDS = -16 V, VGS = 0 V -1 -5 uA o VDS = -16 V, VGS = 0 V, TJ = 55 C VDS = -4.5 V, VGS = -10 V VGS = -4.5 V, ID = -4.9 A VGS = -2.5 V, ID = -4.0 A VGS = -1.8 V, ID = -3.6 A -20 A 52 89 124 VDS = -15 V, ID = -4.9 A IS = 2.5 A, VGS = 0 V mΩ 20 -0.6 S V b Dynamic Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall-Time Qg Qgs Qgd td(on) tr td(off) tf VDS = -10 V, VGS = -4.5 V, ID = -4.9 A VDD = -10 V, RL = 6 Ω , ID = -1 A, VGEN = -4.5 V 16.7 1.8 1.9 7 13 14 9 nC nS Notes a. Pulse test: PW <= 300us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing. Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. 2 PRELIMINARY Publication Order Number: DS-AM4929_E AM4929P Analog Power Typical Electrical Characteristics (P-Channel) 20 15 VGS = -4.5V o T A = -55 C -2.5V o 25 C 15 -ID, DRAIN CURRENT (A) -ID, DRAIN CURRENT (A) -3.0V -2.0V 10 5 0 0 1 2 3 10 o 125 C 5 0 4 0.5 -V DS , DRAIN TO SOURCE VOLTAGE (V) 1 Figure 1. Output Characteristics 2 2.5 Figure 2. Transfer Characteristics 1.6 1500 CISS 1200 1.4 CAPACITANCE (pF) R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.5 -V GS , GATE TO SOURCE VOLTAGE (V) VGS = -2.5V 1.2 -4.5V 1 900 600 COSS 300 CRSS 0 0.8 0 0 5 10 -ID, DIRAIN CURRENT (A) 15 5 20 10 15 20 -V DS, DRAIN TO SOURCE VOLTAGE (V) Figure 4. Capacitance Figure 3. On-Resistance vs. Drain Current -10 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.6 Vgs Voltage ( V ) -8 -6 -4 -2 VGS = -4.5V 1.4 1.2 1 0.8 0.6 0 0 4 8 12 16 -50 20 -25 0 25 50 75 100 125 150 o TJ, JUNCTION TEMPERATURE ( C) Qg, Charge (nC) Figure 5. Gate Charge Figure 6. On-Resistance vs. Junction Temperature 3 PRELIMINARY Publication Order Number: DS-AM4929_E AM4929P Analog Power Typical Electrical Characteristics (P-Channel) R DS(ON), ON-RESISTANCE (OHM) 0.15 10 1 o T A = 125 C 0.1 o 25 C 0.01 0.001 0.0001 0.12 0.09 0.06 0.03 0 0 0.2 0.4 0.6 0.8 1 1.2 1 2 -V SD, BODY DIODE FORWARD VOLTAGE (V) 3 4 5 -V GS, GATE TO SOURCE VOLTAGE (V) Figure 7. Source-Drain Diode Forward Voltage Figure 8. On-Resistance with Gate to Source Voltage 50 P(pk), PEAK TRANSIENT POWER (W) 1.2 -V th, GATE-SOURCE THRESTHOLD VOLTAGE (V) -IS, REVERSE DRAIN CURRENT (A) 100 ID = -250µA 1 0.8 0.6 0.4 SINGLE PULSE RqJA = 125oC/W TA = 25oC 40 30 20 10 0 -50 -25 0 25 50 75 100 125 150 0.001 o 0.01 TA, AMBIENT TEMPERATURE ( C) Figure 9. Vth Gate to Source Voltage Vs Temperature 0.1 1 t1, TIME (SEC) 10 100 Figure 10. Single Pulse Maximum Power Dissipation Normalized Thermal Transient Junction to Ambient 1 D = 0.5 RqJ A(t) = r(t) + R qJ A R qJ A = 125 癈/W 0.2 0.1 0.1 0.0 P (pk) 0.02 t1 t2 TJ - TA = P * R qJ A(t) Duty C ycle , D = t1 / t2 0.01 0.01 S INGLE P ULS E 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIM E (s ec ) Figure 11. Transient Thermal Response Curve 4 PRELIMINARY Publication Order Number: DS-AM4929_E AM4929P Analog Power Package Information SO-8: 8LEAD H x 45° 5 PRELIMINARY Publication Order Number: DS-AM4929_E