AOSMD AO4813_11

AO4813
30V Dual P-Channel MOSFET
General Description
Product Summary
The AO4813 combines advanced trench MOSFET
technology with a low resistance package to provide
extremely low RDS(ON). This device is ideal for load switch
and battery protection applications.
ID (at VGS=-10V)
-30V
-7.1A
RDS(ON) (at VGS=-10V)
< 25mΩ
RDS(ON) (at VGS = -4.5V)
< 40mΩ
VDS
100% UIS Tested
100% Rg Tested
SOIC-8
Top View
D
D
Bottom View
Top View
S2
G2
S1
G1
1
2
3
4
8
7
6
5
D2
D2
D1
D1
G
G
S
S
Pin1
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Drain-Source Voltage
Gate-Source Voltage
VGS
TA=25°C
Continuous Drain
Current
Pulsed Drain Current
C
Units
V
±20
V
-7.1
ID
TA=70°C
Maximum
-30
A
-5.6
IDM
-40
Avalanche Current C
IAS, IAR
-27
A
Avalanche energy L=0.1mH C
TA=25°C
EAS, EAR
36
mJ
Power Dissipation B
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Lead
Rev 9: April 2011
2
PD
TA=70°C
Steady-State
Steady-State
-55 to 150
TJ, TSTG
Symbol
t ≤ 10s
W
1.3
RθJA
RθJL
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Typ
48
74
32
°C
Max
62.5
90
40
Units
°C/W
°C/W
°C/W
Page 1 of 6
AO4813
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=-250µA, VGS=0V
-30
-1
Zero Gate Voltage Drain Current
IGSS
Gate-Body leakage current
VGS(th)
Gate Threshold Voltage
VDS=VGS ID=-250µA
-1.5
ID(ON)
On state drain current
VGS=-10V, VDS=-5V
-40
TJ=55°C
-5
VDS=0V, VGS= ±20V
±100
VGS=-10V, ID=-7.1A
33
VGS=-4.5V, ID=-5.6A
27
40
VDS=-5V, ID=-7.1A
24
Forward Transconductance
VSD
Diode Forward Voltage
IS=-1A,VGS=0V
IS
Maximum Body-Diode Continuous Current
TJ=125°C
-0.75
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Rg
Gate resistance
1040
VGS=0V, VDS=-15V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
µA
nA
V
mΩ
mΩ
S
-1
V
-2.5
A
1250
pF
180
2
Units
A
24
gFS
Output Capacitance
-2.5
25
Static Drain-Source On-Resistance
Reverse Transfer Capacitance
-2.0
17
RDS(ON)
Crss
Max
V
VDS=-30V, VGS=0V
IDSS
Coss
Typ
pF
125
175
pF
4
6
Ω
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
19
nC
Qg(4.5V) Total Gate Charge
9.6
nC
3.6
nC
VGS=-10V, VDS=-15V, ID=-7.1A
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
4.6
nC
tD(on)
Turn-On DelayTime
10
ns
tr
Turn-On Rise Time
5.5
ns
VGS=-10V, VDS=-15V, RL=2.2Ω,
RGEN=3Ω
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
Qrr
Body Diode Reverse Recovery Charge IF=-7.1A, dI/dt=500A/µs
IF=-7.1A, dI/dt=500A/µs
26
ns
9
ns
11.5
ns
nC
25
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in2 FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 9: April 2011
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Page 2 of 6
AO4813
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
60
40
-10V
VDS=-5V
-7V
-5V
50
30
-4.5V
-ID(A)
-ID (A)
40
30
20
20
-3.5V
10
125°C
25°C
10
VGS=-3.0V
0
0
0
1
2
3
4
0
5
1
-VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
35
3
4
5
Normalized On-Resistance
1.8
30
RDS(ON) (mΩ )
2
-VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
25
VGS=-4.5V
20
15
VGS=-10V
1.6
VGS=-10V
ID=-7.1A
1.4
17
5
2
10
VGS=-4.5V
1.2
1
ID=-5.6A
0.8
10
0
0
5
10
15
20
-ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
25
50
75
100
125
150
175
0
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
18
(Note E)
60
1.0E+02
ID=-7.1A
1.0E+01
50
40
40
-IS (A)
RDS(ON) (mΩ )
1.0E+00
125°C
30
125°C
1.0E-01
1.0E-02
1.0E-03
20
25°C
25°C
1.0E-04
1.0E-05
10
2
4
6
8
10
-VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev 9: April 2011
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
-VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
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AO4813
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1600
10
VDS=-15V
ID=-7.1A
1400
Ciss
1200
Capacitance (pF)
-VGS (Volts)
8
6
4
1000
800
600
Coss
400
2
200
0
0
5
10
15
Qg (nC)
Figure 7: Gate-Charge Characteristics
100
-IAR (A) Peak Avalanche Current
Crss
0
20
0
TA=25°C
10
15
20
25
-VDS (Volts)
Figure 8: Capacitance Characteristics
30
100.0
TA=100°C
TA=150°C
-ID (Amps)
10.0
TA=125°C
10
5
RDS(ON)
limited
10µs
100µs
1.0
1ms
10ms
TJ(Max)=150°C
TA=25°C
0.1
10s
DC
0.0
1
0.01
1
10
100
1000
Time in avalanche, tA (µ
µs)
Figure 9: Single Pulse Avalanche capability (Note
C)
0.1
1
-VDS (Volts)
10
100
Figure 10: Maximum Forward Biased Safe
Operating Area (Note F)
10000
TA=25°C
Power (W)
1000
100
10
1
0.00001
0.001
0.1
10
1000
Pulse Width (s)
Figure 11: Single Pulse Power Rating Junction-to-Ambient (Note F)
Rev 9: April 2011
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Page 4 of 6
AO4813
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
Zθ JA Normalized Transient
Thermal Resistance
10
1
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
RθJA=90°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
PD
0.01
Single Pulse
Ton
T
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 12: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 9: April 2011
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Page 5 of 6
AO4813
Gate Charge Test Circuit & Waveform
Vgs
Qg
-10V
-
-
VDC
+
VDC
Qgd
Qgs
Vds
+
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
toff
ton
Vgs
-
DUT
Vgs
VDC
td(on)
t d(off)
tr
tf
90%
Vdd
+
Rg
Vgs
10%
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
2
L
E AR= 1/2 LIAR
Vds
Vds
Id
-
Vgs
Vgs
VDC
+
Rg
BVDSS
Vdd
Id
I AR
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds Isd
Vgs
Ig
Rev 9: April 2011
L
-Isd
+ Vdd
t rr
dI/dt
-I RM
Vdd
VDC
-
-I F
-Vds
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Page 6 of 6