AOZ8905 Ultra-Low Capacitance TVS Diode Array General Description Features The AOZ8905 is a transient voltage suppressor array designed to protect high speed data lines such as HDMI, USB 2.0, MDDI, SATA, and Gigabit Ethernet from damaging ESD events. z ESD protection for high-speed data lines: This device incorporates eight surge rated, low capacitance steering diodes and a TVS in a single package. During transient conditions, the steering diodes direct the transient to either the positive side of the power supply line or to ground. The AOZ8905 provides a typical line to line capacitance of 0.35pF and low insertion loss up to 3GHz providing greater signal integrity making it ideally suited for HDMI 1.3 or USB 2.0 applications, such as Digital TVs, DVD players, Computing, set-top boxes and MDDI applications in mobile computing devices. The AOZ8905 comes in RoHS compliant and halogen free SOT23-6L package and is rated -40°C to +85°C junction temperature range. – IEC 61000-4-2, level 4 (ESD) immunity test – ±15kV (air discharge) and ±8kV (contact discharge) – IEC61000-4-4 (EFT) 40A (5/50nS) – IEC61000-4-5 (Lightning) 2.5A (8/20µS) – Human Body Model (HBM) ±15kV z Array of surge rated diodes with internal TVS diode z Small package saves board space z Protects four I/O lines z Low capacitance between I/O lines: 0.35pF z Low clamping voltage z Low operating voltage: 5.0V Applications z HDMI, USB 2.0, MDDI, SATA ports z Monitors and flat panel displays z Set-top box z Video graphics cards z Digital Video Interface (DVI) z Notebook computers Typical Application AOZ8905 AOZ8905 TX2+ TX2- RX2+ RX2- TX1+ TX1- TX0+ TX0- RX1+ RX1HDMI Receiver RX0+ RX0- CLK+ CLK- CLK+ CLK- HDMI Transmitter Connector Connector AOZ8905 AOZ8905 Figure 1. HDMI Ports Rev. 1.1 April 2010 www.aosmd.com Page 1 of 10 AOZ8905 Ordering Information Part Number Ambient Temperature Range Package Environmental AOZ8905CI -40°C to +85°C SOT23-6L RoHS Compliant Green Product AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information. Pin Configuration CH1 1 6 CH4 VN 2 5 NC CH2 3 4 CH3 SOT23-6 (Top View) Absolute Maximum Ratings Exceeding the Absolute Maximum ratings may damage the device. Parameter Rating Storage Temperature (TS) -65°C to +150°C ESD Rating per IEC61000-4-2, contact ESD Rating per IEC61000-4-2, air (1) ±8kV (1) ESD Rating per Human Body Model ±15kV (2) ±15kV Notes: 1. IEC 61000-4-2 discharge with CDischarge = 150pF, RDischarge = 330Ω. 2. Human Body Discharge per MIL-STD-883, Method 3015 CDischarge = 100pF, RDischarge = 1.5kΩ. Maximum Operating Ratings Parameter Rating Junction Temperature (TJ) Rev. 1.1 April 2010 -40°C to +125°C www.aosmd.com Page 2 of 10 AOZ8905 Electrical Characteristics TA = 25°C unless otherwise specified. Specifications in BOLD indicate a temperature range of -40°C to +85°C. Symbol VRWM VBR Parameter Reverse Working Voltage Conditions Min. (4) IT = 1mA, between I/O and VN IR Reverse Leakage Current VRWM = 5V, between I/O and VN VF Diode Forward Voltage IF = 15mA Cj Max. Units 5.0 V Between I/O and VN Reverse Breakdown Voltage VCL Typ. (3) 6.0 0.70 V 1 µA 1 V 15.0 -3.5 V V 22.0 -6.0 V V 15.5 V 0.85 (5) Channel Clamp Voltage Positive Transients Negative Transient IPP = 1A, tp = 100ns, any I/O pin to Ground Channel Clamp Voltage Positive Transients Negative Transient IPP = 5A, tp = 100ns, any I/O pin to Ground(5) Channel Clamp Voltage Any I/O Pin to Ground IPP = 1A, tp = 8/20µs Channel Input Capacitance VR = 0V, f = 1MHz, between I/O pins 0.35 0.40 pF VR = 0V, f = 1MHz, any I/O pin to Ground 0.70 0.80 pF Notes: 3. The working peak reverse voltage, VRWM, should be equal to or greater than the DC or continuous peak operating voltage level. 4. VBR is measured at the pulse test current IT. 5. Measurements performed using a 100ns Transmission Line Pulse (TLP) system. Rev. 1.1 April 2010 www.aosmd.com Page 3 of 10 AOZ8905 Typical Performance Characteristics Clamping Voltage vs. Peak Pulse Current 5 0 Insertion Loss (dB) Clamping Voltage, VCL (V) I/O – Gnd Insertion Loss (S21) vs. Frequency (tperiod = 100ns, tr = 1ns) 25 20 15 -5 -10 -15 -20 10 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 -25 5.0 1 10 Forward Voltage vs. Forward Current -20 Insertion Loss (dB) Forward Voltage (V) 10000 0 6 5 4 3 2 1 1.0 1000 Analog Crosstalk (I/O–I/O) vs. Frequency (tperiod = 100ns, tr = 1ns) 7 100 Frequency (MHz) Peak Pulse Current, IPP (A) -40 -60 -80 -100 1.5 2.0 2.5 3.0 3.5 4.0 Forward Current, IPP (A) 4.5 -120 5.0 1 10 100 1000 10000 Frequency (MHz) Normalized Input Capacitance (pF) Typical Variation of CIN vs. VR) (VP = 3.3V, f = 1MHz, T = 25˚C 1.2 1.0 0.8 0.6 0.4 0.2 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Input Voltage (V) Rev. 1.1 April 2010 www.aosmd.com Page 4 of 10 AOZ8905 TDR for HDMI 1.3 The AOZ8905 TDR test results indicates the minimal effect the low capacitance has on the HDMI 1.3 TDR measurements. Below are the graphs from the TDR measurements. The two graphs show the before and after results of the TDR of each of the differential data line (Clock, D0, D1, D2) of the HDMI when the AOZ8905 was populated onto the PCB. 125 125 120 120 115 115 110 110 105 105 100 100 95 95 90 90 85 85 80 80 75 -0.200 ns (Step 2.56 ps) 0.100ns/ 75 0.7500 ns Figure 2. Ideal Stripe-Line -0.200 ns (Step 2.56 ps) 0.100ns/ 0.7500 ns Figure 3. With AOZ8905 Device on the Board (TDR Measurement with 200pS Rise Time Using AOS Evaluation Board) High Speed PCB Layout Guidelines Printed circuit board layout is the key to achieving the highest level of surge immunity on power and data lines. The location of the protection devices on the PCB is the simplest and most important design rule to follow. The AOZ8905 devices should be located as close as possible to the noise source. The placement of the AOZ8905 devices should be used on all data and power lines that enter or exit the PCB at the I/O connector. In most systems, surge pulses occur on data and power lines that enter the PCB through the I/O connector. Placing the AOZ8905 devices as close as possible to the noise source ensures that a surge voltage will be clamped before the pulse can be coupled into adjacent PCB traces. In addition, the PCB should use the shortest possible traces. A short trace length equates to low impedance, which ensures that the surge energy will be dissipated by the AOZ8905 device. Long signal traces will act as antennas to receive energy from fields that are produced by the ESD pulse. By keeping line lengths as short as possible, the efficiency of the line to act as an antenna for ESD related fields is reduced. Minimize interconnecting line lengths by placing devices with the most interconnect as close together as possible. The protection circuits should shunt the surge voltage to either the reference or chassis ground. Shunting the surge voltage directly to the IC’s signal ground can cause Rev. 1.1 April 2010 ground bounce. The clamping performance of TVS diodes on a single ground PCB can be improved by minimizing the impedance with relatively short and wide ground traces. The PCB layout and IC package parasitic inductances can cause significant overshoot to the TVS’s clamping voltage. The inductance of the PCB can be reduced by using short trace lengths and multiple layers with separate ground and power planes. One effective method to minimize loop problems is to incorporate a ground plane in the PCB design. The AOZ8905 ultra-low capacitance TVS is designed to protect four high speed data transmission lines from transient over-voltages by clamping them to a fixed reference. The low inductance and construction minimizes voltage overshoot during high current surges. When the voltage on the protected line exceeds the reference voltage the internal steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. The AOZ8905 is designed for the ease of PCB layout by allowing the traces to run underneath the device. The pinout of the AOZ8905 is designed to simply drop onto the IO lines of a High Definition Multimedia Interface (HDMI) or USB 3.0 design with minimal diversion of the signal lines that may add more parasitic inductance. www.aosmd.com Page 5 of 10 AOZ8905 Based on the AOZ8905 SOT23-6 package design, a very straight forward layout can be achieved. To give the TDR an extra level of margin the traces may be compensated to have a nominal impedance of 90Ω throughout the differential pair. To make the design perfect the added capacitance of the device will have to be compensated by the use of “Skinny Traces”. The skinny traces are a narrow stripe line acting to lower the parasitic capacitance on the differential stripe line. The differential impedance of the USB 3.0 transmission line becomes well centered to 90Ω. A layout EM field simulator is recommended before fabrication to insure a perfect stripe line. With careful layout and placement of the device, the AOZ8905 can protect the USB 3.0 data line effectively and safely and meet the ESD immunity requirements of the IEC61000-4-2, level 4, ±15kV air discharge, ±8kV contact discharge. Figure 4. HDMI PCB Layout with Compensated Traces Rev. 1.1 April 2010 Number of Layers 4 Copper Trace Thickness 1.4 mils Dielectric Constant, εr 4.6 Overall Board Thickness 62 mils Dielectric Thickness Between Top and Ground Layer 10 mils www.aosmd.com Page 6 of 10 AOZ8905 Package Dimensions, SOT23-6L Gauge Plane D e1 Seating Plane 0.25mm c L E E1 θ1 e b A2 A .010mm A1 Dimensions in millimeters RECOMMENDED LAND PATTERN 2.40 0.80 0.95 0.63 UNIT: mm Dimensions in inches Symbols A A1 A2 Min. 0.90 0.00 0.80 Nom. — — 1.10 Max. 1.25 0.15 1.20 Symbols A A1 A2 Min. 0.035 0.00 0.031 Nom. — — 0.043 Max. 0.049 0.006 0.047 b c D E E1 0.30 0.08 2.70 2.50 1.50 0.40 0.13 2.90 2.80 1.60 0.50 0.20 3.10 3.10 1.70 b c D E E1 0.012 0.003 0.106 0.098 0.059 0.016 0.005 0.114 0.110 0.063 0.020 0.008 0.122 0.122 0.067 e e1 L θ1 0.95 BSC 1.90 BSC 0.30 — 0.60 0° — 8° e e1 L θ1 0.037 BSC 0.075 BSC 0.012 — 0.024 0° — 8° Notes: 1. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 5 mils each. 2. Dimension “L” is measured in gauge plane. 3. Tolerance ±0.100mm (4 mil) unless otherwise specified. 4. Followed from JEDEC MO-178C & MO-193C. 6. Controlling dimension is millimeter. Converted inch dimensions are not necessarily exact. Rev. 1.1 April 2010 www.aosmd.com Page 7 of 10 AOZ8905 Tape and Reel Dimensions, SOT23-6L Tape P1 D1 T P2 E1 E2 E B0 K0 A0 D0 P0 Feeding Direction Unit: mm Package A0 SOT-23 (8mm) 3.15 ±0.10 B0 3.20 ±0.10 K0 D0 D1 E E1 E2 P0 P1 P2 T 1.40 ±0.10 1.00 Min. 1.50 ±0.10 8.00 ±0.30 1.75 ±0.10 3.50 ±0.05 4.00 ±0.10 4.00 ±0.10 2.00 ±0.05 0.25 ±0.05 Reel W1 S G N M K V R H Unit: mm W Tape Size Reel Size M N W W1 H K S G R V 8mm ø180 ø180.00 ±0.50 ø60.50 9.00 ±0.30 11.40 ±1.00 ø13.00 10.60 2.00 ±0.50 ø9.00 5.00 18.00 +0.50 / -0.20 Leader/Trailer and Orientation Trailer Tape (300mm min., 75 Empty Pockets) Rev. 1.1 April 2010 Components Tape Orientation in Pocket www.aosmd.com Leader Tape (500mm min., 125 Empty Pockets) Page 8 of 10 AOZ8905 Package Marking AOZ8905CI (SOT-23) AT Part Number Code Assembly Lot Code Week & Year Code Option & Assembly Location Code Rev. 1.1 April 2010 www.aosmd.com Page 9 of 10 AOZ8905 Revision History Revision Revised Item Rev. 1.0 Initial release Rev. 1.1 TDR and Layout Guidelines added This datasheet contains preliminary data; supplementary data may be published at a later date. Alpha & Omega Semiconductor reserves the right to make changes at any time without notice. LIFE SUPPORT POLICY ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. Rev. 1.1 April 2010 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.aosmd.com Page 10 of 10