CD4035BM/CD4035BC 4-Bit Parallel-In/Parallel-Out Shift Register General Description Features The CD4035B 4-bit parallel-in/parallel-out shift register is a monolithic complementary MOS (CMOS) integrated circuit constructed with P- and N-channel enhancement mode transistors. This shift register is a 4-stage clocked serial register having provisions for synchronous parallel inputs to each stage and serial inputs to the first stage via JK logic. Register stages 2, 3, and 4 are coupled in a serial ‘‘D’’ flipflop configuration when the register is in the serial mode (parallel/serial control low). Parallel entry via the ‘‘D’’ line of each register stage is permitted only when the parallel/serial control is ‘‘high’’. In the parallel or serial mode, information is transferred on positive clock transitions. When the true/complement control is ‘‘high’’, the true contents of the register are available at the output terminals. When the true/complement control is ‘‘low’’, the outputs are the complements of the data in the register. The true/complement control functions asynchronously with respect to the clock signal. JK input logic is provided on the first stage serial input to minimize logic requirements particularly in counting and sequence-generation applications. With JK inputs connected together, the first stage becomes a ‘‘D’’ flip-flop. An asynchronous common reset is also provided. Y Y Y Y Y Y Y Y Y Y Y Y Wide supply voltage range 3.0V to 15V High noise immunity 0.45 VDD (typ.) Low power TTL Fan out of 2 driving 74L compatibility or 1 driving 74LS 4-stage clocked operation Synchronous parallel entry on all 4 stages JK inputs on first stage Asynchronous true/complement control on all outputs Reset control Static flip-flop operation; master/slave configuration Buffered outputs Low power dissipation 5 mW (typ.) (ceramic) High speed to 5 MHz Applications Y Y Y Y Automotive Data terminals Instrumentation Medical electronics Y Y Y Y Alarm systems Industrial controls Remote metering Computers Logic Diagram TL/F/5964 – 1 P/S e 0 e serial mode Input to output is: T/C e 1 e true outputs a) A bidirectional low impedance when control input 1 is low and control input 2 is high. *TG e transmission gate b) An open circuit when control input 1 is high and control input 2 is low. TL/F/5964– 2 C1995 National Semiconductor Corporation TL/F/5964 RRD-B30M105/Printed in U. S. A. CD4035BM/CD4035BC 4-Bit Parallel-In/Parallel-Out Shift Register February 1988 Absolute Maximum Ratings (Notes 1 and 2) Lead Temperature (TL) (Soldering, 10 seconds) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. DC Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline 260§ C Operating Conditions (Note 2) b 0.5V to a 18V DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) CD4035BM CD4035BC b 0.5V to VDD a 0.5V b 65§ C to a 150§ C 700 mW 500 mW 3V to 15V 0V to VDDV b 55§ C to a 125§ C b 40§ C to a 85§ C DC Electrical Characteristics CD4035BM (Note 2) Symbol Parameter b 55§ C Conditions Min IDD Quiescent Device Current VDD e 5V, VIN e VDD or VSS VDD e 10V, VIN e VDD or VSS VDD e 15V, VIN e VDD or VSS VOL Low Level Output Voltage VOH VIL VIH lIOl k 1.0 mA VDD e 5V VDD e 10V VDD e 15V High Level Output Voltage lIOl k 1.0 mA VDD e 5V VDD e 10V VDD e 15V Low Level Input Voltage High Level Input Voltage lIOl k 1.0 mA VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V IOL Low Level Output Current VDD e 5V, VO e 0.4V (Note 3) VDD e 10V, VO e 0.5V VDD e 15V, VO e 1.5V IOH High Level Output Current VDD e 5V, VO e 4.6V (Note 3) VDD e 10V, VO e 9.5V VDD e 15V, VO e 13.5V IIN Input Current a 25§ C Min 5 10 20 0.3 0.5 1.0 5 10 20 150 300 600 mA mA mA 0.05 0.05 0.05 0 0 0 0.05 0.05 0.05 0.05 0.05 0.05 V V V 4.95 9.95 14.95 5 10 15 Min Units Max 1.5 3.0 4.0 Max 4.95 9.95 14.95 V V V 1.5 3.0 4.0 3.5 7.0 11.0 3.5 7.0 11.0 0.64 1.6 4.2 0.51 1.3 3.4 b 0.25 b 0.62 b 1.8 b 0.2 b 0.5 b 1.5 VIN e 0V VIN e 15V a 125§ C Typ 4.95 9.95 14.95 lIOl k 1.0 mA VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V VDD e 15V, VDD e 15V, Max 1.5 3.0 4.0 3.5 7.0 11.0 V V V 0.88 2.25 8.8 0.36 0.9 2.4 mA mA mA 0.36 0.9 b 3.5 b 0.14 b 0.35 b 1.1 mA mA mA b 10 b 5 b 0.1 b 0.1 10b5 0.1 V V V b 1.0 0.1 1.0 mA mA DC Electrical Characteristics CD4035BC (Note 2) Symbol Parameter b 40§ C Conditions Min IDD Quiescent Device Current VDD e 5V, VIN e VDD or VSS VDD e 10V, VIN e VDD or VSS VDD e 15V, VIN e VDD or VSS VOL Low Level Output Voltage lIOl k 1 mA VDD e 5V VDD e 10V VDD e 15V VOH High Level Output Voltage lIOl k 1 mA VDD e 5V VDD e 10V VDD e 15V 4.95 9.95 14.95 2 Max a 25§ C Min a 85§ C Max 20 40 80 0.5 1.0 5.0 20 40 80 150 300 600 mA mA mA 0.05 0.05 0.05 0 0 0 0.05 0.05 0.05 0.05 0.05 0.05 V V V 4.95 9.95 14.95 5 10 15 Min Units Typ 4.95 9.95 14.95 Max V V V DC Electrical Characteristics CD4035BC (Note 2) (Continued) Symbol Parameter b 40§ C Conditions Min VIL Low Level Input Voltage VIH High Level Input Voltage lIOl k 1 mA VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V 25§ C Max Min Typ 1.5 3.0 4.0 85§ C Max Min 1.5 3.0 4.0 lIOl k 1 mA VDD e 5V, VO e 0.5V or 4.5V 3.5 VDD e 10V, VO e 1.0V or 9.0V 7.0 VDD e 15V, VO e 1.5V or 13.5V 11.0 Units Max 1.5 3.0 4.0 3.5 7.0 11.0 V V V 3.5 7.0 11.0 V V V IOL Low Level Output Current VDD e 5V, VO e 0.4V (Note 3) VDD e 10V, VO e 0.5V VDD e 15V, VO e 1.5V 0.52 1.3 3.6 0.44 1.1 3.0 0.88 2.25 8.8 0.36 0.9 2.4 mA mA mA IOH High Level Output Current VDD e 5V, VO e 4.6V (Note 3) VDD e 10V, VO e 9.5V VDD e 15V, VO e 13.5V b 0.2 b 0.5 b 1.4 b 0.16 b 0.4 b 1.2 0.36 0.9 b 3.5 b 0.12 b 0.3 b 1.0 mA mA mA IIN Input Current VDD e 15V, VDD e 15V, VIN e 0V VIN e 15V b 0.3 0.3 b 10 b 5 b 0.3 10b5 0.3 b 1.0 1.0 mA mA Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed, they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: VSS e 0V unless otherwise specified. Note 3: IOH and IOL are tested one output at a time. AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, RL e 200k, tr and tf e 20 ns, unless otherwise specified. Symbol Parameter Conditions Min Typ Max Units CLOCKED OPERATION tPHL, tPLH Propagation Delay Time VDD e 5V VDD e 10V VDD e 15V 250 100 75 500 200 150 ns ns ns tTHL Transition Time High Low to High VDD e 5V VDD e 10V VDD e 15V 90 50 40 175 75 60 ns ns ns tTLH Transition Time Low to High VDD e 5V VDD e 10V VDD e 15V 135 70 60 270 140 120 ns ns ns tWL, tWH Minimum Clock Pulse Width VDD e 5V VDD e 10V VDD e 15V trCL, tfCL Clock Rise and Fall Time VDD e 5V VDD e 10V VDD e 15V tS Minimum Set-up Time J/K Lines 335 165 100 135 50 40 ns ns ns 15 10 5 ms ms ms VDD e 5V VDD e 10V VDD e 15V 250 100 80 500 200 160 ns ns ns tS Parallel-In Lines VDD e 5V VDD e 10V VDD e 15V 250 100 80 500 200 160 ns ns ns tS P/S Control VDD e 5V VDD e 10V VDD e 15V 100 40 35 200 80 60 ns ns ns fMAX Maximum Clock Frequency VDD e 5V VDD e 10V VDD e 15V 3 1.5 3 5 2.5 6 9 MHz MHz MHz AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, RL e 200k, tr and tf e 20 ns, unless otherwise specified. (Continued) Symbol Parameter Conditions Min Typ Max Units 5 7.5 pF CLOCKED OPERATION (Continued) CIN Input Capacitance Any Input RESET OPERATION tPHL, tPLH Propagation Delay Time VDD e 5V VDD e 10V VDD e 15V 300 150 85 500 200 150 ns ns ns tWH Minimum Reset Pulse Width VDD e 5V VDD e 10V VDD e 15V 75 30 25 250 110 80 ns ns ns *AC Parameters are guaranteed by DC correlated testing. Truth Table tn b 1 (Inputs) CL tn (Outputs) J K R Qnb1 Qn L L L L 0 I X I X X 0 0 0 0 0 0 0 0 I 0 I 0 Qnb1 Qnb1 TOGGLE MODE L K X X X X I X X 0 0 I I Qnb1 X I Qn b 1 0 Switching Time Waveforms TL/F/5964 – 3 T/C Input Low Reset Input Low 4 Connection Diagram Dual-In-Line Package TL/F/5964 – 4 Top View Order Number CD4035B Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number CD4035BMJ or CD4035BCJ NS Package Number J16A 5 CD4035BM/CD4035BC 4-Bit Parallel-In/Parallel-Out Shift Register Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number CD4035BMN or CD4035BCN NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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