AVAGO ACPL-M50L-500E

ACPL-M50L, ACPL-054L, ACPL-W50L and ACPL-K54L
Low Power, 1MBd Digital Optocoupler
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Features
The ACPL-M50L (single-channel in SO-5 footprint),
ACPL-054L (dual-channel in SO-8 footprint), ACPL-W50L
(single-channel in stretched SO-6 footprint) and ACPLK54L (dual-channel in stretched SO-8 footprint) are low
power, low-input current, 1MBd digital optocouplers.
 Wide supply voltage Vcc: 2.7V to 24V
This digital optocouplers use an insulating layer between
the light emitting diode and an integrated photon detector
to provide electrical insulation between input and output.
Separate connections for the photodiode bias and output
transistor collector increase the speed up to a hundred
times over that of a conventional photo-transistor coupler
by reducing the base-collector capacitance.
 Compact SO-5, SO-8, stretched SO-6 and stretched
SO-8 package
 Low Drive Current: 3mA
 Open-Collector Output
 TTL compatible
 15 kV/s High Common-Mode Rejection at VCM = 1500 V
 Guaranteed performance from Temperature Range:
-40°C to +105°C
 Low Propagation Delay: 1s max at 5V
The ACPL-M50L/054L/W50L/K54L have an increased common mode transient immunity of 15kV/s minimum at
VCM = 1500V over a temperature range of -40 to 105°C.
The current transfer ratio (CTR) is 140% typical for ACPLM50L or 130% typical for ACPL-054L/W50L/K54L at IF
= 3mA. This digital optocoupler can be use in any TTL/
CMOS, TTL/LSTTL or wide bandwidth analog applications.
 Worldwide Safety Approval:
(Pending except ACPL-M50L)
– UL1577 recognized,
3750Vrms/1min for ACPL-M50L/054L,
5000Vrms/1min for ACPL-W50L/K54L,
– CSA Approval
– IEC 60747-5-5, IEC/EN/DIN EN 60747-5-2
Functional Diagram
Applications
6 VCC
Anode 1
5 VO
Cathode 3
4 GND
ACPL-M50L
6 VCC
2
5 VO
 Micro-controller Interface
4 GND
 Feedback Elements in Switching Power Supplies
NC
Cathode 3
 Digital Signal Isolation
 Digital isolation for A/D, D/A conversion Digital field
ACPL-W50L
Anode1 1
8 VCC
Cathode1 2
7 VO1
Cathode2 3
6 VO2
Anode2 4
 Communications Interface
Anode 1
5 GND
Truth Table
LED
Vo
ON
LOW
OFF
HIGH
ACPL-054L/K54L
The connection of a 0.1 F bypass capacitor between pins 4 and 6 for
ACPL-M50L/W50L and between pins 5 and 8 for ACPL-054L/K54L is
recommended.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
Ordering Information
ACPL-M50L and ACPL-054L are UL Recognized with 3750 Vrms for 1 minute per UL1577. ACPL-W50L and ACPL-K54L are
UL Recognized with 5000 Vrms for 1 minute per UL1577
Options
Part Number
RoHS Compliant
Package
Surface
Mount
ACPL-M50L
-000E
SO-5
X
ACPL-054L
X
-500E
X
X
-560E
X
X
-000E
SO-8
X
X
X
X
X
X
100 per tube
1500 per reel
X
X
X
X
X
X
-060E
1500 per reel
1500 per reel
100 per tube
-560E
Stretched
SO-8
X
X
-500E
-000E
100 per tube
100 per tube
-500E
Stretched
SO-6
Quantity
1500 per reel
X
X
-060E
ACPL-K54L
X
-060E
-000E
IEC 60747-5-5,
IEC/EN/DIN EN
60747-5-2
100 per tube
-060E
-560E
ACPL-W50L
Tape
& Reel
100 per tube
1000 per reel
X
X
1000 per reel
80 per tube
X
X
-500E
X
X
-560E
X
X
80 per tube
1000 per reel
X
1000 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
ACPL-M50L-500E to order product of Mini-flat Surface Mount 5-pin package in Tape and Reel packaging with RoHS
compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
2
Package Outline Drawings
ACPL-M50L Small Outline SO-5 Package (JEDEC MO-155)
ANODE
M50L
YWW
4.4 ± 0.1
(0.173 ± 0.004)
1
7.0 ± 0.2
(0.276 ± 0.008)
CATHODE
3
6
VCC
5
VOUT
4
GND
0.4 ± 0.05
(0.016 ± 0.002)
3.6 ± 0.1*
(0.142 ± 0.004)
0.102 ± 0.102
(0.004 ± 0.004)
2.5 ± 0.1
(0.098 ± 0.004)
0.216 ± 0.038
(0.0085 ± 0.0015)
Dimensions in Millimeters (Inches)
* Maximum mold flash on each side is 0.15 mm (0.006)
Note: Floating lead protrusion is 0.15 mm (6 mils) max.
MAX. LEAD COPLANARITY
= 0.102 (0.004)
Land Pattern Recommendation
4.4
(0.17)
1.3
(0.05)
2.5
(0.10)
1.8
(0.072)
8.27
(0.325)
Dimension in Millimeters (Inches)
3
7° MAX.
0.71
(0.028) MIN
1.27 BSC
(0.050)
0.64
(0.025)
ACPL-054L (Small Outline S0-8 Package)
LEAD FREE
8
7
6
5
x54LV
YWW
3.937 ± 0.127
(0.155 ± 0.005)
LAND PATTERN RECOMMENDATION
5.994 ± 0.203
(0.236 ± 0.008)
TYPE NUMBER
(‘V’ for OPTION 060)
7.49 (0.295)
DATE CODE
PIN ONE
1
2
3
4
0.406 ± 0.076
(0.016 ± 0.003)
1.9 (0.075)
1.270 BSC
(0.050)
0.64 (0.025)
* 5.080 ± 0.127
(0.200 ± 0.005)
7°
3.175 ± 0.127
(0.125 ± 0.005)
1.524
(0.060)
45° X
0.432
(0.017)
0 ~ 7°
* Total package length (inclusive of mold flash)
5.207 ± 0.254 (0.205 ± 0.010)
Dimensions in Millimeters (Inches).
Lead coplanarity = 0.10 mm (0.004 inches) max.
Option number 500 not marked.
0.228 ± 0.025
(0.009 ± 0.001)
0.203 ± 0.102
(0.008 ± 0.004)
0.305 MIN.
(0.012)
Note: Floating lead protrusion is 0.15 mm (6 mils) max.
ACPL-W50L Stretched SO-6 Package
4.480±0.254
(0.0180±0.010)
LAND PATTERN RECOMMENDATION
1.27 (0.050) BSG
6
5
12.65 (0.498)
4
ROHS-COMPLIANCE
INDICATOR
0.76 (0.030)
PART NUMBER
W50L
YWW
DATE CODE
1.91 (0.075)
1
2
3
0.381±0.127
(0.015±0.005)
7°
+0.127
0
0.268 +0.005
- 0.000
6.807
(
0.45 (0.018)
7°
4
0.750±0.250
(0.0295±0.010)
1.590±0.127
(0.063±0.005)
45°
3.180±0.127
(0.125±0.005)
0.20±0.10
(0.008±0.004)
Dimensions in Millimeters (Inches).
Lead coplanarity = 0.1 mm (0.004 inches).
)
11.50±0.250
(0.453±0.010)
ACPL-K54L Stretched SO-8 Package
5.850±0.254
(0.230±0.010)
1.270 (0.050) BSG
8
7
6
LAND PATTERN RECOMMENDATION
5
ROHS-COMPLIANCE
INDICATOR
PART NUMBER
K54L
YWW
DATE CODE
1.905 (0.1)
1
2
7°
3
12.650 (0.5)
4
0.381±0.13
(0.015±0.005)
0.450 (0.018)
7°
1.590±0.127
(0.063±0.005)
45°
3.180±0.127
(0.125±0.005)
0.200±0.100
(0.008±0.004)
0.750±0.250
(0.0295±0.010)
Dimensions in Millimeters (Inches).
Lead coplanarity = 0.1 mm (0.004 inches).
6.807±0.127
(0.268±0.005)
11.5±0.250
(0.453±0.010)
Solder Reflow Profile
Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-Halide Flux should be used.
Regulatory Information
The ACPL-M50L/054L/W50L/K54L will be approved by the following organizations:
UL
Approval under UL 1577, component recognition program up to VISO = 3750 VRMS for ACPL-M50L/054L and VISO = 5000
VRMS for ACPL-W50L/K54L.
CSA
Approval under CSA Component Acceptance Notice #5.
IEC 60747-5-5, IEC/EN/DIN EN 60747-5-2 (Option 060E only)
5
Insulation and Safety Related Specifications
Parameter
Symbol
ACPL-M50L
ACPL-054L
ACPL-W50L
ACPL-K54L
Units
Conditions
Minimum External Air
Gap (Clearance)
L(101)
5
4.9
8
mm
Measured from input terminals to output
terminals, shortest distance through air.
Minimum External
Tracking (Creepage)
L(102)
5
4.8
8
mm
Measured from input terminals to output
terminals, shortest distance path along
body.
0.08
0.08
0.08
mm
Through insulation distance conductor
to conductor, usually the straight line
distance thickness between the emitter
and detector.
175
175
175
Volts
DIN IEC 112/VDE 0303 Part 1
IIIa
IIIa
IIIa
Minimum Internal
Plastic Gap
(Internal Clearance)
Tracking Resistance
(Comparative Tracking
Index)
CTI
Isolation Group
Material Group (DIN VDE 0110, 1/89,
Table 1)
IEC 60747-5-5, IEC/EN/DIN EN 60747-5-2 Insulation Characteristics* (Option 060E)
Symbol
Description
Installation classification per DIN VDE 0110/39, Table 1
for rated mains voltage ≤ 150 Vrms
for rated mains voltage ≤ 300 Vrms
for rated mains voltage ≤ 600 Vrms
for rated mains voltage ≤ 1000 Vrms
Characteristic
Unit
ACPL-M50L/
054L
ACPL-W50L/
K54L
I – IV
I – III
I – II
I – IV
I – IV
I – III
I – III
Climatic Classification
55/105/21
55/105/21
Pollution Degree (DIN VDE 0110/39)
2
2
Maximum Working Insulation Voltage
VIORM
560
1140
Vpeak
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec,
Partial discharge < 5 pC
VPR
1050
2137
Vpeak
Input to Output Test Voltage, Method a*
VIORM x 1.6 = VPR, Type and Sample Test, tm = 10 sec,
Partial discharge < 5 pC
VPR
896
1824
Vpeak
Highest Allowable Overvoltage (Transient Overvoltage tini = 60 sec)
VIOTM
6000
8000
Vpeak
Safety-limiting values – maximum values allowed in the event of a failure.
Case Temperature
Input Current**
Output Power**
TS
IS, INPUT
PS, OUTPUT
150
150
600
175
230
600
°C
mA
mW
Insulation Resistance at TS, VIO = 500 V
RS
>109
>109

*
Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section,
(IEC 60747-5-5, IEC/EN/DIN EN 60747-5-2) for a detailed description of Method a and Method b partial discharge test profiles.
** Refer to the following figure for dependence of PS and IS on ambient temperature.
6
Absolute Maximum Ratings
Parameter
Symbol
Min.
Max.
Units
Storage Temperature
TS
-55
125
°C
Operating Temperature
TA
-40
105
°C
260
°C
Lead Soldering Cycle
Temperature
10
s
Average Forward Input Current[1]
Time
IF(avg)
20
mA
Peak Forward Input Current[2]
(50% duty cycle, 1ms pulse width)
IF(peak)
40
mA
Peak Transient Input Current
(≤1s pulse width, 300ps)
IF(trans)
1
A
Reversed Input Voltage
VR
5
V
Input Power Dissipation[3]
PIN
36
mW
Output Power Dissipation[4]
PO
45
mW
Average Output Current
IO(AVG)
8
mA
Peak Output Current
IO(PEAK)
16
mA
Supply Voltage
VCC
-0.5
30
V
Output Voltage
VO
-0.5
24
V
Solder Reflow Temperature Profile
See Package Outline Drawings section
Notes:
1. Derate linearly above 85°C free-air temperature at a rate of 0.5 mA/°C.
2. Derate linearly above 85°C free-air temperature at a rate of 1.0 mA/°C.
3. Derate linearly above 85°C free-air temperature at a rate of 0.9 mW/°C.
4. Derate linearly above 85°C free-air temperature at a rate of 1.2 mW/°C.
Recommended Operating Conditions
Parameter
Symbol
Min.
Max.
Units
Supply Voltage
VCC
2.7
24
V
Input Current, High Level
IFH
3
10
mA
Operating Temperature
TA
-40
105
°C
Forward Input Voltage (OFF)
VF(OFF)
0.8
V
7
Electrical Specifications (DC)
Over recommended operating TA = -40°C to 105°C, supply voltage (2.7V ≤ VCC ≤ 24V) and unless otherwise specified. All
typicals are at TA=25°C
Parameter
Sym.
Part Number Min.
Typ.
Max.
Units
Conditions
Current Transfer
Ratio
CTR[1]
ACPL-M50L
100
140
200
%
TA = 25°C
ACPL-054L
ACPL-W50L
ACPL-K54L
93
130
200
80
Logic Low
Output Voltage
VOL
Logic High
Output Current
IOH
53
VO=0.4V
VO=0.5V
%
%
Fig.
TA = 25°C
VO=0.4V
VO=0.5V
%
0.2
0.4
V
TA = 25°C
IO=3mA
0.2
0.5
V
0.003
0.5
A
0.01
1
VO=VCC=24V
80
VO=VCC=24V
IO=1.6mA
TA = 25°C
VO=VCC=5.5V
Logic Low
Supply Current
per Channel
ICCL
36
100
A
IF=3mA,
VO=open,
VCC=24V
Logic High
Supply Current
per Channel
ICCH
0.02
2
A
IF=0mA,
VO=open,
VCC=24V
Input Forward
Voltage
VF
1.5
1.8
V
1.5
1.95
Input Reversed
Breakdown Voltage
BVR
Temperature
Coefficient of
Forward Voltage
VF/
TA
Input Capacitance
CIN
TA=25°C
IF=3mA
V
IF=3mA
V
IR=10A
-1.6
mV/°C
IF=3mA
77
pF
F = 1MHz,
VF = 0
5
VCC=3.3V or 5V
IF=3mA
2,3
VCC=3.3V or 5V
IF=3mA
2,3
VCC=3.3V or 5V
IF=3mA
IF=0mA
4,5
1
Notes:
1. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
8
Switching Specifications (ACPL-M50L)
Over recommended operating (TA = -40°C to 105°C), IF = 3mA, (2.7V ≤ VCC ≤ 24V), unless otherwise specified.
Parameter
Symbol
Min
Propagation Delay Time to TPHL
Logic Low at Output
Propagation Delay Time to TPLH
Logic High at Output
Pulse Width Distortion[1]
Propagation Delay
Difference Between
Any two Parts[2]
PWD
tpsk
Typ
Max
Units
Test Conditions
Fig.
0.2
0.5
s
TA=25°C
14
0.2
1
s
Pulse: f=10kHz, Duty cycle=50%,
IF= 3mA, VCC=3.3 V, RL=1.2k,
CL=15pF, V THHL=1.5V
0.22
0.5
s
14
0.22
1
s
Pulse: f=10kHz, Duty cycle=50%,
IF= 3mA, VCC=5.0 V, RL=1.9k,
CL=15pF, V THHL=1.5V
0.33
0.7
s
14
0.33
1.3
s
Pulse: f=10kHz, Duty cycle=50%,
IF= 3mA, VCC=24V, RL=10k,
CL=15pF, V THHL=1.5V
0.38
0.8
s
14
0.38
1.2
s
Pulse: f=10kHz, Duty cycle=50%,
IF= 3mA, VCC=3.3 V, RL=1.2k,
CL=15pF, V THHL=2.0V
0.31
0.7
s
14
0.31
1
s
Pulse: f=10kHz, Duty cycle=50%,
IF= 3mA, VCC=5.0 V, RL=1.9k,
CL=15pF, V THHL=2.0V
0.3
0.7
s
14
0.3
1
s
Pulse: f=10kHz, Duty cycle=50%,
IF= 3mA, VCC=24V, RL=10k,
CL=15pF, V THHL=2.0V
0.18
0.8
s
14
0.18
1.2
s
Pulse: f=10kHz, Duty cycle=50%,
IF= 3mA, VCC=3.3 V, RL=1.2k,
CL=15pF, V THHL=1.5V, V THLH=2.0V
0.1
0.7
s
14
0.1
1
s
Pulse: f=10kHz, Duty cycle=50%,
IF= 3mA, VCC=5.0V, RL=1.9k,
CL=15pF, V THHL=1.5V, V THLH=2.0V
0.1
0.7
s
1
s
Pulse: f=10kHz, Duty cycle=50%,
IF= 3mA, VCC=24V, RL=10k,
CL=15pF, V THHL=1.5V, V THLH=2.0V
14
0.1
0.18
0.7
s
TA=25°C
Pulse: f=10kHz, Duty cycle=50%,
IF= 3mA, VCC=3.3 V , RL=1.2k,
CL=15pF, V THHL=1.5V, V THLH=2.0V
0.1
0.6
s
TA=25°C
Pulse: f=10kHz, Duty cycle=50%,
IF= 3mA, VCC=5.0V, RL=1.9k,
CL=15pF, V THHL=1.5V, V THLH=2.0V
0.1
0.6
s
TA=25°C
Pulse: f=10kHz, Duty cycle=50%,
IF= 3mA, VCC=24V, RL=10k,
CL=15pF, V THHL=2.0V
TA=25°C
TA=25°C
TA=25°C
TA=25°C
TA=25°C
TA=25°C
TA=25°C
TA=25°C
6a, 14 7a, 14 8a, 14 6a, 14 7a, 14 8a, 14 14
14
14
Common Mode Transient
Immunity at Logic High
Output[3]
|CMH|
15
25
kV/s VCM=1500V, IF=0mA, TA=25°C,
RL=1.2k or 1.9k, VCC=3.3 V or 5V
15
Common Mode Transient
Immunity at Logic Low
Output[4]
|CML|
15
20
kV/s VCM=1500V, IF=3mA, TA=25°C,
RL=1.2k, VCC=5V
15
10
15
kV/s VCM=1500V, IF=3mA, TA=25°C,
RL=1.2k, VCC=3.3 V
15
9
Switching Specifications (ACPL-054L/W50L/K54L)
Over recommended operating (TA = -40°C to 105°C), IF = 3mA, (2.7V ≤ VCC ≤ 24V), unless otherwise specified.
Parameter
Symbol
Min
Propagation Delay Time to TPHL
Logic Low at Output
Propagation Delay Time to TPLH
Logic High at Output
Pulse Width
Distortion[1]
Propagation Delay
Difference Between
Any two Parts[2]
PWD
tpsk
Typ
Max
Units
Test Conditions
Fig.
0.2
0.5
s
TA=25°C
14
0.2
1
s
Pulse: f=10kHz, Duty cycle=50%,
IF=3mA, VCC=3.3 V, RL= 1.8k,
CL=15pF, V THHL=1.5V
0.22
0.5
s
14
0.22
1
s
Pulse: f=10kHz, Duty cycle=50%,
IF=3mA, VCC=5.0 V, RL= 2.9k,
CL=15pF, V THHL=1.5V
0.33
0.7
s
14
0.33
1.3
s
Pulse: f=10kHz, Duty cycle=50%,
IF=3mA, VCC=24V, RL=14.8k,
CL=15pF, V THHL=1.5V
0.38
0.8
s
14
0.38
1.4
s
Pulse: f=10kHz, Duty cycle=50%,
IF=3mA, VCC=3.3 V, RL=1.8k,
CL=15pF, V THHL=2.0V
0.31
0.7
s
14
0.31
1
s
Pulse: f=10kHz, Duty cycle=50%,
IF=3mA, VCC=5.0 V, RL=2.9k,
CL=15pF, V THHL=2.0V
0.3
0.7
s
14
0.3
1
s
Pulse: f=10kHz, Duty cycle=50%,
IF=3mA, VCC=24V, RL=14.8k,
CL=15pF, V THHL=2.0V
0.18
0.8
s
14
0.18
1.4
s
Pulse: f=10kHz, Duty cycle=50%,
IF=3mA, VCC=3.3 V, RL=1.8k,
CL=15pF, V THHL=1.5V, V THLH=2.0V
0.1
0.7
s
14
0.1
1
s
Pulse: f=10kHz, Duty cycle=50%,
IF=3mA, VCC=5.0V, RL = 2.9k,
CL=15pF, V THHL=1.5V, V THLH=2.0V
0.1
0.7
s
1
s
Pulse: f=10kHz, Duty cycle=50%,
IF=3mA, VCC=24V, RL=14.8k,
CL=15pF, V THHL=1.5V, V THLH=2.0V
14
0.1
0.18
0.7
s
TA=25°C
Pulse: f=10kHz, Duty cycle=50%,
IF=3mA, VCC=3.3 V, RL=1.8k,
CL=15pF, V THHL=1.5V, V THLH=2.0V
0.1
0.6
s
TA=25°C
Pulse: f=10kHz, Duty cycle=50%,
IF=3mA, VCC=5.0V, RL=2.9k,
CL=15pF, V THHL=1.5V, V THLH=2.0V
0.1
0.6
s
TA=25°C
Pulse: f=10kHz, Duty cycle=50%,
IF=3mA, VCC=24V, RL=14.8k,
CL=15pF, V THHL=1.5V, V THLH=2.0V
TA=25°C
TA=25°C
TA=25°C
TA=25°C
TA=25°C
TA=25°C
TA=25°C
TA=25°C
6b, 14 7b, 14 8b, 14 6b, 14 7b, 14 8b, 14 14
14
14
Common Mode Transient
Immunity at Logic High
Output[3]
|CMH|
15
25
kV/s VCM=1500V, IF=0mA, TA=25°C,
RL=1.8k or 2.9k, VCC=3.3 V or 5V
15
Common Mode Transient
Immunity at Logic Low
Output[4]
|CML|
15
20
kV/s VCM=1500V, IF=4mA, TA=25°C,
RL=2.9k, VCC=5V
15
15
20
kV/s VCM=1500V, IF=3mA, TA=25°C,
RL=1.8k, VCC=3.3 V
15
Notes:
1. Pulse Width Distortion (PWD) is defined as |tPHL - tPLH| for any given device.
2. The difference between tPLH and tPHL between any two parts under the same test condition. (See IPM Dead Time and Propagation Delay
Specifications section.)
3. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM,
to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V).
4. Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM/dt on the falling edge of the common mode
pulse signal, VCM to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V).
10
Package Characteristics
All Typical at TA = 25°C.
Parameter
Symbol
Part Number
Min.
Input-Output Momentary
Withstand Voltage [1,2]
VISO
ACPL-M50L/054L
3750
ACPL-W50L/K54L
5000
Input-Output Resistance [1]
RI-O
Input-Output Capacitance [1]
Typ.
Max.
Units
Test Conditions
Vrms
RH ≤ 50%, t = 1 min.,
TA = 25°C
1014

VI-O = 500 Vdc
CI-O
0.6
pF
f = 1 MHz, TA = 25°C
Input-Input Insulation
Leakage Current[3]
II-I
0.005
A
RH ≤ 45%, t = 5 s
VI-I = 500Vdc
Input-Input Resistance [3]
RI-I
1011

Input-Input Capacitance [3]
CI-I
0.25
pF
f = 1 MHz
Notes:
1. Device considered a two terminal device: pins 1 and 3 shorted together and pins 4, 5 and 6 shorted together for ACPL-M50L, pins 1, 2, 3 and 4
shorted together and pins 5, 6, 7 and 8 shorted together for ACPL-054L/K54L, pins 1, 2 and 3 shorted together and pins 4, 5 and 6 shorted together
for ACPL-W50L.
2. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 VRMS for 1 second for ACPL-M50L/054L
and ≥ 6000 VRMS for 1 second for ACPL-W50L/K54L (leakage detection current limit, II-O ≤ 5 A).
3. Measured between pins 1 and 2 shorted together and pins 3 and 4 shorted together for ACPL-054L/K54L.
11
NORMALIZED CURRENT TRANSFER RATIO
IF - FORWARD CURRENT - mA
100
TA = 25°C
10
1
0.1
IF
0.01
VF
0.001
0.0001
1.1
1.2
1.3
1.4
1.5
VF - FORWARD VOLTAGE - V
1.6
1.7
1.1
1
0.9
0.8
NORMALIZED
IF = 3 mA
VO = 0.4 V
VCC = 5 V
0.7
0.6
-50
-25
0
25
50
75
100
125
0.8
0.7
0.6
-50
NORMALIZED
IF = 3 mA
VO = 0.4 V
VCC = 3.3 V
-25
0
25
50
75
TA - TEMPERATURE - °C
100
125
IF = 0 mA
VO = VCC = 5 V
10
1
0.1
0.01
-60
-40
-20
0
20
40
IF = 0 mA
VO = VCC = 3.3 V
10
1
0.1
0.01
-60
-40
-20
0
20
40
60
80
Figure 4. Typical Logic High Output Current vs. Temperature
1000
100
100
TA - TEMPERATURE - °C
Figure 3. Typical Current Transfer Ratio vs. Temperature
IOH - LOGIC HIGH OUTPUT CURRENT - nA
0.9
1000
TA - TEMPERATURE - °C
60
80
TA - TEMPERATURE - °C
Figure 5. Typical Logic High Output Current vs. Temperature
12
1
Figure 2. Typical Current Transfer Ratio vs. Temperature
IOH - LOGIC HIGH OUTPUT CURRENT - nA
NORMALIZED CURRENT TRANSFER RATIO
Figure 1. Input Current vs. Forward Voltage
1.1
100
120
100
120
700
600
800
IF = 3 mA, VCC = 3.3 V
RL = 1.9 kΩ
RL = 1.2 kΩ
500
700
tp - PROPAGATION DELAY - ns
tp - PROPAGATION DELAY - ns
800
tPLH
400
tPHL
300
200
100
0
-60
-40
-20
0
20
40
60
TA - TEMPERATURE - °C
80
100
tp - PROPAGATION DELAY - ns
tp - PROPAGATION DELAY - ns
tPHL
200
100
-40
-20
0
20
40
60
TA - TEMPERATURE - °C
80
100
-20
0
20 40
60
TA - TEMPERATURE - °C
80
100
120
80
100
120
80
100
120
IF = 3 mA, VCC = 5 V
RL = 2.9 kΩ
600
500
tPLH
tPHL
400
300
200
0
-60
120
-40
-20
0
20 40
60
TA - TEMPERATURE - °C
Figure 7b. Typical Propagation Delay vs. Temperature
(ACPL-054L/W50L/K54L)
600
IF = 3 mA, VCC = 24 V
RL = 20 kΩ
RL = 10 kΩ
400
tp - PROPAGATION DELAY - ns
600
tp - PROPAGATION DELAY - ns
-40
100
Figure 7a. Typical Propagation Delay vs. Temperature (ACPL-M50L)
tPHL
tPLH
300
200
100
-40
-20
0
20
40
60
TA - TEMPERATURE - °C
80
100
Figure 8a. Typical Propagation Delay vs. Temperature (ACPL-M50L)
13
200
700
tPLH
300
0
-60
tPHL
300
800
400
500
tPLH
400
Figure 6b. Typical Propagation Delay vs. Temperature
(ACPL-054L/W50L/K54L)
IF = 3 mA, VCC = 5 V
RL = 4.1 kΩ
RL = 1.9 kΩ
500
0
-60
500
0
-60
120
800
600
600
100
Figure 6a. Typical Propagation Delay vs. Temperature (ACPL-M50L)
700
IF = 3 mA, VCC = 3.3 V
RL = 1.8 kΩ
120
500
IF = 3 mA, VCC = 24 V
RL = 14.8 kΩ
400
tPHL
tPLH
300
200
100
0
-60
-40
-20
0
20 40
60
TA - TEMPERATURE - °C
Figure 8b. Typical Propagation Delay vs. Temperature
(ACPL-054L/W50L/K54L)
1600
tp - PROPAGATION DELAY - ns
1400
1200
tp - PROPAGATION DELAY - ns
IF = 3 mA, VCC = 3.3 V
IF = 10 mA
IF = 3 mA
1000
800
tPLH
600
tPHL
400
1000
900
800
200
0
1
10
IF = 3 mA, VCC = 5 V
IF = 10 mA
IF = 3 mA
700
600
500
400
300
200
100
0
tPLH
tPHL
1
10
RL - LOAD RESISTANCE - kΩ
Figure 9. Typical Propagation Delay vs. Load Resistance
Figure 10. Typical Propagation Delay vs. Load Resistance
2600
2400
2200
2000
1800
1600
1400
1200
1000
800
600
400
200
0
IF = 3 mA, VCC = 24 V
RL = 10 kΩ, TA = 25°C
tp - PROPAGATION DELAY - ns
tp - PROPAGATION DELAY - ns
RL - LOAD RESISTANCE - kΩ
tPLH
tPHL
0
100
200
300
400
CL - LOAD CAPACITANCE - pF
500
Figure 11a. Typical Propagation delay vs. Load Capacitance (ACPL-M50L)
IF = 3 mA
RL = 10 kΩ
TA = 25°C
2000
tp - PROPAGATION DELAY - ns
tp - PROPAGATION DELAY - ns
tPHL
tPLH
0
100
200
300
400
CL - LOAD CAPACITANCE - pF
500
2500
1500
1000
tPLH
500
8
10
tPHL
14
12
16
18
VCC - SUPPLY VOLTAGE - V
20
22
Figure 12a. Typical Propagation Delay vs. Supply Voltage (ACPL-M50L)
14
IF = 3 mA, VCC = 24 V
RL = 14.8 kΩ, TA = 25°C
Figure 11b. Typical Propagation delay vs. Load Capacitance
(ACPL-054L/W50L/K54L)
2500
0
2600
2400
2200
2000
1800
1600
1400
1200
1000
800
600
400
200
0
24
IF = 3 mA
RL = 14.8 kΩ
TA = 25°C
2000
1500
1000
tPLH
500
0
8
10
tPHL
12
14
16
18
VCC - SUPPLY VOLTAGE - V
Figure 12b. Typical Propagation Delay vs. Supply Voltage
(ACPL-054L/W50L/K54L)
20
22
24
600
VCC = 24 V
RL = 10 kΩ
TA = 25°C
500
tp - PROPAGATION DELAY - ns
tp - PROPAGATION DELAY - ns
600
400
300
tPLH
200
tPHL
100
0
0
5
10
15
IF - FORWARD LED CURRENT - mA
Figure 13a. Typical Propagation Delay vs. Supply Current (ACPL-M50L)
IF
PULSE
GEN.
Z O = 50 Ω
t r = 5 ns
0
V CC
VO
V THHL
tPLH
300
200
tPHL
100
0
5
10
15
IF - FORWARD LED CURRENT - mA
Figure 13b. Typical Propagation Delay vs. Supply Current
(ACPL-054L/W50L/K54L)
IF
1
V CC
6
RL
VO
5
0.1μF
V THLH
V OL
t PHL
400
0
20
VCC = 24 V
RL = 14.8 kΩ
TA = 25°C
500
3
IF MONITOR
4
CL
RM
t PLH
Figure 14. Switching Test Circuits
V CM
0V
10 V
90%
10%
tr
VO
IF
90%
10%
tf
RL
3
4
V FF
V OL
CL
V CM
+
–
PULSE GEN.
Figure 15. Test Circuit for Transient Immunity and typical waveforms
15
VO
5
0.1μF
V CC
SWITCH AT B: IF = 3 mA
V CC
6
B
SWITCH AT A: I F = 0 mA
VO
1
A
20
40
200
IO - OUTPUT CURRENT - mA
CTR - CURRENT TRANSFER RATIO - %
250
VO = 0.4 V
VCC = 5 V
150
100
50
0
0
5
10
15
IF - FORWARD CURRENT - mA
Figure 16. Current Transfer Ratio versus Input Current
20
25
TA = 25 oC
VCC = 5 V
30
20
10
-
0
4
8
12
16
VO - OUTPUT VOLTAGE - V
Figure 17. DC Pulse Transfer Characteristic
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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2011 Avago Technologies. All rights reserved.
AV02-2223EN - October 25, 2011
IF = 20 mA
IF = 15 mA
IF = 10 mA
IF = 5 mA
20
24