Data Sheet Dual 1A, 1.5MHz PWM Step-down DC-DC Converter with OVP General Description Features The AUR9717 is a high efficiency step-down DC-DC voltage converter. The chip operation is optimized using constant frequency, peak-current mode architecture with built-in synchronous power MOSFET switchers and internal compensators to reduce external part counts. It is automatically switching between the normal PWM mode and LDO mode to offer improved system power efficiency covering a wide range of loading conditions. • • • • • • • • • • • • • The oscillator and timing capacitors are all built-in providing an internal switching frequency of 1.5MHz that allows the use of small surface mount inductors and capacitors for portable product implementations. Additional features including Soft Start (SS), Under Voltage Lock Out (UVLO), Input Over Voltage Protection (IOVP) and Thermal Shutdown Detection (TSD) are integrated to provide reliable product applications. AUR9717 Dual Channel High Efficiency Buck Power Converter Low Quiescent Current Output Current: 1A Adjustable Output Voltage from 1V to 3.3V Wide Operating Voltage Range: 2.5V to 5.5V Built-in Power Switchers for Synchronous Rectification with High Efficiency Feedback Voltage: 600mV 1.5MHz Constant Frequency Operation Automatic PWM/LDO Mode Switching Control Thermal Shutdown Protection Low Drop-out Operation at 100% Duty Cycle No Schottky Diode Required Internal Input Over Voltage Protection Applications • • • • The device is available in adjustable output voltage versions ranging from 1V to 3.3V, and is able to deliver up to 1A. Mobile Phone, Digital Camera and MP3 Player Headset, Radio and Other Hand-held Instruments Post DC-DC Voltage Regulation PDA and Notebook Computer The AUR9717 is available in WDFN-3×3-10 package. WDFN-3×3-10 Figure 1. Package Type of AUR9717 Oct. 2011 Rev. 1.0 BCD Semiconductor Manufacturing Limited 1 Data Sheet Dual 1A, 1.5MHz PWM Step-down DC-DC Converter with OVP AUR9717 Pin Configuration D Package (WDFN-3×3-10) Pin 1 Mark EN1 1 10 LX1 FB1 2 9 GND VIN2 3 8 VIN1 GND 4 7 FB2 LX2 5 6 EN2 Figure 2. Pin Configuration of AUR9717 (Top View) Pin Description Pin Number Pin Name 1 EN1 Enable signal input of channel 1, active high 2 FB1 Feedback voltage of channel 1 3 VIN2 Power supply input of channel 2 4, 9 GND 5 LX2 Connection from power MOSFET of channel 2 to inductor 6 EN2 Enable signal input of channel 2, active high 7 FB2 Feedback voltage of channel 2 8 VIN1 Power supply input of channel 1 10 LX1 Connection from power MOSFET of channel 1 to inductor Oct. 2011 Function This pin is the GND reference for the NMOSFET power stage. It must be connected to the system ground Rev. 1.0 BCD Semiconductor Manufacturing Limited 2 Data Sheet Dual 1A, 1.5MHz PWM Step-down DC-DC Converter with OVP AUR9717 Functional Block Diagram Figure 3. Functional Block Diagram of AUR9717 Ordering Information AUR9717 A Package D: WDFN-3×3-10 G: Green Circuit Type A: Adjustable Output Package Temperature Range WDFN-3×3-10 -40 to 80°C Part Number AUR9717AGD Marking ID 9717A Packing Type Tape & Reel BCD Semiconductor's Pb-free products, as designated with "G" in the part number, are RoHS compliant and green. Oct. 2011 Rev. 1.0 BCD Semiconductor Manufacturing Limited 3 Data Sheet Dual 1A, 1.5MHz PWM Step-down DC-DC Converter with OVP AUR9717 Absolute Maximum Ratings (Note 1) Parameter Symbol Value Unit Supply Input Voltage VIN1, VIN2 0 to 6.5 V Enable Input Voltage VEN1, VEN2 Switch Output Voltage VLX1, VLX2 -0.3 to VIN1(VIN2)+0.3 -0.3 to VIN1(VIN2)+0.3 V V VIN1-VIN2 Voltage (Note 2) VDF -0.3 to 0.3 V Power Dissipation (On PCB, TA=25°C) PD 2.22 W Thermal Resistance (Junction to Ambient, Simulation) θJA 45.13 °C/W Thermal Resistance (Junction to Case, Simulation) θJC 6.97 °C/W Operating Junction Temperature TJ 160 °C Operating Temperature TOP -40 to 85 °C Storage Temperature TSTG -55 to 150 °C ESD (Human Body Model) VHBM 2000 V ESD (Machine Model) VMM 200 V Note 1: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating Conditions” is not implied. Exposure to “Absolute Maximum Ratings” for extended periods may affect device reliability. Note 2: The absolute voltage difference between VIN1 and VIN2 can not exceed 0.3V. Recommended Operating Conditions Parameter Symbol Min Max Unit Supply Input Voltage VIN1, VIN2 2.5 5.5 V Junction Temperature Range TJ -20 125 °C Ambient Temperature Range TA -40 80 °C Oct. 2011 Rev. 1.0 BCD Semiconductor Manufacturing Limited 4 Data Sheet Dual 1A, 1.5MHz PWM Step-down DC-DC Converter with OVP AUR9717 Electrical Characteristics VIN=VEN1=VEN2=5V, VFB1=VFB2=0.6V, L1=L2=2.2μH, CIN1=CIN2=4.7μF, COUT1=COUT2=10μF, TA=25°C, unless otherwise specified. Parameter Symbol Conditions Min Typ Max Unit Input Voltage Range VIN VIN=VIN1=VIN2 Shutdown Current Regulated Feedback Voltage Regulated Output Voltage Accuracy Peak Inductor Current IOFF VEN1=VEN2=0V VFB For Adjustable Output Voltage Oscillator Frequency ΔVOUT1/VOUT1, ΔVOUT2/VOUT2 IPK VIN=2.5V to 5.5V, IOUT1=IOUT2=0 to 1A 2.5 0.585 V 0.1 1 μA 0.6 0.615 V 3 % -3 VFB1=VFB2=0.5V fOSC 5.5 1.5 1.2 1.5 A 1.8 MHz PMOSFET RON RON(P) IOUT1=IOUT2=200mA 0.28 Ω NMOSFET RON RON(N) IOUT1=IOUT2=200mA 0.25 Ω ILX VEN1=VEN2=0V, VLX1=VLX2=0V or 5V 0.01 LX Leakage Current Feedback Current Input Over Voltage Protection EN Leakage Current EN High-level Input Voltage EN Low-level Input Voltage Under Voltage Lock Out IFB1, IFB2 VIOVP 6 IEN1, IEN2 0.01 VEN_H1, VEN_H2 VIN=2.5V to 5.5V VEN_L1, VEN_L2 VIN=2.5V to 5.5V VUVLO Hysteresis Thermal Shutdown Oct. 2011 0.1 μA 30 nA V 0.1 1.5 μA V 0.6 V Rising 1.8 V Hysteresis 0.1 V 160 °C TSD Rev. 1.0 BCD Semiconductor Manufacturing Limited 5 Data Sheet Dual 1A, 1.5MHz PWM Step-down DC-DC Converter with OVP AUR9717 Typical Performance Characteristics Figure 4. Efficiency vs. Output Current Figure 5. Efficiency vs. Load Current Figure 6. Efficiency vs. Load Current Oct. 2011 Figure 7. UVLO Threshold vs. Temperature Rev. 1.0 BCD Semiconductor Manufacturing Limited 6 Data Sheet Dual 1A, 1.5MHz PWM Step-down DC-DC Converter with OVP AUR9717 Typical Performance Characteristics (Continued) Figure 9. Output Current Limit vs. Input Voltage Figure 8. Output Voltage vs. Output Current Figure 10. Output Voltage vs. Temperature Oct. 2011 Figure 11. Frequency vs. Input Voltage Rev. 1.0 BCD Semiconductor Manufacturing Limited 7 Data Sheet Dual 1A, 1.5MHz PWM Step-down DC-DC Converter with OVP AUR9717 Typical Performance Characteristics (Continued) Figure 12. Output Current Limit vs. Temperature Figure 13. Frequency vs. Temperature VOUT 200mV/div VLX 2V/div VEN 2V/div Time Figure 14. Temperature vs. Load Current Oct. 2011 400ns/div Figure 15. Waveform of VIN=4.5V, VOUT=1.5V, L=2.2μH Rev. 1.0 BCD Semiconductor Manufacturing Limited 8 Data Sheet Dual 1A, 1.5MHz PWM Step-down DC-DC Converter with OVP AUR9717 Typical Performance Characteristics (Continued) VEN 2V/div VOUT 1V/div VLX 2V/div Time 200μs/div Figure 16. Soft Start Oct. 2011 Rev. 1.0 BCD Semiconductor Manufacturing Limited 9 Data Sheet Dual 1A, 1.5MHz PWM Step-down DC-DC Converter with OVP Application Information deviations do not much relieve. The selection of COUT is determined by the Effective Series Resistance (ESR) that is required to minimize output voltage ripple and load step transients, as well as the amount of bulk capacitor that is necessary to ensure that the control loop is stable. Loop stability can be also checked by viewing the load step transient response as described in the following section. The output ripple, △VOUT, is determined by: The basic AUR9717 application circuit is shown in Figure 18. 1. Inductor Selection For most applications, the value of inductor is chosen based on the required ripple current with the range of 2.2μH to 4.7μH. ΔI L = ΔVOUT ≤ ΔI L [ ESR + V 1 VOUT (1 − OUT ) f ×L VIN 3. Load Transient A switching regulator typically takes several cycles to respond to the load current step. When a load step occurs, VOUT immediately shifts by an amount equal to △ILOAD×ESR, where ESR is the effective series resistance of output capacitor. △ILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During the recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. VOUT VOUT ][1 − ] f × ΔI L ( MAX ) VIN ( MAX ) 4. Output Voltage Setting The DC current rating of the inductor should be at least equal to the maximum output current plus half the highest ripple current to prevent inductor core saturation. For better efficiency, a lower DC-resistance inductor should be selected. The output voltage of AUR9717 can be adjusted by a resistive divider according to the following formula: VOUT = VFB × (1 + 2. Capacitor Selection The input capacitance, CIN, is needed to filter the trapezoidal current at the source of the top MOSFET. To prevent large ripple voltage, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: VOUT R1 FB [V (V − VOUT )] 2 × OUT IN VIN AUR 9717 R2 GND It indicates a maximum value at VIN=2VOUT, where IRMS=IOUT/2. This simple worse-case condition is commonly used for design because even significant Oct. 2011 R1 R ) = 0.6V × (1 + 1 ) R2 R2 The resistive divider senses the fraction of the output voltage as shown in Figure 17. 1 I RMS = I OMAX 1 ] 8 × f × COUT The output ripple is the highest at the maximum input voltage since △IL increases with input voltage. The largest ripple current occurs at the highest input voltage. Having a small ripple current reduces the ESR loss in the output capacitor and improves the efficiency. The highest efficiency is realized at low operating frequency with small ripple current. However, larger value inductors will be required. A reasonable starting point for ripple current setting is △IL=40%IMAX . For a maximum ripple current stays below a specified value, the inductor should be chosen according to the following equation: L =[ AUR9717 Figure 17. Setting the Output Voltage Rev. 1.0 BCD Semiconductor Manufacturing Limited 10 Data Sheet Dual 1A, 1.5MHz PWM Step-down DC-DC Converter with OVP AUR9717 Application Information (Continued) NMOSFET RDS(ON)N resistance and the duty cycle (D): 5. Efficiency Considerations The efficiency of switching regulator is equal to the output power divided by the input power times 100%. It is usually useful to analyze the individual losses to determine what is limiting efficiency and which change could produce the largest improvement. Efficiency can be expressed as: RSW = RDS (ON )P × D + RDS (ON ) N × (1 − D ) Therefore, to obtain the I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Efficiency=100%-L1-L2-….. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% of total additional loss. Where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the regulator produce losses, two major sources usually account for most of the power losses: VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very light load currents and the I2R loss dominates the efficiency loss at medium to heavy load currents. 6. Thermal Characteristics In most applications, the part does not dissipate much heat due to its high efficiency. However, in some conditions when the part is operating in high ambient temperature with high RDS(ON) resistance and high duty cycles, such as in LDO mode, the heat dissipated may exceed the maximum junction temperature. To avoid the part from exceeding maximum junction temperature, the user should do some thermal analysis. The maximum power dissipation depends on the layout of PCB, the thermal resistance of IC package, the rate of surrounding airflow and the temperature difference between junction and ambient. 5.1 The VIN quiescent current loss comprises two parts: the DC bias current as given in the electrical characteristics and the internal MOSFET switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each cycle the gate is switched from high to low, then to high again, and the packet of charge, dQ moves from VIN to ground. The resulting dQ/dt is the current out of VIN that is typically larger than the internal DC bias current. In continuous mode, 7. PC Board layout considerations When laying out the printed circuit board, the following checklist should be used to optimize the performance of AUR9717. I GATE = f × (Q P + Q N ) 1. The power traces, including the GND trace, the LX trace and the VIN trace should be kept direct, short and wide. Where QP and QN are the gate charge of power PMOSFET and NMOSFET switches. Both the DC bias current and gate charge losses are proportional to the VIN and this effect will be more serious at higher input voltages. 2. Put the input capacitor as close as possible to the VIN and GND pins. 3. The FB pin should be connected directly to the feedback resistor divider. 5.2 I2R losses are calculated from internal switch resistance, RSW and external inductor resistance RL. In continuous mode, the average output current flowing through the inductor is chopped between power PMOSFET switch and NMOSFET switch. Then, the series resistance looking into the LX pin is a function of both PMOSFET RDS(ON)P and Oct. 2011 4. Keep the switching node LX away from the sensitive FB pin and the node should be kept small area. Rev. 1.0 BCD Semiconductor Manufacturing Limited 11 Data Sheet Dual 1A, 1.5MHz PWM Step-down DC-DC Converter with OVP AUR9717 Typical Application COUT 1 10µF VOUT1 L1 2.2µH R1 1 R2 2 3 Connected to VIN 4 5 CIN2 4.7µF EN1 FB 1 VIN2 GND LX1 AUR9717 C1 IR2 GND VIN1 FB2 LX2 EN2 10 C IN1 4.7µF 9 8 VIN = 2.5V to 5.5V 7 R4 6 R3 C2 IR4 VOUT2 L 2 2.2µH Note 3: VOUT 1 = VFB1 × (1 + COUT2 10µF R R1 ) ; VOUT 2 = VFB2 × (1 + 3 ) R2 R4 When R2 or R4=300kΩ to 60kΩ, the IR2 or IR4=2μA to 10μA, and R1×C1 or R3×C2 should be in the range between 3×10-6 and 6×10-6 for component selection. . Figure 18. Typical Application Circuit of AUR9717 (Note 3) Table 1. Component Guide VOUT1 or VOUT2 (V) 3.3 Oct. 2011 R1 or R3 (kΩ) 453 R2 or R4 (kΩ) 100 C1 or C2 (pF) 13 L1 or L2 (μH) 2.2 2.5 320 100 18 2.2 1.8 200 100 30 2.2 1.2 100 100 56 2.2 1.0 68 100 82 2.2 Rev. 1.0 BCD Semiconductor Manufacturing Limited 12 Data Sheet Dual 1A, 1.5MHz PWM Step-down DC-DC Converter with OVP AUR9717 Mechanical Dimensions WDFN-3×3-10 Oct. 2011 Rev. 1.0 Unit: mm(inch) BCD Semiconductor Manufacturing Limited 13 BCD Semiconductor Manufacturing Limited http://www.bcdsemi.com IMPORTANT NOTICE IMPORTANT NOTICE BCD Semiconductor BCD Semiconductor Manufacturing Manufacturing Limited Limited reserves reserves the the right right to to make make changes changes without without further further notice notice to to any any products products or or specifispecifications herein. cations herein. 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