BCDSEMI AUR9707

Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
General Description
Features
The AUR9707 is a high efficiency step-down
DC-DC voltage converter. The chip operation is
optimized using constant frequency, peak-current
mode architecture with built-in synchronous power
MOSFET switchers and internal compensators to
reduce external part counts. It is automatically
switching between the normal PWM mode and LDO
mode to offer improved system power efficiency
covering a wide range of loading conditions.
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The oscillator and timing capacitors are all built-in
providing an internal switching frequency of 1.5MHz
that allows the use of small surface mount inductors
and capacitors for portable product implementations.
Additional features included Soft Start (SS), Under
Voltage Lock Out (UVLO), Input Over Voltage
Protection (IOVP) and Thermal Shutdown Detection
(TSD) are integrated to provide reliable product
applications.
AUR9707
Dual Channel High Efficiency Buck Power
Converter
Low Quiescent Current
Output Current: 1A
Adjustable Output Voltage from 1V to 3.3V
Wide Operating Voltage Range: 2.5V to 5.5V
Built-in Power Switches for Synchronous
Rectification with High Efficiency
Feedback Voltage: 600mV
1.5MHz Constant Frequency Operation
Automatic PWM/LDO Mode Switching Control
Thermal Shutdown Protection
Low Drop-out Operation at 100% Duty Cycle
No Schottky Diode Required
Internal Input Over Voltage Protection
Applications
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The device is available in adjustable output voltage
versions ranging from 1V to 3.3V, and is able to
deliver up to 1A.
Mobile Phone, Digital Camera and MP3 Player
Headset, Radio and Other Hand-held Instrument
Post DC-DC Voltage Regulation
PDA and Notebook Computer
The AUR9707 is available in WDFN-3×3-12
package.
WDFN-3×3-12
Figure 1. Package Type of AUR9707
Feb. 2012
Rev. 1. 1
BCD Semiconductor Manufacturing Limited
1
Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
AUR9707
Pin Configuration
D Package
(WDFN-3×3-12)
Pin 1 Dot
by Marking
1
12
2
11
3
4
Exposed
Pad
10
9
5
8
6
7
Figure 2. Pin Configuration of AUR9707 (Top View)
Pin Description
Pin Number
Pin Name
1
VIN2
Power supply input of channel 2
2
LX2
3, 9
GND
4
FB1
Connection from power MOSFET of channel 2 to inductor
This pin is the GND reference for the NMOSFET power stage. It
must be connected to the system ground
Feedback voltage of channel 1
5, 11
NC1,NC2
6
EN1
Enable signal input of channel 1, active high
7
VIN1
Power supply input of channel 1
8
LX1
Connection from power MOSFET of channel 1 to inductor
10
FB2
Feedback voltage of channel 2
12
EN2
Enable signal input of channel 2, active high
Feb. 2012
Function
No internal connection (floating or connecting to GND)
Rev. 1. 1
BCD Semiconductor Manufacturing Limited
2
Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
AUR9707
Functional Block Diagram
VIN1 , VIN2
EN1 , EN2
6 ,12
7,1
Saw-tooth
Generator
Bias
Generator
4 , 10
Over Current
Comparator
Oscillator
Current
Sensing
+
Soft
Start
+
-
FB1 , FB2
-
+
Error
Amplifier
Control
Logic
Bandgap
Reference
8,2
LX1 , LX2
Modulator
+
Reverse Inductor
Current Comparator
+
Buffer &
Dead Time
Control
Logic
Over Voltage
Comparator
Thermal
Shutdown
3,9
GND
Figure 3. Functional Block Diagram of AUR9707
Ordering Information
AUR9707
A
Package
D: WDFN-3×3-12
G: Green
Circuit Type
A: Adjustable Output
5
Package
Temperature
Range
WDFN-3×3-12
-40 to 80°C
Part Number
AUR9707AGD
Marking ID
9707A
Packing Type
Tape & Reel
BCD Semiconductor's Pb-free products, as designated with "G" in the part number, are RoHS compliant and
green.
Feb. 2012
Rev. 1. 1
BCD Semiconductor Manufacturing Limited
3
Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
AUR9707
Absolute Maximum Ratings (Note 1)
Parameter
Symbol
Value
Unit
Supply Input Voltage
VIN
0 to 6.5
V
Enable Input Voltage
VEN
-0.3 to VIN+0.3
V
Output Voltage
VOUT
-0.3 to VIN+0.3
V
VIN1-VIN2 Voltage (Note 2)
VDF
-0.3 to 0.3
V
Power Dissipation (On PCB, TA=30°C)
PD
2.31
W
Thermal Resistance (Junction to Ambient, Simulation)
θJA
41
°C/W
Thermal Resistance (Junction to Case, Simulation)
θJC
4.2
°C/W
Operating Junction Temperature
TJ
160
°C
Operating Temperature
TO
-40 to 85
°C
Storage Temperature
TS
-55 to 150
°C
ESD (Human Body Model)
VHBM
2000
V
ESD (Machine Model)
VMM
200
V
Note 1: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. These are stress ratings only, and functional operation of the device at these or any other conditions
beyond those indicated under “Recommended Operating Conditions” is not implied. Exposure to “Absolute
Maximum Ratings” for extended periods may affect device reliability.
Note 2:│VIN1-VIN2│voltage difference can not exceed 0.3V, otherwise, the chip will be damaged.
Recommended Operating Conditions
Parameter
Symbol
Min
Max
Unit
Supply Input Voltage
VIN
2.5
5.5
V
Junction Temperature Range
TJ
-20
125
°C
Ambient Temperature Range
TA
-40
80
°C
Feb. 2012
Rev. 1. 1
BCD Semiconductor Manufacturing Limited
4
Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
AUR9707
Electrical Characteristics
VIN=3.6V, VOUT=2.5V, VREF=0.6V, L=2.2µH, CIN=4.7µF, COUT=10µF, TA=25°C, IMAX=1A.
Parameter
Symbol
Conditions
Min Typ Max Unit
Input Voltage Range
VIN
Shutdown Current
Regulated1Feedback
Voltage
Regulated
Output
Voltage Accuracy
Peak
Inductor
Current
IOFF
VEN=0
VFB
For Adjustable Output Voltage
Oscillator Frequency
2.5
∆VOUT/VOUT
VIN=2.5V to 5.5V;
IOUT=0 to 1A
IPK
VIN=3V, VFB=0.5V
fOSC
VIN=3.6V
0.585
5.5
V
0.1
1
µA
0.6
0.615
V
3
%
-3
1.5
1.2
1.5
A
1.8
MHz
PMOSFET RON
RON(P)
VIN=3.6V, IOUT=200mA
0.28
Ω
NMOSFET RON
RON(N)
VIN=2.5V, IOUT=200mA
0.38
Ω
VIN=3.6V, IOUT=200mA
0.25
VIN=2.5V, IOUT=200mA
0.35
VIN=5V, VEN=0V, VLX=0V or
5V
0.01
Input
DC
Current
Bias
IS
LX Leakage Current
ILX
Feedback Current
Input Over Voltage
Protection
IFB
EN Leakage Current
EN High-level Input
Voltage
EN Low-Level Input
Voltage
Under Voltage Lock
Out
VLOVP
6
IEN
0.01
VEN_H
VIN=2.5V to 5.5V
VEN_L
VIN=2.5V to 5.5V
Hysteresis
Thermal Shutdown
Feb. 2012
TSD
Rev. 1. 1
µA
0.1
µA
30
nA
V
0.1
1.5
µA
V
0.6
V
1.8
V
0.1
V
150
°C
BCD Semiconductor Manufacturing Limited
5
Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
AUR9707
Typical Performance Characteristics
Figure 4. Efficiency vs. Output Current
Figure 5. Efficiency vs. Load Current
Figure 6. Efficiency vs. Load Current
Feb. 2012
Figure 7. LDO Mode Efficiency vs. Load Current
Rev. 1. 1
BCD Semiconductor Manufacturing Limited
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Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
AUR9707
Typical Performance Characteristics (Continued)
Figure 9. UVLO Threshold vs. Temperature
Figure 8. Output Voltage vs. Output Current
Figure 10. Output Voltage vs. Output Current
Feb. 2012
Figure 11. Frequency vs. Temperature
Rev. 1. 1
BCD Semiconductor Manufacturing Limited
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Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
AUR9707
Typical Performance Characteristics (Continued)
Figure 12. Output Current Limit vs. Input Voltage
Figure 13. Output Voltage vs. Temperature
Figure 14. Frequency vs. Input Voltage
Feb. 2012
Figure 15. Output Current Limit vs. Temperature
Rev. 1. 1
BCD Semiconductor Manufacturing Limited
8
Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
AUR9707
Typical Performance Characteristics (Continued)
VOUT
200mV/div
VLX
2V/div
VEN
2V/div
Time
Figure 16. Temperature vs. Load Current
400ns/div
Figure 17. Waveform of VIN=4.5V, VOUT=1.5V, L=2.2µH
VEN
2V/div
VOUT
1V/div
VLX
2V/div
Time
200µs/div
Figure 18. Soft Start
Feb. 2012
Rev. 1. 1
BCD Semiconductor Manufacturing Limited
9
Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
AUR9707
Application Information
qw
The basic AUR9707 application circuit is shown in
Figure 23, external components selection is determined
by the load current and is critical with the selection of
inductor and capacitor values.
deviations do not much relieve. The selection of COUT
is determined by the Effective Series Resistance
(ESR) that is required to minimize output voltage
ripple and load step transients, as well as the amount
of bulk capacitor that is necessary to ensure that the
control loop is stable. Loop stability can be also
checked by viewing the load step transient response
as described in the following section. The output
ripple, △VOUT, is determined by:
1. Inductor Selection
For most applications, the value of inductor is chosen
based on the required ripple current with the range of
2.2µH to 4.7µH.
∆VOUT ≤ ∆I L [ ESR +
V
1
∆I L =
VOUT (1 − OUT )
f ×L
VIN
The output ripple is the highest at the maximum input
voltage since △IL increases with input voltage.
The largest ripple current occurs at the highest input
voltage. Having a small ripple current reduces the ESR
loss in the output capacitor and improves the efficiency.
The highest efficiency is realized at low operating
frequency with small ripple current. However, larger
value inductors will be required. A reasonable starting
point for ripple current setting is △IL=40%IMAX . For a
maximum ripple current stays below a specified
value, the inductor should be chosen according to the
following equation:
L =[
3. Load Transient
A switching regulator typically takes several cycles to
respond to the load current step. When a load step
occurs, VOUT immediately shifts by an amount equal
to △ILOAD×ESR, where ESR is the effective series
resistance of output capacitor. △ILOAD also begins to
charge or discharge COUT generating a feedback error
signal used by the regulator to return VOUT to its
steady-state value. During the recovery time, VOUT
can be monitored for overshoot or ringing that would
indicate a stability problem.
VOUT
VOUT
][1 −
]
f × ∆I L ( MAX )
VIN ( MAX )
4. Output Voltage Setting
The DC current rating of the inductor should be at
least equal to the maximum output current plus half
the highest ripple current to prevent inductor core
saturation. For better efficiency, a lower
DC-resistance inductor should be selected.
The output voltage of AUR9707 can be adjusted by a
resistive divider according to the following formula:
VOUT = VREF × (1 +
2. Capacitor Selection
I RMS = I OMAX
VOUT
R1
FB
1
2
AUR9707
R2
GND
It indicates a maximum value at VIN=2VOUT, where
IRMS=IOUT/2. This simple worse-case condition is
commonly used for design because even significant
Feb. 2012
R1
R
) = 0.6V × (1 + 1 )
R2
R2
The resistive divider senses the fraction of the output
voltage as shown in Figure 19.
The input capacitance, CIN, is needed to filter the
trapezoidal current at the source of the top MOSFET.
To prevent large ripple voltage, a low ESR input
capacitor sized for the maximum RMS current must
be used. The maximum RMS capacitor current is
given by:
[V (V − VOUT )]
× OUT IN
VIN
1
]
8 × f × COUT
Figure 19. Setting the Output Voltage
Rev. 1. 1
BCD Semiconductor Manufacturing Limited
10
Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
AUR9707
Application Information (Continued)
5. Efficiency Considerations
RDS(ON) resistance and the duty cycle (D):
The efficiency of switching regulator is equal to the
output power divided by the input power times 100%.
It is usually useful to analyze the individual losses to
determine what is limiting efficiency and which
change could produce the largest improvement.
Efficiency can be expressed as:
RSW = RDS (ON )P × D + RDS (ON ) N × (1 − D )
Therefore, to obtain the I2R losses, simply add RSW to
RL and multiply the result by the square of the
average output current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for
less than 2 % of total additional loss.
Efficiency=100%-L1-L2-…..
Where L1, L2, etc. are the individual losses as a
percentage of input power.
6. Thermal Characteristics
In most applications, the part does not dissipate much
heat due to its high efficiency. However, in some
conditions when the part is operating in high ambient
temperature with high RDS(ON) resistance and high
duty cycles, such as in LDO mode, the heat
dissipated may exceed the maximum junction
temperature. To avoid the part from exceeding
maximum junction temperature, the user should do
some thermal analysis. The maximum power
dissipation depends on the layout of PCB, the thermal
resistance of IC package, the rate of surrounding
airflow and the temperature difference between
junction and ambient.
Although all dissipative elements in the regulator
produce losses, two major sources usually account for
most of the power losses: VIN quiescent current and
I2R losses. The VIN quiescent current loss dominates
the efficiency loss at very light load currents and the
I2R loss dominates the efficiency loss at medium to
heavy load currents.
5.1 The VIN quiescent current loss comprises two
parts: the DC bias current as given in the electrical
characteristics and the internal MOSFET switch gate
charge currents. The gate charge current results from
switching the gate capacitance of the internal power
MOSFET switches. Each cycle the gate is switched
from high to low, then to high again, and the packet
of charge, dQ moves from VIN to ground. The
resulting dQ/dt is the current out of VIN that is
typically larger than the internal DC bias current. In
continuous mode,
7. PCB Layout Considerations
When laying out the printed circuit board, the
following checklist should be used to optimize the
performance of AUR9707.
I GATE = f × (Q P + Q N )
1) The power traces, including the GND trace, the LX
trace and the VIN trace should be kept direct, short
and wide.
2) Put the input capacitor as close as possible to the
VIN and GND pins.
3) The FB pin should be connected directly to the
feedback resistor divider.
4) Keep the switching node, LX, away from the
sensitive FB pin and the node should be kept small
area.
5) The following is an example of 2-layer PCB layout
as shown in Figure 21 and Figure 22 for reference.
Where QP and QN are the gate charge of power
PMOSFET and NMOSFET switches. Both the DC
bias current and gate charge losses are proportional to
the VIN and this effect will be more serious at higher
input voltages.
5.2 I2R losses are calculated from internal switch
resistance, RSW and external inductor resistance RL.
In continuous mode, the average output current
flowing through the inductor is chopped between
power PMOSFET switch and NMOSFET switch.
Then, the series resistance looking into the LX pin is
a function of both PMOSFET RDS(ON) and NMOSFET
Feb. 2012
Rev. 1. 1
BCD Semiconductor Manufacturing Limited
11
Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
AUR9707
Application Information (Continued)
Figure 20. The Evaluation Board Schematic
Figure 21. Top Layer Layout
Feb. 2012
Figure 22. Bottom Layer Layout
Rev. 1. 1
BCD Semiconductor Manufacturing Limited
12
Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
AUR9707
Typical Application
Note 3: VOUT 1 = VREF × (1 +
R1
R
) ; VOUT 2 = VREF × (1 + 3 )
R4
R2
When R2 or R4=300kΩ to 60 kΩ, the IR2 or IR3=2µA to 10µA, and R1×C1 or R3×C2 should be in the range between
3×10-6 and 6×10-6 for component selection.
Figure 23. Typical Application Circuit of AUR9707
VOUT1 or VOUT2(V)
R1 or R3(kΩ)
R2 or R4(kΩ)
C1 or C2(pF)
L1 or L2(µH)
3.3
240
53
20
2.2
2.5
240
75
20
2.2
1.8
240
120
20
2.2
1.5
240
160
20
2.2
1.2
240
240
20
2.2
1.0
240
300
20
2.2
Table 1. Component Guide
Feb. 2012
Rev. 1. 1
BCD Semiconductor Manufacturing Limited
13
Data Sheet
Dual High-efficiency PWM Step-down DC-DC Converter with OVP
AUR9707
Mechanical Dimensions
WDFN-3×3-12
Feb. 2012
Rev. 1. 1
Unit: mm(inch)
BCD Semiconductor Manufacturing Limited
14
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