54AC251 • 54ACT251 8-Input Multiplexer with TRI-STATE ® Output General Description The ’AC/’ACT251 is a high-speed 8-input digital multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. It can be used as universal function generator to generate any logic function of four variables. Both true and complementary outputs are provided. Features n n n n n n Multifunctional capability On-chip select logic decoding Inverting and noninverting TRI-STATE outputs Outputs source/sink 24 mA ’ACT251 has TTL-compatible inputs Standard Military Drawing (SMD) — ’AC251: 5962-87692 — ’ACT251: 5962-89599 n ICC reduced by 50% Logic Symbols IEEE/IEC DS100284-1 DS100284-2 Pin Names Description S0–S2 Select Inputs OE TRI-STATE Output Enable Input I0–I7 Multiplexer Inputs Z TRI-STATE Multiplexer Output Z Complementary TRI-STATE Multiplexer Output TRI-STATE ® is a registered trademark of National Semiconductor Corporation. FACT ® is a registered trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100284 www.national.com 54AC251 • 54ACT251 8-Input Multiplexer with TRI-STATE Output August 1998 Connection Diagrams Functional Description This device is a logical implementation of a single-pole, 8-position switch with the switch position controlled by the state of three Select inputs, S0, S1, S2. Both true and complementary outputs are provided. The Output Enable input ( OE) is active LOW. When it is activated, the logic function provided at the output is: Z = OE • (I0 • S0 • S1 • S2 + I1 • S0 • S1 • S 2 + I 2 • S 0 • S 1 • S2 + I 3 • S 0 • S1 • S2 + I 4 • S0 • S1 • S2 + I 5 • S 0 • S1 • S2 + I6 • S0 • S 1 • S2 + I7 • S0 • S1 • S2) When the Output Enable is HIGH, both outputs are in the high impedance (High Z) state. This feature allows multiplexer expansion by tying the outputs of up to 128 devices together. When the outputs of the TRI-STATE devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. The Output Enable signals should be designed to ensure there is no overlap in the active-LOW portion of the enable voltages. Pin Assignment for DIP and Flatpak DS100284-3 Pin Assignment for LCC Truth Table Inputs DS100284-4 S2 S1 S0 Z H X X X Z Z L L L L I0 I0 L L L H I1 I1 L L H L I2 I2 L L H H I3 I3 L H L L I4 I4 L H L H I5 I5 L H H L I6 I6 L H H H I7 I7 H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance www.national.com 2 Outputs OE Z Logic Diagram DS100284-5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.national.com Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) CDIP Supply Voltage (VCC) ’AC ’ACT Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) 54AC/ACT Minimum Input Edge Rate (∆V/∆t) ’AC Devices VIN from 30% to 70% of VCC VCC @ 3.3V, 4.5V, 5.5V Minimum Input Edge Rate (∆V/∆t) ’ACT Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V ± 50 mA ± 50 mA −65˚C to +150˚C 2.0V to 6.0V 4.5V to 5.5V 0V to VCC 0V to VCC −55˚C to +125˚C 125 mV/ns 125 mV/ns Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of FACT ® circuits outside databook specifications. 175˚C Note 2: All outputs loaded; thresholds on input associated with output under test. DC Characteristics for ’AC Family Devices Symbol VIH VIL VOH Parameter VCC 54AC TA = −55˚C to +125˚C (V) Guaranteed Limits Minimum High Level 3.0 2.1 Input Voltage 4.5 3.15 5.5 3.85 Maximum Low Level 3.0 0.9 Input Voltage 4.5 1.35 5.5 1.65 Minimum High Level 3.0 2.9 Output Voltage 4.5 4.4 5.5 5.4 Units Conditions VOUT = 0.1V V or VCC − 0.1V V or VCC − 0.1V VOUT = 0.1V IOUT = −50 µA V (Note 2) VIN = VIL or VIH VOL 3.0 2.4 4.5 3.7 5.5 4.7 Maximum Low Level 3.0 0.1 Output Voltage 4.5 0.1 5.5 0.1 IOH = −12 mA V IOH = −24 mA IOH = −24 mA IOUT = 50 µA V (Note 2) VIN = VIL or VIH IIN Maximum Input 3.0 0.50 4.5 0.50 5.5 0.50 5.5 ± 1.0 Leakage Current www.national.com 4 IOL = 12 mA V IOL = 24 mA µA IOL = 24 mA VI = VCC, GND DC Characteristics for ’AC Family Devices (Continued) VCC 54AC TA = −55˚C to +125˚C (V) Guaranteed Limits Current 5.5 ± 5.0 µA IOLD Minimum Dynamic 5.5 50 mA IOHD Output Current (Note 3) 5.5 −50 mA VOLD = 1.65V Max VOHD = 3.85V Min Maximum Quiescent 5.5 80.0 µA VIN = VCC or GND Symbol IOZ ICC Parameter Units Maximum TRI-STATE Conditions VI (OE) = VIL, VIH VI = VCC, VGND VO = VCC, GND Supply Current Note 3: Maximum test duration 2.0 ms, one output loaded at a time. Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. ICC for 54AC @ 25˚C is identical to 74AC @ 25˚C. DC Characteristics for ’ACT Family Devices Symbol VIH VIL VOH Parameter VCC 54ACT TA = −55˚C to +125˚C (V) Guaranteed Limits Minimum High Level 4.5 2.0 Input Voltage 5.5 2.0 Maximum Low Level 4.5 0.8 Input Voltage 5.5 0.8 Minimum High Level 4.5 4.4 Output Voltage 5.5 5.4 Units Conditions V VOUT = 0.1V V or VCC − 0.1V VOUT = 0.1V V or VCC − 0.1V IOUT = −50 µA (Note 5) VIN = VIL or VIH VOL 4.5 3.70 5.5 4.70 Maximum Low Level 4.5 0.1 Output Voltage 5.5 0.1 V IOH = −24 mA V IOH = −24 mA IOUT = 50 µA (Note 5) VIN = VIL or VIH IIN Maximum Input 4.5 0.50 5.5 0.50 V IOL = 24 mA ± 1.0 µA IOL = 24 mA VI = VCC, GND 5.5 5.5 ± 5.0 µA VI = VIL, VIH VO = VCC, GND VI = VCC − 2.1V VOLD = 1.65V Max Leakage Current IOZ Maximum TRI-STATE Current ICCT Maximum ICC/Input 5.5 1.6 mA IOLD Minimum Dynamic 5.5 50 mA IOHD Output Current (Note 6) 5.5 −50 mA ICC Maximum Quiescent 5.5 80.0 µA Supply Current VOHD = 3.85V Min VIN = VCC or GND Note 5: All outputs loaded; thresholds on input associated with output under test. Note 6: Maximum test duration 2.0 ms, one output loaded at a time. Note 7: ICC for 54ACT @ 25˚C is identical to 74ACT @ 25˚C. 5 www.national.com AC Electrical Characteristics 54AC TA = −55˚C VCC Symbol Parameter (V) to +125˚C CL = 50 pF (Note 8) Min tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Units Max Propagation Delay 3.3 1.0 21.0 Sn to Z or Z 5.0 1.0 15.5 Propagation Delay 3.3 1.0 21.0 Sn to Z or Z 5.0 1.0 15.5 Propagation Delay 3.3 1.0 17.0 In to Z or Z 5.0 1.0 12.0 Propagation Delay 3.3 1.0 16.5 In to Z or Z 5.0 1.0 12.0 Output Enable Time 3.3 1.0 13.0 OE to Z or Z 5.0 1.0 10.0 Output Enable Time 3.3 1.0 13.0 OE to Z or Z 5.0 1.0 10.0 Output Disable Time 3.3 3.5 14.0 OE to Z or Z 5.0 2.5 11.0 Output Disable Time 3.3 4.0 13.0 OE to Z or Z 5.0 3.0 10.0 ns ns ns ns ns ns ns ns Note 8: Voltage Range 3.3 is 3.3V ± 0.3V Voltage Range 5.0 is 5.0V ± 0.5V AC Electrical Characteristics 54ACT TA = −55˚C VCC Symbol Parameter (V) to +125˚C CL = 50 pF (Note 9) tPLH Propagation Delay Units Min Max 5.0 1.0 18.0 ns 5.0 1.0 18.0 ns 5.0 1.0 13.5 ns 5.0 1.0 13.5 ns 5.0 1.0 10.0 ns 5.0 1.0 9.5 ns 5.0 1.0 12.5 ns 5.0 1.0 8.5 ns Sn to Z or Z tPHL Propagation Delay Sn to Z or Z tPLH Propagation Delay In to Z or Z tPHL Propagation Delay In to Z or Z tPZH Output Enable Time OE to Z or Z tPZL Output Enable Time OE to Z or Z tPHZ Output Disable Time OE to Z or Z tPLZ Output Disable Time OE to Z or Z Note 9: Voltage Range 5.0 is 5.0V ± 0.5V www.national.com 6 Capacitance Symbol CIN CPD Typ Units Input Capacitance Parameter 4.5 pF Power Dissipation 70.0 pF Conditions VCC = OPEN VCC = 5.0V Capacitance 7 www.national.com 8 Physical Dimensions inches (millimeters) unless otherwise noted 20 Terminal Ceramic Leadless Chip Carrier (L) NS Package Number E20A 16 Lead Ceramic Dual-In-Line Package (D) NS Package Number J16A 9 www.national.com 54AC251 • 54ACT251 8-Input Multiplexer with TRI-STATE Output Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16 Lead Ceramic Flatpak (F) NS Package Number W16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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