National Semiconductor Application Note 2050 Dennis Morgan February 22, 2011 Introduction • • • • • • • • The LM5006EVAL evaluation board provides the design engineer with a fully functional buck regulator, employing the constant on-time (COT) operating principle. This evaluation board provides a 5V output over an input range of 6V to 75V. The circuit delivers load currents to 500 mA, with current limit set at a nominal 1 Amp. The board’s specification are: Input Voltage: 6V to 75V Output Voltage: 5V Maximum load current: 500 mA Minimum load current: 0A Current Limit: 1 Amp (nominal) Measured Efficiency: 94.75% (VIN = 6V, IOUT = 100 mA) Nominal Switching Frequency: 200 kHz Size: 2.6 in. x 1.6 in. LM5006 Evaluation Board LM5006 Evaluation Board 30121101 FIGURE 1. Evaluation Board - Top Side Theory of Operation Refer to the evaluation board schematic in Figure 6. When the circuit is in regulation, the buck switch is on each cycle for a time determined by R1 and VIN according to the equation: The on-time of this evaluation board ranges from ≊4.38 µs at VIN = 6V, to ≊351 ns at VIN = 75V. The on-time varies in- versely with VIN to maintain a nearly constant switching frequency. At the end of each on-time the Minimum Off-Timer ensures the buck switch is off for at least 260 ns. In normal operation, the off-time is much longer. During the off-time, the load current is supplied by the output capacitor (C2). When the output voltage falls sufficiently that the voltage at FB is below 2.5V, the regulation comparator initiates a new on-time period. For stable, fixed frequency operation, a minimum of 25 mV of ripple is required at FB to switch the regulation comparator. Refer to the LM5006 data sheet for a more detailed block diagram, and a complete description of the various functional blocks. AN-2050 © 2011 National Semiconductor Corporation 301211 www.national.com AN-2050 ommended that the input voltage be increased gradually to 6V, at which time the output voltage should be 5V. If the output voltage is correct with 6V at VIN, then increase the input voltage as desired and proceed with evaluating the circuit. DO NOT EXCEED 75V AT VIN. Board Layout and Probing The pictorial in Figure 1 shows the placement of the circuit components. The following should be kept in mind when the board is powered: 1) When operating at high input voltage and high load current, forced air flow may be necessary. 2) The LM5006 may be hot to the touch when operating at high input voltage and high load current. 3) Use CAUTION when probing the circuit at high input voltages to prevent injury, as well as possible damage to the circuit. 4) At maximum load current, the wire size and length used to connect the load becomes important. Ensure there is not a significant drop in the wires between this evaluation board and the load. Output Ripple Control The LM5006 requires a minimum of 25 mVp-p ripple at the FB pin, in phase with the switching waveform at the SW pin, for proper operation. The required ripple can be supplied from ripple at VOUT, through the feedback resistors as described in Option A below. Options B and C provide lower output ripple with one or two additional components. Option A) Lowest Cost Configuration: In this configuration R7 is installed in series with the output capacitance (C2). Since ≥25 mVp-p are required at the FB pin, R7 must be chosen to generate ≥50 mVp-p at VOUT, knowing that the minimum ripple current in this circuit is ≊51 mAp-p at minimum VIN. Using 1Ω for R7, the ripple at VOUT ranges from ≊51 mVp-p to ≊280 mVp-p over the input voltage range. If the application can accept this ripple level, this is the most economical solution. The circuit is shown in Figure 2. See Figure 9. R8, C6, C7, and C8 are not used in this configuration. Board Connection/Start-up The input connections are made to the J1 connector. The load is connected to the J2 (OUT) and J3 (GND) terminals. Ensure the wires are adequately sized for the intended load current. Before start-up a voltmeter should be connected to the input terminals, and to the output terminals. The load current should be monitored with an ammeter or a current probe. It is rec- 30121103 FIGURE 2. Lowest Cost Configuration www.national.com 2 addition of one capacitor (C8) across R5, as shown in Figure 3. 30121104 FIGURE 3. Reduced Ripple Configuration Since the output ripple is passed by C8 to the FB pin with little or no attenuation, R7 can be reduced so the minimum ripple at VOUT is ≊25 mVp-p. The minimum value for Cff is calculated from: 1) Calculate the voltage VA: VA = VOUT – (VSW x (1 – (VOUT/VIN))) where VSW is the absolute value of the voltage at the SW pin during the off-time (typically 0.1V with Q1), and VIN is the minimum input voltage. For this circuit, VA calculates to 4.98V. This is the approximate DC voltage at the R8/C6 junction, and is used in the next equation. 2) Calculate the R8 x C6 product: where tON(max) is the maximum on-time (at minimum VIN), and R5//R6 is the parallel equivalent of the feedback resistors. The ripple at VOUT ranges from 28 mVp-p to 159 mVp-p over the input voltage range. See Figure 9. Option C) Minimum Ripple Configuration: To obtain minimum ripple at VOUT, R7 is set to 0Ω, and R8, C6, and C7 are added to generate the required ripple for the FB pin. In this configuration, the output ripple is determined primarily by the characteristics of the output capacitance and the inductor’s ripple current. See Figure 9. The ripple voltage required by the FB pin is generated by R8, and C6 since the SW pin switches from –0.1V to VIN, and the right end of C6 is a virtual ground. The values for R8 and C6 are chosen to generate a 30-100 mVp-p triangle waveform at their junction. That triangle wave is then coupled to the FB pin through C7. The following procedure is used to calculate values for R8, C6 and C7: where tON is the maximum on-time, VIN is the minimum input voltage, and ΔV is the desired ripple amplitude at the R8/C6 junction, 40 mVp-p for this example. R8 and C6 are then chosen from standard value components to satisfy the above product. Typically C6 is 3000 to 10000 pF, and R8 is 10 kΩ to 300 kΩ. C7 is chosen large compared to C6, typically 0.1 µF. The ripple at VOUT is typically less than 10 mVp-p. See Figure 4 and Figure 9. 3 www.national.com AN-2050 Option B) Reduced Ripple Configuration: This configuration generates less ripple at VOUT than option A above by the AN-2050 30121108 FIGURE 4. Minimum Output Ripple Configuration FET as compared to a diode. See Figure 5. Another advantage of using a synchronous rectifier is that the circuit remains in continuous conduction mode, providing a relatively constant switching frequency, for all values of load current, including zero. If a flyback diode is used, the switching frequency decreases significantly at low values of load current when the circuit changes to discontinuous conduction mode. If a flyback diode is preferred over a synchronous rectifier, remove Q1 and install a diode at the pads labeled D1. This board accepts devices such as the DFLS1100 from Diodes Inc. LG (Low Side Gate) Output As supplied, this evaluation board employs synchronous rectification by using an N-Channel MOSFET (Q1) in place of a more traditional flyback diode. This board accepts any device in a SOT-23 package, such as a Vishay Si2328. The LG output pin switches between approximately 7.5V (the VCC voltage) and ground. The LG output is capable of sourcing 250 mA, and sinking 300 mA. An external gate driver is not needed if the selected MOSFET has a total gate charge of less than 10 nC. Use of a synchronous rectifier generally results in higher circuit efficiency due to the lower voltage drop across the MOS- 30121109 FIGURE 5. Efficiency Comparison at 200 kHz www.national.com 4 AN-2050 Under-Voltage Detector The Under Voltage Detector can be used to monitor the input voltage, or any other system voltage as long as the voltage at the UV pin does not exceed its maximum rating. On this evaluation board the input voltage is monitored via resistors R2 and R3. An appropriate pull-up voltage less than 10 volts must be connected to test point TP2-UVO on this evaluation board. R4 is the pull-up resistor for the UVO output. The under-voltage status can then be monitored at the TP3-Status test point. On this evaluation board the UVO output switches low when the input voltage exceeds 12V, and it switches high when the input voltage is less than 11V. If it is desired to change the thresholds, the equations for determining the resistor values are: Where VUVH is the upper threshold at VIN, and VUVL is the lower threshold. The threshold at the UV pin is 2.5V. The UVO output is high when the VCC voltage is below its UVLO threshold, or when the LM5006 is shutdown by grounding the TP1-SD test point, regardless of the voltage at the UV pin. 30121125 FIGURE 6. Complete Evaluation Board Schematic (As Supplied) The inductor’s current can be monitored or viewed on a scope with a current probe. Remove R9, and install an appropriate current loop across the two large pads where R9 was located. In this way the inductor’s ripple current and peak current can be accurately determined. levels at the both outputs, and the design of the transformer L1. The two outputs can be isolated, or share a common ground. Figure 16 shows a circuit which provides a regulated 12V output, and two secondary 5V outputs. VOUT2 and VOUT3 can be isolated from VOUT1 and from each other, or share ground connections, depending on the application. Multiple Outputs Scope Probe Adapters Multiple outputs can be produced by replacing the inductor (L1) with a transformer, and using a MOSFET (Q1) for synchronous rectification. The synchronous rectification is required to ensure the circuit is in continuous conduction mode at all values of the main output’s load current. This ensures the secondary output voltages are correct at all times. In Figure 15, a second isolated output is provided at VOUT2. Its regulation depends on the relative output voltages, current Scope probe adapters are provided on this evaluation board for monitoring the waveform at the SW pin, and at the circuit’s output (VOUT), without using the probe’s ground lead which can pick up noise from the switching waveforms. Monitor The Inductor Current 5 www.national.com AN-2050 Bill of Materials Item Description Mfg., Part Number Package Value C1 Ceramic Capacitor TDK C3225X7R2A225M 1210 2.2 µF, 100V C2 Ceramic Capacitor TDK C3225X7R1C156M 1210 15 µF, 16V C3 Ceramic Capacitor TDK C1608X7R1C105K 0603 1 µF, 16V C4 Ceramic Capacitor TDK C1608X7R2A103K 0603 0.01 µF, 100V C5 Ceramic Capacitor TDK C2012X7R2A104M 0805 0.1 µF, 100V C6 Ceramic Capacitor TDK C1608X7R2A332K 0603 3300 pF, 100V C7 Ceramic Capacitor TDK C2012X7R2A104M 0805 0.1 µF, 100V C8 Unpopulated C9 Ceramic Capacitor TDK C1608X7R2A102K 0805 1000 pF, 100V L1 Inductor Coiltronics DR74-820-R or Wurth Electronics 744771182 Q1 N-Channel MOSFET Vishay Si2328DS SOT-23 100V, 1.5A R1 Resistor Vishay CRCW0603191KF 0603 191kΩ R2 Resistor Vishay CRCW0603200KF 0603 200kΩ R3 Resistor Vishay CRCW060359KOF 0603 59 kΩ R4 Resistor Vishay CRCW0603100KF 0603 100 kΩ R5 Resistor Vishay CRCW06033KO1F 0603 3.01 kΩ R6 Resistor Vishay CRCW06033KO1F 0603 3.01 kΩ R7 Resistor Vishay CRCW06030000Z 0603 0Ω jumper R8 Resistor Vishay CRCW060336K5F 0603 36.5 kΩ R9 Resistor Vishay CRCW06030000Z 0603 0Ω jumper U1 Switching Regulator National Semiconductor LM5006MM MSOP-10 www.national.com 6 82 uH,1A AN-2050 Circuit Performance 30121110 FIGURE 7. Efficiency vs Load Current 30121111 FIGURE 8. Efficiency vs Input Voltage 7 www.national.com AN-2050 30121112 FIGURE 9. Output Voltage Ripple 30121113 FIGURE 10. Switching Frequency vs. Input Voltage 30121114 FIGURE 11. Current Limit vs Input Voltage www.national.com 8 AN-2050 30121120 FIGURE 12. Line Regulation 30121121 FIGURE 13. Load Regulation 9 www.national.com AN-2050 Typical Waveforms 30121115 Trace 1 = SW Pin Trace 2 = VOUT Trace 4 = Inductor Current Vin = 12V, Iout = 200 mA FIGURE 14. Typical Waveforms 30121128 FIGURE 15. Generate a Secondary Output www.national.com 10 AN-2050 30121129 FIGURE 16. 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