ERICSSON BMR4613001

E
Ericsson Internal
PRODUCT
TABLE
OF CONTENTS
SPECIFICATION
Prepared (also subject responsible if other)
EAB/FAC/P Johan
Susanne
Hörman
Eriksson
Approved
BMR461 series
POL
Regulators
EAB/FAC/P
[Susanne
Eriksson]
1 (3)
2
(4)
No.
Checked
Input 4.5-14 V, Output up to 12 A / 60 W
BPOW
1/1301-BMR
00201-00152
461Technical
UenUen
Date
2013-08-28
2009-07-10
Speciﬁcation
Rev
Reference
A
D
D
Y
1/287 01-BMR 461 Uen A August 2013
© Ericsson AB
Key Features
• Small package
12.2 x 12.2 x 8.0 mm (0.48 x 0.48 x 0.315 in)
• 0.6 V - 5.0 V output voltage range
• High efficiency, typ. 96 % at 12Vin, 5Vout and 80% load
• Configuration Control and Monitoring via PMBus
• Adaptive compensation of PWM control loop & fast loop
transient response
• Synchonization input & phase spreading/interleaving
• Voltage Tracking & Voltage margining
• MTBF 24 Mh
General Characteristics
•
•
•
•
•
•
•
•
•
For narrow board pitch applications (15 mm/0.6 in)
Pre-bias start-up and shut down
Monotonic & Soft start Power up
Input under voltage shutdown
OTP, output OVP, OCP
Remote control & Power Good
Differential sense pins
Voltage setting via pin-strap or PMBus
Advanced Configurable via Graphical
User Interface
• ISO 9001/14001 certified supplier
• Highly automated manufacturing ensures quality
Safety Approvals
Design for Environment
Meets requirements in hightemperature lead-free soldering
processes.
Contents
Ordering Information
General Information
Safety Specification
Absolute Maximum Ratings
............................................................. 2
............................................................. 2
............................................................. 3
............................................................. 4
Electrical Specification
12A / 0.6-5.0 V
BMR461 3001....................................... 5
EMC Specification
Operating Information
Thermal Consideration
Connections
Mechanical Information
Soldering Information
Delivery Information
Product Qualification Specification
........................................................... 15
........................................................... 16
........................................................... 25
........................................................... 26
........................................................... 32
........................................................... 33
........................................................... 34
........................................................... 35
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
1/1301-BMR 461Technical
Uen
EAB/FAC/P Johan Hörman
Approved
Checked
Date
BMR461 series POL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
2013-08-28
Product program
BMR 461
Output
0.6-5.0 V, 12 A/ 60 W
Product number and Packaging
BMR 461 n1n2n3n4/n5n6n7n8
Options
n1 n2 n3 n4 / n5
Output Current
/
ο
ο
n6
n7
n8
Reference
A
Y
2
1/287 01-BMR 461 Uen A August 2013
© Ericsson AB
Configuration file
Packaging
ο
/
/
/
ο
The products are compatible with the relevant clauses and
requirements of the RoHS directive 2002/95/EC and have a
maximum concentration value of 0.1% by weight in
homogeneous materials for lead, mercury, hexavalent
chromium, PBB and PBDE and of 0.01% by weight in
homogeneous materials for cadmium.
Exemptions in the RoHS directive utilized in Ericsson
Power Modules products are found in the Statement of
Compliance document.
/
ο
Digital interface
Speciﬁcation
Rev
Compatibility with RoHS requirements
Ordering Information
Mechanical
2 (4)
No.
ο
ο
Options
Description
n1
3
12A
n2
0
LGA
n3 n4
01
PMBus and analog pin strap
n5 n6 n7
001
Standard configuration
n8
C
Antistatic tape & reel of 280 products
(1 full reel/box =280 products. Sample
delivery avalable in lower quantities)
ο
Ericsson Power Modules fulfills and will continuously fulfill
all its obligations under regulation (EC) No 1907/2006
concerning the registration, evaluation, authorization and
restriction of chemicals (REACH) as they enter into force
and is through product materials declarations preparing for
the obligations to communicate information on substances
in the products.
Quality Statement
Example: Product number BMR 461 3001/001C equals a 12A, LGA, PMBus
and analog pin strap, standard configuration variant.
General Information
The products are designed and manufactured in an
industrial environment where quality systems and methods
like ISO 9000, Six Sigma, and SPC are intensively in use to
boost the continuous improvements strategy. Infant
mortality or early failures in the products are screened out
and they are subjected to an ATE-based final test.
Conservative design rules, design reviews and product
qualifications, plus the high competence of an engaged
work force, contribute to the high quality of the products.
Warranty
Reliability
The failure rate (λ) and mean time between failures
(MTBF= 1/λ) is calculated at max output power and an
operating ambient temperature (TA) of +40°C. Ericsson
Power Modules uses Telcordia SR-332 Issue 2 Method 1
to calculate the mean steady-state failure rate and standard
deviation (σ).
Telcordia SR-332 Issue 2 also provides techniques to
estimate the upper confidence levels of failure rates based
on the mean and standard deviation.
Warranty period and conditions are defined in Ericsson
Power Modules General Terms and Conditions of Sale.
Limitation of Liability
Ericsson Power Modules does not make any other
warranties, expressed or implied including any warranty of
merchantability or fitness for a particular purpose
(including, but not limited to, use in life support
applications, where malfunctions of product can cause
injury to a person’s health or life).
© Ericsson AB 2013
Mean steady-state failure rate, λ
40 nFailures/h
Std. deviation, σ
8.2 nFailures/h
MTBF (mean value) for the BMR 461 series = 24.98 Mh.
MTBF at 90% confidence level = 19.77 Mh
The information and specifications in this technical
specification is believed to be correct at the time of
publication. However, no liability is accepted for
inaccuracies, printing errors or for any consequences
thereof. Ericsson AB reserves the right to change the
contents of this technical specification at any time without
prior notice.
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FAC/P Johan Hörman
Approved
Checked
BMR461 series POL Regulators
Input 4.5-14 V, Output up to 12 A / 60 W
Safety Specification
General information
Ericsson Power Modules DC/DC converters and DC/DC
regulators are designed in accordance with safety
standards IEC/EN/UL 60950-1 Safety of Information
Technology Equipment.
IEC/EN/UL 60950-1 contains requirements to prevent injury
or damage due to the following hazards:
•
•
•
•
•
•
3 (4)
No.
Electrical shock
Energy hazards
Fire
Mechanical and heat hazards
Radiation hazards
Chemical hazards
On-board DC/DC converters and DC/DC regulators are
defined as component power supplies. As components
they cannot fully comply with the provisions of any safety
requirements without “Conditions of Acceptability”.
Clearance between conductors and between conductive
parts of the component power supply and conductors on
the board in the final product must meet the applicable
safety requirements. Certain conditions of acceptability
apply for component power supplies with limited stand-off
(see Mechanical Information for further information). It is
the responsibility of the installer to ensure that the final
product housing these components complies with the
requirements of all applicable safety standards and
regulations for the final product.
Component power supplies for general use should comply
with the requirements in IEC 60950-1, EN 60950-1 and
UL 60950-1 Safety of Information Technology Equipment.
There are other more product related standards, e.g.
IEEE 802.3 CSMA/CD (Ethernet) Access Method, and
ETS-300132-2 Power supply interface at the input to
telecommunications equipment, operated by direct current
(dc), but all of these standards are based on
IEC/EN/UL 60950-1 with regards to safety.
Ericsson Power Modules DC/DC converters and DC/DC
regulators are UL 60950-1 recognized and certified in
accordance with EN 60950-1.
The flammability rating for all construction parts of the
products meet requirements for V-0 class material
according to IEC 60695-11-10, Fire hazard testing, test
flames – 50 W horizontal and vertical flame test methods.
The products should be installed in the end-use equipment,
in accordance with the requirements of the ultimate
application. Normally the output of the DC/DC converter is
considered as SELV (Safety Extra Low Voltage) and the
input source must be isolated by minimum Double or
Reinforced Insulation from the primary circuit (AC mains) in
accordance with IEC/EN/UL 60950-1.
1/1301-BMR 461Technical
Uen
Date
2013-08-28
Speciﬁcation
Rev
Reference
A
Y
3
1/287 01-BMR 461 Uen A August 2013
© Ericsson AB
Isolated DC/DC converters
It is recommended that a slow blow fuse is to be used at
the input of each DC/DC converter. If an input filter is used
in the circuit the fuse should be placed in front of the input
filter.
In the rare event of a component problem that imposes a
short circuit on the input source, this fuse will provide the
following functions:
•
•
Isolate the fault from the input power source so as
not to affect the operation of other parts of the
system.
Protect the distribution wiring from excessive
current and power loss thus preventing hazardous
overheating.
The galvanic isolation is verified in an electric strength test.
The test voltage (Viso) between input and output is
1500 Vdc or 2250 Vdc (refer to product specification).
24 V DC systems
The input voltage to the DC/DC converter is SELV (Safety
Extra Low Voltage) and the output remains SELV under
normal and abnormal operating conditions.
48 and 60 V DC systems
If the input voltage to the DC/DC converter is 75 Vdc or
less, then the output remains SELV (Safety Extra Low
Voltage) under normal and abnormal operating conditions.
Single fault testing in the input power supply circuit should
be performed with the DC/DC converter connected to
demonstrate that the input voltage does not exceed
75 Vdc.
If the input power source circuit is a DC power system, the
source may be treated as a TNV-2 circuit and testing has
demonstrated compliance with SELV limits in accordance
with IEC/EN/UL60950-1.
Non-isolated DC/DC regulators
The input voltage to the DC/DC regulator is SELV (Safety
Extra Low Voltage) and the output remains SELV under
normal and abnormal operating conditions.
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
1 (13)
No.
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
2/1301-BMR 461Technical
Uen
Date
Rev
2013-08-27
Speciﬁcation
4
Reference
1/287 01-BMR 461 Uen A August 2013
A
© Ericsson AB
Absolute Maximum Ratings
Characteristics
min
max
Unit
TP1
-40
120
°C
Operating temperature (see Thermal Consideration section)
typ
TS
Storage temperature
-40
125
°C
VI
Input voltage (See Operating Information Section for input and output voltage relations)
-0.3
18
V
CTRL, SA0, SA1, SALERT, SCL, SDA, VSET, SYNC, PG, CS_VTRK
-0.3
4
V
-S, PREF, GND
-0.3
0.3
V
VO, +S
-0.3
5.5
V
Logic I/O voltage
Ground voltage
differential
Analog pin voltage
Stress in excess of Absolute Maximum Ratings may cause permanent damage. Absolute Maximum Ratings, sometimes referred to as no destruction limits, are
normally tested with one parameter at a time exceeding the limits in the Electrical Specification. If exposed to stress above these limits, function and performance
may degrade in an unspecified manner.
Configuration File
This product is designed with a digital control circuit. The control circuit uses a configuration file which determines the functionality and performance of the product.
The Electrical Specification table shows parameter values of functionality and performance with the default configuration file, unless otherwise specified. The default
configuration file is designed to fit most application needs with focus on high efficiency. If different characteristics are required it is possible to change the
configuration file to optimize certain performance characteristics.
In this Technical specification examples are included to show the possibilities with digital control. See Operating Information section for information about trade offs
when optimizing certain key performance characteristics.
Fundamental Circuit Diagram
VIN
VOUT
CI
CO
GND
+S
-S
CTRL
PG
SDA
SCL
Controller and digital interface
SA0
SALERT
SY NC
CS_VTRK
VSET
PREF
SA1
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
2 (13)
No.
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
2/1301-BMR 461Technical
Uen
Date
Rev
5
Speciﬁcation
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
A
© Ericsson AB
Electrical Specification
BMR 461 3001
TP1 = -30 to +95°C, VI = 4.5 to 14 V, VI > VO + 1.0 V
Typical values given at: TP1 = +25°C, VI = 12.0 V, max IO, unless otherwise specified under Conditions.
Default configuration file, 190 10-CDA 102 0370/001. VO defined by pin strap.
External CIN = 47 µF ceramic + 270 µF/10 mΩ electrolytic, COUT = 3x100 µF + 0.1 µF ceramic.
See Operating Information section for selection of capacitor types. Sense pins are connected to the output pins.
Characteristics
VI
Conditions
Input voltage
Output voltage without pin strap
Output voltage adjustment range
Output voltage adjustment including
PMBus margining
Output voltage set-point resolution
Output voltage accuracy
Internal resistance +S/-S to VOUT/GND
+S bias current
-S bias current
VO
Line regulation
IO = max IO
Load regulation
IO = 0 - 100%
VOac
Output ripple & noise
(up to 20 MHz)
IO
Output current
Static input current at max IO
Ilim
Current limit threshold
Short circuit current
Efficiency
IO = max IO
Pd
4.5
Power dissipation at max IO
max
Unit
14
0.60
5.0
V
V
V
0.50
5.25
V
0
1.2
Including line, load, temp
-1
1
47
50
-35
1
2
3
4
7
1
1
1
2
2
10
10
11
19
25
VO = 0.6 V
VO = 1.2 V
VO = 1.8 V
VO = 3.3 V
VO = 5.0 V
VO = 0.6 V
VO = 1.2 V
VO = 1.8 V
VO = 3.3 V
VO = 5.0 V
VO = 0.6 V
VO = 1.2 V
VO = 1.8 V
VO = 3.3 V
VO = 5.0 V
VO = 0.6 V
VO = 1.2 V
VO = 1.8 V
VO = 3.3 V
VO = 5.0 V
RMS, hiccup mode,
VO = 3.3 V, 4 mΩ short
50% of max IO
η
typ
0
IS
Isc
min
VO = 0.6 V
VO = 1.2 V
VO = 1.8 V
VO = 3.3 V
VO = 5.0 V
VO = 0.6 V
VO = 1.2 V
VO = 1.8 V
VO = 3.3 V
VO = 5.0 V
VO = 0.6 V
VO = 1.2 V
VO = 1.8 V
VO = 3.3 V
VO = 5.0 V
mV
mV
mVp-p
12
0.7
1.3
2.0
3.5
5.2
15
3
78.8
87.5
90.8
94.1
95.4
81.3
89.0
91.8
94.6
95.8
1.66
1.78
1.93
2.24
2.63
mV
% VO
Ω
µA
µA
A
A
17
A
A
%
%
W
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Characteristics
Pli
2/1301-BMR 461Technical
Uen
Date
IO = 0
Vtr1
Load transient peak voltage deviation
ttr1
Load transient recovery time
min
Switching frequency range
Switching frequency set-point accuracy
External Sync Duty Cycle
Synchronization Frequency Tolerance
Input Under Voltage
Lockout
(hardware controlled)
Input Over Voltage
Lockout
(hardware controlled)
Input Turn-On
Voltage
Input Turn-Off
Voltage
Threshold, VUVLO
PMBus configurable
FREQUENCY_SWITCH
Note 2
Input Under/Over
Voltage Protection,
IUVP/ IOVP
Output voltage
Over/Under Voltage
Protection,
OVP/UVP
kHz
300-1000
kHz
4.1
4.4
V
0.24
Input rising
PMBus configurable
VIN_ON
PMBus configurable
VIN_OFF
PMBus configurable
VIN_UV_FAULT_LIMIT
PMBus configurable
VIN_OV_FAULT_LIMIT
VIN_UV_FAULT_RESPONSE
VIN_OV_FAULT_RESPONSE
PMBus configurable
VOUT_UV_FAULT_LIMIT
OVP threshold range
Fault response
VOUT_UV_FAULT_RESPONSE
VOUT_OV_FAULT_RESPONSE
Fault response
600
3.8
PMBus configurable
VOUT_OV_FAULT_LIMIT
OCP threshold range
µs
Rising edge
OVP threshold
OCP threshold
Over Current
Protection,
OCP
25
External clock source
UVP threshold
UVP threshold range
mV
%
%
%
Set point accuracy
Fault response
60
10
60
10
IOVP threshold
IOVP threshold range
μF
±5
IUVP threshold
IUVP threshold range
μF
-10
40
-10
Threshold
Threshold range
W
55
Load step 25-75-25% of
max IO, di/dt = 1.5 A/μs
CO=3x100 μF + 270 μF
VO = 3.3 V
Threshold
Threshold range
Unit
W
Hysteresis
Threshold, VOVLO
max
μF
Switching frequency
Fsw
typ
47
47
24
15
Turned off with CTRL-pin
VI = 0 V
VO = 0 V
VO = 3.3 V
VO = 5.0 V
Effective capacitance
Note 1
Total output capacitance
A
© Ericsson AB
0.25
Input standby power
Internal input capacitance
COUT
1/287 01-BMR 461 Uen A August 2013
0.70
0.70
0.71
0.80
0.92
CI
Internal output capacitance
6
Speciﬁcation
Reference
VO = 0.6 V
VO = 1.2 V
VO = 1.8 V
VO = 3.3 V
VO = 5.0 V
PCTRL
CO
Rev
2013-08-27
Conditions
Input idling
power
3 (13)
No.
Set value
PMBus configurable
IOUT_OC_FAULT_LIMIT
IOUT_OC_FAULT_RESPONSE
14.3
15.2
V
16
V
4.35
V
0-14.7
V
3.8
V
0-14.7
V
4.1
V
0-14.7
V
14.4
V
0-14.7
V
-150
150
Shutdown, make continuous restarts at 700
ms interval (hiccup)
85
mV
% VO
0-100
% VO
115
% VO
100-115
% VO
Shutdown, make continuous restarts at 700
ms interval (hiccup)
16
0-18
Shutdown, make continuous restarts at 700
ms interval (hiccup). Note 3.
A
A
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Characteristics
Over Temperature
Protection,
OTP
Over Temperature
Shutdown
(hardware controlled)
Date
OTP hysteresis
Fault response
OT_FAULT_RESPONSE
Threshold
Hysteresis
Accuracy
Note 4
OTP threshold range
Logic output low signal level
VOH
Logic output high signal level
IOL
IOH
VIL
VIH
IIL_CTRL
Logic output low sink current
Logic output high source current
Logic input low threshold
Logic input high threshold
Logic input low sink current
II_LEAK
Logic leakage current
fSMB
SMBus Operating frequency
TBUF
SMBus Bus free time
tset
thold
SMBus SDA setup time from SCL
SMBus SDA hold time from SCL
SMBus START/STOP condition
setup/hold time from SCL
SCL low period
SCL high period
Rev
SCL, SDA, SYNC, SALERT,
PG
Sink/source current = 4 mA
SCL, SDA, CTRL, SYNC
A
© Ericsson AB
min
Note 5
Delay duration range
Delay accuracy
Note 5
Ramp duration range
Ramp set resolution
Ramp set accuracy
Ramp time accuracy
Signal level
°C
2.8
4
4
0.8
0.5
mA
mA
V
V
mA
10
uA
2
µs
100
300
ns
ns
600
ns
1.3
0.6
µs
µs
TON_DELAY value sent
versus read-back
Actual delay duration versus
TON_DELAY read-back
VO = 0.6 V
VO = 1.2 – 3.3 V
VO = 5.0 V
kHz
1.3
PMBus configurable
TON_DELAY
PMBus configurable
TON_RISE
Varies with VO
TON_RISE value sent versus
read-back
Actual ramp duration versus
TON_RISE read-back
°C
°C
°C
V
400
Signal duration
Compensation
Calibration
-40…+120
V
23
ms
10
ms
1-145
ms
0.6
ms
±0.3
Ramp duration
Soft-start
Rise Time
(0-100% of VO)
°C
0.4
Delay set resolution
Delay set accuracy
Unit
°C
Delay duration
Soft-start
On Delay Time
max
15
Shutdown, make continuous restarts at 700
ms interval (hiccup)
150
20
±20
From VI > VUVLO to ready to be
enabled
Initialization time
typ
120
CTRL
SCL, SDA, SYNC, SALERT,
PG
STOP bit to START bit
See section SMBus – Timing
7
Speciﬁcation
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
Note 4
PMBus configurable
OT_FAULT_LIMIT
PMBus configurable
VOL
Tlow
Thigh
2/1301-BMR 461Technical
Uen
Conditions
OTP threshold
4 (13)
No.
ms
±0.8
ms
10
ms
1-(255 x ramp set resolution)
0.4
ms
1
ms
±0.5
ms
±10
µs
5
3.5
2.5
2
ms
% VO
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Characteristics
Power Good , PG
2/1301-BMR 461Technical
Uen
Date
Rev
A
© Ericsson AB
min
Rising
Falling
Tracking mode
See section Voltage Tracking
typ
max
Unit
90
85
% VO
% VO
450
mV
PG thresholds range
(Non-tracking only)
PMBus configurable
POWER_GOOD_ON
POWER_GOOD_OFF
PG delay
From VO reaching target to
PG assertion
11
ms
Enabled compensation
calibration (default)
Tracking mode
See section Voltage Tracking
20
ms
PG delay
From VO reaching PG rising
threshold to PG assertion
0
ms
Disabled compensation
calibration
Tracking mode
See section Voltage Tracking
20
ms
Tracking Input Voltage Range
CS_VTRK pin
Note 6
Tracking Accuracy
0
100
% VO
0
1.2
V
-100
100
mV
Input voltage
READ_VIN
Output voltage
READ_VOUT
Monitoring accuracy
8
Speciﬁcation
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
Conditions
PG threshold
5 (13)
No.
±3
% VI
±1
% VO
±8.5
% IO
±0.4
A
Output current
READ_IOUT
Note 7
TP1 = 0-95°C, VI = 4.5-14 V,
IO > 5 A
TP1 = 0-95°C, VI = 4.5-14 V,
IO < 5 A
Temperature
READ_
TEMPERATURE_1
Note 4
-5
5
°C
Duty cycle < 10%
-3
3
%
Duty cycle > 10%
-1
1
%
Duty cycle
READ_DUTY_CYCLE
±0.5
Note 1. Value refers to total (internal + external) effective output capacitance. Capacitance derating with VO typical for ceramic capacitors (bias characteristics) and
temperature variations must be considered for the external capacitor(s). See section External Output Capacitors.
Note 2. A switching frequency close to 475 kHz should not be used since this frequency represents a boundary of two operational modes of the product. There are
configuration changes to consider when changing the switching frequency, see section Switching Frequency.
Note 3. Severe overcurrent faults occurring with VO > 2.5V may result in a restart interval of 1200 ms instead of the configured value.
Note 4. Temperature measured internally at temperature position P3. See section Over Temperature Protection.
Note 5. Same specification applies for soft-stop and TOFF_DELAY/TOFF_FALL if enabled. The internal ramp and delay generators can only achieve certain discrete
timing values. A written TON/OFF_DELAY or TON/OFF_RISE value will be rounded to the closest achievable value, thus a command read-back provides the actual
set value. See section Soft-Start and Soft-Stop.
Note 6.Larger tracking input range is provided by external resistor divider, see section Voltage Tracking.
Note 7. At VO > 3.5V and VO / VI in the approximate range 55-70% there may be an additional current monitoring inaccuracy on the negative side up to -1 A.
E
Ericsson Internal
PRODUCT SPECIFICATION
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6 (13)
No.
2/1301-BMR 461Technical
Uen
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Date
Rev
9
Speciﬁcation
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
A
© Ericsson AB
Typical Characteristics, VO = 0.6 V
BMR 461 3001
Default Configuration, TP1 = +25°C
Efficiency
Power Dissipation
[%]
[W]
90
2.5
85
2.0
80
VI
VI
75
4.5 V
70
5V
65
4.5 V
1.5
5V
1.0
12 V
12 V
60
14 V
14 V
0.5
55
0.0
50
0
2
4
6
8
10
0
12 [A]
2
4
6
8
10
Efficiency vs. load current and input voltage.
Dissipated power vs. load current and input voltage.
Output Current Derating
Current Limit Characteristics
12 [A]
[V]
[A]
12
0.75
10
3.0 m/s
8
2.0 m/s
6
1.0 m/s
0.5 m/s
4
Nat. C onv.
2
0.60
VI
0.45
4.5 V
5V
0.30
12 V
14 V
0.15
0.00
0
85
90
95
100
105
[°C]
12
13
14
15
16
17 [A]
Available load current vs. ambient air temperature and airflow at
VI = 12 V. See section Thermal Consideration.
Output voltage vs. load current and input voltage.
Output Ripple and Noise
Transient Response
Fundamental output voltage ripple at VI = 12 V, CO = 3x100 µF, IO = 12 A.
Scale: 5 mV/div, 1 µs/div, 20 MHz bandwidth.
See section Output Ripple and Noise.
Output voltage response to load current step change (3–9–3 A) at
VI = 12 V, CO = 3x100 µF + 270 µF/10mΩ. Default compensation settings.
Scale: 50 mV/div, 5 A/div, 50 µs/div.
E
Ericsson Internal
PRODUCT SPECIFICATION
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7 (13)
No.
2/1301-BMR 461Technical
Uen
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Date
Rev
10
Speciﬁcation
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
A
© Ericsson AB
Typical Characteristics, VO = 1.2 V
BMR 461 3001
Default Configuration, TP1 = +25°C
Efficiency
Power Dissipation
[W]
[%]
2.5
95
90
2.0
85
VI
VI
4.5 V
1.5
80
4.5 V
75
5V
70
5V
1.0
12 V
12 V
65
14 V
14 V
0.5
60
0.0
55
0
2
4
6
8
10
0
12 [A]
2
4
6
8
10
Efficiency vs. load current and input voltage.
Dissipated power vs. load current and input voltage.
Output Current Derating
Current Limit Characteristics
[A]
12 [A]
[V]
12
1.50
10
3.0 m/s
8
2.0 m/s
6
1.0 m/s
0.5 m/s
4
Nat. C onv.
2
1.20
VI
0.90
4.5 V
5V
0.60
12 V
14 V
0.30
0.00
0
85
90
95
100
105 [°C]
12
13
14
15
16
17 [A]
Available load current vs. ambient air temperature and airflow at
VI = 12 V. See section Thermal Consideration.
Output voltage vs. load current and input voltage.
Output Ripple and Noise
Transient Response
Fundamental output voltage ripple at VI = 12 V, CO = 3x100 µF, IO = 12 A.
Scale: 5 mV/div, 1 µs/div, 20 MHz bandwidth.
See section Output Ripple and Noise.
Output voltage response to load current step change (3–9–3 A) at
VI = 12 V, CO = 3x100 µF + 270 µF/10mΩ. Default compensation settings.
Scale: 50 mV/div, 5 A/div, 50 µs/div.
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
8 (13)
No.
2/1301-BMR 461Technical
Uen
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Date
Rev
11
Speciﬁcation
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
A
© Ericsson AB
Typical Characteristics, VO = 1.8 V
BMR 461 3001
Default Configuration, TP1 = +25°C
Efficiency
Power Dissipation
[%]
[W]
100
2.5
95
2.0
90
VI
VI
85
4.5 V
80
4.5 V
1.5
5V
5V
75
12 V
70
14 V
1.0
12 V
14 V
0.5
65
60
0.0
0
2
4
6
8
10
0
12 [A]
2
4
6
8
10
Efficiency vs. load current and input voltage.
Dissipated power vs. load current and input voltage.
Output Current Derating
Current Limit Characteristics
[A]
12 [A]
[V]
12
2.0
10
3.0 m/s
8
2.0 m/s
6
1.0 m/s
0.5 m/s
4
Nat. C onv.
2
1.6
VI
1.2
4.5 V
5V
0.8
12 V
14 V
0.4
0.0
0
85
90
95
100
105 [°C]
12
13
14
15
16
17 [A]
Available load current vs. ambient air temperature and airflow at
VI = 12 V. See section Thermal Consideration.
Output voltage vs. load current and input voltage.
Output Ripple and Noise
Transient Response
Fundamental output voltage ripple at VI = 12 V, CO = 3x100 µF, IO = 12 A.
Scale: 5 mV/div, 1 µs/div, 20 MHz bandwidth.
See section Output Ripple and Noise.
Output voltage response to load current step change (3–9–3 A) at
VI = 12 V, CO = 3x100 µF + 270 µF/10mΩ. Default compensation settings.
Scale: 50 mV/div, 5 A/div, 50 µs/div.
E
Ericsson Internal
PRODUCT SPECIFICATION
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9 (13)
No.
2/1301-BMR 461Technical
Uen
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Date
Rev
12
Speciﬁcation
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
A
© Ericsson AB
Typical Characteristics, VO = 3.3 V
BMR 461 3001
Default Configuration, TP1 = +25°C
Efficiency
Power Dissipation
[W]
2.5
[%]
100
95
2.0
VI
VI
90
4.5 V
85
1.5
4.5 V
5V
5V
12 V
80
14 V
75
1.0
12 V
14 V
0.5
0.0
70
0
2
4
6
8
10
12 [A]
0
2
4
6
8
10
Efficiency vs. load current and input voltage.
Dissipated power vs. load current and input voltage.
Output Current Derating
Current Limit Characteristics
[A]
12 [A]
[V]
12
3.6
10
3.0 m/s
3.0
VI
8
2.0 m/s
2.4
6
1.0 m/s
1.8
5V
1.2
12 V
0.5 m/s
4
4.5 V
Nat. C onv.
14 V
0.6
2
0.0
0
85
90
95
100
105 [°C]
12
13
14
15
16
17 [A]
Available load current vs. ambient air temperature and airflow at
VI = 12 V. See section Thermal Consideration.
Output voltage vs. load current and input voltage.
Output Ripple and Noise
Transient Response
Fundamental output voltage ripple at VI = 12 V, CO = 3x100 µF, IO = 12 A.
Scale: 5 mV/div, 1 µs/div, 20 MHz bandwidth.
See section Output Ripple and Noise.
Output voltage response to load current step change (3–9–3 A) at
VI = 12 V, CO = 3x100 µF + 270 µF/10mΩ. Default compensation settings.
Scale: 50 mV/div, 5 A/div, 50 µs/div.
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
10 (13)
No.
2/1301-BMR 461Technical
Uen
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Date
Rev
13
Speciﬁcation
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
A
© Ericsson AB
Typical Characteristics, VO = 5.0 V
BMR 461 3001
Default Configuration, TP1 = +25°C
Efficiency
Power Dissipation
[%]
[W]
3.5
100
3.0
95
90
85
VI
2.5
VI
6V
2.0
6V
9.6 V
12 V
80
14 V
75
9.6 V
1.5
12 V
1.0
14 V
0.5
70
0.0
0
2
4
6
8
10
12 [A]
0
2
4
6
8
10
Efficiency vs. load current and input voltage.
Dissipated power vs. load current and input voltage.
Output Current Derating
Current Limit Characteristics
[A]
12 [A]
[V]
12
6.0
10
3.0 m/s
5.0
VI
8
2.0 m/s
4.0
6
1.0 m/s
3.0
9.6 V
2.0
12 V
0.5 m/s
4
6V
Nat. C onv.
14 V
1.0
2
0.0
0
80
85
90
95
100 [°C]
12
13
14
15
16
17 [A]
Available load current vs. ambient air temperature and airflow at
VI = 12 V. See section Thermal Consideration.
Output voltage vs. load current and input voltage.
Output Ripple and Noise
Transient Response
Fundamental output voltage ripple at VI = 12 V, CO = 3x100 µF, IO = 12 A.
Scale: 5 mV/div, 1 µs/div, 20 MHz bandwidth.
See section Output Ripple and Noise.
Output voltage response to load current step change (3–9–3 A) at
VI = 12 V, CO = 3x100 µF + 270 µF/10mΩ. Default compensation settings.
Scale: 50 mV/div, 5 A/div, 50 µs/div.
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
BMR461 series
EAB/FJB/GM
11 (13)
No.
Checked
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
2/1301-BMR 461Technical
Uen
Date
Rev
2013-08-27
Speciﬁcation
1/287 01-BMR 461 Uen A August 2013
A
© Ericsson AB
Typical Characteristics
BMR 461 3001
Default Configuration, TP1 = +25°C, VO = 3.3 V
Start-up by input source
Shut-down by input source
VI
VI
VO
VO
PG
PG
Start-up enabled by applying VI. TON_DELAY = TON_RISE = 10 ms (default).
VI = 12 V, IO = max IO, PG pulled up to VO.
Scale: 10 or 2 V/div, 10 ms/div.
Shut-down by removing VI.
VI = 12 V, IO = max IO, PG pulled up to VO.
Scale: 10 or 2 V/div, 1 ms/div.
Start-up by CTRL signal
Shutdown by CTRL signal
CTRL
CTRL
VO
VO
PG
PG
Start-up enabled by CTRL signal. TON_DELAY = TON_RISE = 10 ms (default).
VI = 12 V, IO = max IO, PG pulled up to VO.
Scale: 2 V/div, 10 ms/div.
14
Reference
Shut-down by CTRL signal.
VI = 12 V, IO = max IO, PG pulled up to VO.
Scale: 2 V/div, 1 ms/div.
E
Ericsson Internal
PRODUCT SPECIFICATION
1 (14)
No.
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
EMC Specification
Conducted EMI is measured according to the test set-up
below. The fundamental switching frequency is 600 kHz. VI =
12 V, VO = 3.3 V, IO = max IO.
Conducted EMI Input terminal value (typical for default
configuration).
30/1301-BMR 461
Uen
Technical
Date
Rev
2013-08-27
15
Speciﬁcation
Reference
1/287 01-BMR 461 Uen A August 2013
A
© Ericsson AB
Output Ripple and Noise
Output ripple and noise is measured according to figure below.
A 50 mm conductor works as a small inductor forming together
with the two capacitances a damped filter.
Vout
+S
co
50 mm conductor
Tantalum
Capacitor
10 µF
Ceramic
Capacitor
0.1 µF
−S
GND
Load
Prepared (also subject responsible if other)
50 mm conductor
BNC-contact to
oscilloscope
Output ripple and noise test set-up.
EMI without filter.
To spectrum
analyzer
RF Current probe
1kHz – 50MHz
Battery
supply
The digital compensation of the product is designed to
automatically provide stability, accurate line and load regulation
and good transient performance for a wide range of operating
conditions (switching frequency, input voltage, output voltage,
output capacitance). Inherent from the implementation and
normal to the product there will be some low-frequency noise
or wander at the output, in addition to the fundamental
switching frequency output ripple. The total output ripple and
noise is maintained at a low level.
Resistive
load
DUT
C1
50mm
C1 = 10uF / 600VDC
Feed- Thru RF capacitor
800mm
200mm
VI=12 V, VO=3.3 V, IO=12 A, CO=3x100 µF,10 mV/div, 50 µs/div
Example of low frequency noise at the output.
Test set-up conducted emission, power lead
Layout Recommendations
The radiated EMI performance of the product will depend on
the PWB layout and ground layer design. It is also important to
consider the stand-off of the product. If a ground layer is used,
it should be connected to the output of the product and the
equipment ground or chassis.
A ground layer will increase the stray capacitance in the PWB
and improve the high frequency EMC performance.
E
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PRODUCT SPECIFICATION
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EAB/FJB/GM QLAANDR
Approved
BMR461 series
EAB/FJB/GM
2 (14)
No.
Checked
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Operating Information
Power Management Overview
This product is equipped with a PMBus interface. The product
incorporates a wide range of readable and configurable power
management features that are simple to implement
with a minimum of external components. Additionally, the
product includes protection features that continuously
safeguard the load from damage due to unexpected system
faults. A fault is also shown as an alert on the SALERT pin.
The product is delivered with a default configuration suitable for
a wide range operation in terms of input voltage, output
voltage, and load. The configuration is stored in an internal
Non-Volatile Memory (NVM). All power management functions
can be reconfigured using the PMBus interface. Please contact
your local Ericsson Power Modules representative for design
support of custom configurations or appropriate SW tools for
design and download of your own configurations.
Input Under Voltage Lockout, UVLO
The product provides a non-configurable under voltage lockout
(UVLO) circuit that monitors the internal supply of the
converter. Below a certain input voltage level the internal
supply will be too low for proper operation and the product will
be in under voltage lockout, not switching or responding to the
CTRL pin or to PMBus commands.
Input Over Voltage Lockout, OVLO
The product provides a non-configurable over voltage lockout
(OVLO) circuit that will shut down the product when the input
voltage rises above a certain level. The product will not switch,
respond to the CTRL pin or to PMBus commands when being
in over voltage lockout.
Input Turn-On and Turn-Off Voltage
The product monitors the input voltage and will turn-on and
turn-off the output at configured levels (assuming the product
is enabled by CTRL pin or PMBus). The default turn-on input
voltage level is 4.35 V whereas the corresponding turn-off input
voltage level is 3.8 V. The turn-on and turn-off levels may be
reconfigured using the PMBus commands VIN_ON and
VIN_OFF.
Input Under Voltage Protection (IUVP)
The product monitors the input voltage continously and will
respond as configured when the input voltage falls below the
configured threshold level. The product can respond in a
number of ways as follows:
30/1301-BMR 461
Uen
Technical
Date
Rev
2013-08-27
Speciﬁcation
16
Reference
1/287 01-BMR 461 Uen A August 2013
A
© Ericsson AB
1.
Continue operating without interruption.
2.
Continue operating for a given delay period, followed by
an output voltage shutdown if the fault still exists.
3.
Immediate and definite shutdown of output voltage until
the fault is cleared by PMBus or the output voltage is reenabled.
4.
Immediate shutdown of output voltage while the fault is
present. Operation resumes and the output is enabled
when the fault condition no longer exists.
The default response is 4. The IUVP function can be
reconfigured using the PMBus commands
VIN_UV_FAULT_LIMIT and VIN_UV_FAULT_RESPONSE.
Input Over Voltage Protection (IOVP)
The product monitors the input voltage continously and will
respond as configured when the input voltage rises above the
configured threshold level. Refer to section “Input Under
Voltage Protection” for response configuration options and
default setting.
Input and Output Impedance
The impedance of both the input source and the load will
interact with the impedance of the product. It is important that
the input source has low characteristic impedance. If the input
voltage source contains significant inductance, the addition of a
capacitor with low ESR at the input of the product will ensure
stable operation.
External Input Capacitors
The input ripple RMS current in a buck converter can be
estimated to
Eq. 1.
I inputRMS = I load D(1 − D ) ,
where I load is the output load current and D is the duty cycle.
The maximum load ripple current becomes I load 2 . The ripple
current is divided into three parts, i.e., currents in the input
source, external input capacitor, and internal input capacitor.
How the current is divided depends on the impedance of the
input source, ESR and capacitance values in the capacitors.
For most applications non-tantalum capacitors are preferred
due to the robustness of such capacitors to accommodate high
inrush currents of systems being powered from very low
impedance sources. It is recommended to use a combination
of ceramic capacitors and low-ESR electrolytic/polymer bulk
capacitors. The low ESR of ceramic capacitors effectively limits
the input ripple voltage level, while the bulk capacitance
minimizes deviations in the input voltage at large load
transients.
It is recommended to use at least 47 uF of ceramic input
capacitance. At duty cycles between 25% and 75% where the
input ripple current increases (see Eq. 1), additional ceramic
capacitance will help to keep the input ripple voltage low. The
E
Ericsson Internal
PRODUCT SPECIFICATION
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EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
required bulk capacitance depends on the impedance of the
input source and the load transient levels at the output. In
general a low-ESR bulk capacitor of at least 150 uF is
recommended. The larger the duty cycle is, the larger impact
an output load step will have on the input side, thus the larger
bulk capacitance is required to limit the input voltage deviation.
If several products are connected in a phase spreading setup
the amount of input capacitance per product can be reduced.
Input Capacitors must be placed closely and with low
impedance connections to the VIN and GND pins in order to be
effective.
30/1301-BMR 461
Uen
Technical
Date
Rev
External Output Capacitors
The output capacitor requirement depends on two
considerations; output ripple voltage and load transient
response. To achieve low ripple voltage, the output capacitor
bank must have a low ESR value, which is achieved with
ceramic output capacitors. A small output voltage deviation
during load transients is achieved by using a larger amount of
capacitance. Designs with little load transients can use fewer
capacitors and designs with more dynamic load content will
require more load capacitors to achieve a small output
deviation. Improved transient response can also be achieved
by adjusting the settings of the control loop of the product (see
section Compensation Implementation).
It is recommended to locate low ESR ceramic and low ESR
electrolytic/polymer capacitors as close to the load as possible,
using several capacitors in parallel to lower the effective ESR.
It is important to use low resistance and low inductance PCB
layouts and cabling in order for capacitance to be effective.
The control loop of the product is optimized to operate with
low-ESR output capacitors and is capable of achieving a fast
loop transient response with a reduced amount of capacitance.
The effective output capacitance is recommended to be in the
range [COUT_low, COUT_high] according to equations Eq. 2 and Eq.
3 below. The compensation implementation of the product is
optimized for this range.
C OUT _ low =
Eq. 3.
C OUT _ high =
2.6 ⋅ 10 7
(FSW )2
16 ⋅ 10 7
(FSW )2
The product permits a large range of output capacitance, thus
capacitance above COUT_high is acceptable. This capability is
important in applications where the output capacitance may be
unknown or not well controlled or in applications where large
amount of output capacitance is required. The limit of COUT_low
must be followed in order to guarantee stability.
Speciﬁcation
17
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
A
© Ericsson AB
10000
[μF]
Permissible
1000
Recommended
100
UNSTABLE
[kHz]
10
300
Eq. 2.
3 (14)
No.
400
500
600
700
800
900
1000
Effective total output capacitance limits vs switching frequency.
Note that Eq. 2 and Eq. 3 and the chart above refer to the total
capacitance at the output, thus including both the capacitance
internal to the product and the external capacitance applied in
the application. The internal output capacitance is listed in the
Electrical Characteristics table.
Note also that Eq. 2 and Eq. 3 and the chart refers to the
effective capacitance, not taking into account the capacitance
derating that applies for ceramic capacitors with increased
voltage or temperature variations.
Dynamic Loop Compensation (DLC)
The typical design of regulated power converters includes a
control function with a feedback loop that can be closed using
either analog or digital circuits. The feedback loop is required
to provide a stable output voltage, but should be optimized for
the output filter to maintain output voltage regulation during
transient conditions such as sudden changes in output current
and/or input voltage. Digitally controlled converters allow one to
optimize loop parameters without the need to change
components on the board, however, optimization can still be
challenging because the key parameters of the output filter
include parasitic impedances in the PCB and the often
distributed filter components themselves.
Dynamic Loop Compensation has been developed to solve the
problem of compensation for a converter with a difficult to
define output filter. This task is achieved by utilization of
algorithms that can characterize an arbitrary output filter based
on behavior of the output voltage in response to a disturbance
initiated by the algorithm, or occurring due to the changes in
operating conditions, and automatically adjust feedback loop
parameters to match the output filter.
Details of the algorithm that is used to characterize an output
filter and the different operational modes can be found in the
following sections.
E
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PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
BMR461 series
EAB/FJB/GM
4 (14)
No.
Checked
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Compensation Implementation
Unlike PID-based digital power regulators the product uses a
state-space model based algorithm that is valid for both the
small- and large-signal response and accounts for duty-cycle
saturation effects. This eliminates the need for users to
determine and set thresholds for transitioning from linear to
nonlinear modes. These capabilities result in fast loop transient
response and the possibility of reducing the number of output
capacitors.
30/1301-BMR 461
Uen
Technical
Date
Rev
18
Speciﬁcation
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
A
© Ericsson AB
4.
Calibration is disabled (ADAPTIVE_MODE = 0x004B). The
default FLC stored in bits 15:0 in COMP_MODEL will be
applied.
5.
Calibration is performed continuously in response to a
PMBus command. Controlled by setting/clearing bit 8 in
ADAPTIVE_MODE during operation.
By setting bit 2 in ADAPTIVE_MODE a STORE_USER_ALL
command will automatically be performed after the next
calibration, effectively storing the measured FLC value in
COMP_MODEL 15:0 as the default FLC value for subsequent
ramp-ups.
During ramp-up of output voltage, robust and low bandwidth
default compensation settings are used based on the default
FLC value assigned by bits 15:0 in command COMP_MODEL. If
Compensation may be set more or less aggressive by
the switching frequency is changed the default FLC should be
adjusting the feedback gain factor, controlled by the PMBus
adjusted according to Eq. 4 to maintain robust settings. Note
command FEEDBACK_EFFORT. This parameter is
that it is possible to set any default FLC.
proportional to the open loop gain of the system. Increasing the
gain, i.e the control effort, will reduce the voltage deviation at
F
Eq. 4.
load transients, at the expense of somewhat increased jitter
FLC _ DEFAULT = SW
32
and noise on the output. Users also have access to the PMBus
command ZETAP, which corresponds to the damping ratio of
Immediately after ramp-up a compensation calibration is
the closed loop system.
performed by applying an AC low amplitude measurement
By default the product uses 0.5 as the feedback gain factor and
signal on the output. During calibration the resonant frequency 1.5 for damping ratio, to target a system bandwidth of 10% of
FLC of the power stage is measured and from the result an
the switching frequency.
internal non-linear model is constructed to optimize the
In some operating conditions at low output voltages, it is
bandwidth and transient response of the product. Pole
possible to enhance the recovery time at load release by
locations of the closed system are automatically selected
enabling Negative Duty Cycle by PMBus command
based on switching frequency, measured FLC and the output
LOOP_CONFIG.
voltage level. After each performed calibration the user may
read out the measured FLC frequency from bits 15:0 in the
Below graphs exemplify the impact on load transient
COMP_MODEL command.
performance when adjusting the feedback gain factor, the
damping ratio and the Negative Duty Cycle feature.
Output
Voltage
[mV]
70
Compensation calibration
60
50
40
Time
By the PMBus command ADAPTIVE_MODE the user may
select between several different modes of compensation
calibration:
1.
Calibration is performed once after each ramp-up (default).
(ADAPTIVE_MODE = 0x024B).
2.
Calibration is performed once after first ramp-up after input
voltage is applied (ADAPTIVE_MODE = 0x124B).
3.
Calibration is performed continuously after ramp-up at
~800 ms interval (ADAPTIVE_MODE = 0x034B).
30
20
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
FEEDBACK_EFFORT
CO=3x100µF+270µF/10mΩ
CO=3 x1 00µF
VI=12 V, VO=1.2 V, load step 3-9-3 A,1 A/us.
Voltage deviation vs. FEEDBACK_EFFORT setting.
1.0
E
Ericsson Internal
PRODUCT SPECIFICATION
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5 (14)
No.
30/1301-BMR 461
Uen
Technical
EAB/FJB/GM QLAANDR
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Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Date
Rev
Speciﬁcation
19
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
A
© Ericsson AB
Remote Control
[us]
30.0
Vext
27.0
CTRL
24.0
21.0
GND
18.0
15.0
1.8
1.7
1.6
1.5
1.4
ZETAP
1.3
1.2
1.1
1.0
VI=12 V, VO=1.2 V, CO = 3x100 µF + 270µF/10mΩ, load step 3-9-3 A,1 A/us.
Recovery time to within 1% of VO vs. ZETAP setting.
Disabled
Enabled
The product is equipped with a
remote control function, i.e.,
the CTRL pin. The remote
control can be connected to
either the primary negative
input connection (GND) or an
external voltage (Vext). See
Absolute Maximum Rating for
maximum voltage level
allowed at the CTRL pin.
The CTRL function allows the product to be turned on/off by an
external device like a semiconductor or mechanical switch.
The CTRL pin has an internal 6.8 kΩ pull-up resistor to 3.3 V.
The external device must provide a minimum required sink
current to guarantee a voltage not higher than the logic low
threshold level (see Electrical Characteristics). When the CTRL
pin is left open, the voltage generated on the CTRL pin is 3.3
V.
By default the product provides “positive logic” RC and will turn
on when the CTRL pin is left open and turn off when the CTRL
pin is applied to GND. It is possible to configure “negative
logic” instead by using the PMBus command
ON_OFF_CONFIG.
If the device is to be synchronized to an external clock source,
the clock frequency must be stable prior to asserting the CTRL
pin.
Output Voltage Adjust using Pin-strap Resistor
VI=12 V, VO=0.6 V, CO = 3x100 µF + 270µF/10mΩ, load step 3-9-3 A,1 A/us.
FEEDBACK_EFFORT = 0.8, ZETAP = 1.5.
Scale: 20 mV/div, 5 A/div, 10 µs/div.
Load release response at enabled/disabled Negative Duty
Cycle at low output voltage.
VSET
RSET
PREF
Remote Sense
The product has remote sense that can be used to
compensate for voltage drops between the output and the point
of load. The sense traces should be located close to the PWB
ground layer to reduce noise susceptibility. Due to derating of
internal output capacitance the voltage drop should be kept
below VDROPMAX = (5.25 – VOUT) / 2. A large voltage drop will
impact the electrical performance of the regulator. If the remote
sense is not needed +S must be connected to VOUT and −S
must be connected to GND.
Output Voltage Control
To control the output voltage the product features both a
remote control input through the CTRL pin and a PMBus
enable function by the command OPERATION. It is also
possible to configure the output to be always on.
By default the output is controlled by the CTRL pin only. The
output voltage control can be reconfigured using the PMBus
command ON_OFF_CONFIG.
Using an external Pin-strap
resistor, RSET, the output voltage
can be set in the range 0.6 V to
5.0 V at 16 different levels
shown in the table below. The
resistor should be applied
between the VSET pin and the
PREF pin.
RSET also sets the maximum output voltage; see section
“Output Voltage Range Limitation”. The resistor is sensed only
at the application of input voltage. Changing the resistor value
during normal operation will not change the output voltage. The
input voltage must be at least 1 V larger than the output
voltage in order to deliver the correct output voltage. See
Ordering Information for output voltage range.
The following table shows recommended resistor values for
RSET. Maximum 1% tolerance resistors are required.
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
6 (14)
No.
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
30/1301-BMR 461
Uen
Technical
Date
Rev
2013-08-27
Speciﬁcation
20
Reference
1/287 01-BMR 461 Uen A August 2013
A
© Ericsson AB
RSET[kΩ]
VOUT [V]
0.60
5.11
1.05
17.8
nominal output voltage. The product can be configured to
respond in different ways to the output voltage exceeding the
OVP limit:
0.70
6.19
1.10
21.5
1.
Continue operating without interruption.
0.75
7.15
1.20
26.1
2.
0.80
8.25
1.50
31.6
Continue operating for a given delay period, followed by
an output voltage shutdown if the fault still exists.
0.85
9.53
1.80
38.3
3.
0.90
11.0
2.50
44.2
0.95
12.7
3.30
51.1
Immediate and definite shutdown of output voltage until
the fault is cleared by PMBus or the output voltage is reenabled.
1.00
14.7
5.00
59.0
4.
Immediate shutdown of output voltage while the fault is
present. Operation resumes and the output is enabled
when the fault condition no longer exists.
VOUT [V]
RSET[kΩ]
Leaving VSET open will produce an output voltage of 0 V.
Using an RSET ≤ 4.22 kΩ will put the product in track mode, see
section Voltage Tracking.
The default response is 4. The OVP limit and fault response
can be reconfigured using the PMBus commands
VOUT_OV_FAULT_LIMIT and
VOUT_OV_FAULT_RESPONSE.
Output Voltage Adjust using PMBus
The output voltage set by pin-strap can be overridden using the Output Under Voltage Protection (UVP)
PMBus command VOUT_COMMAND. See Electrical
The product includes output under voltage limiting circuitry for
Specification for adjustment range.
protection of the load. The default UVP limit is 15% below the
nominal output voltage. Refer to section “Output Over Voltage
Voltage Margining Up/Down
Protection” for response configuration options and default
Using the PMBus interface it is possible to adjust the output
setting.
higher or lower than its nominal voltage setting in order to
determine whether the load device is capable of operating over Power Good
its specified supply voltage range. This provides a convenient
PG (Power Good) is an active high open drain output used to
method for dynamically testing the operation of the load circuit
indicate when the product is ready to provide regulated output
over its supply margin or range. It can also be used to verify
voltage to the load. During startup and during a fault condition,
the function of supply voltage supervisors. Margin limits of the
PG is held low.
nominal output voltage ±5% are default, but the margin limits
By default, PG is asserted high after the output has ramped to
can be reconfigured using the PMBus commands
a voltage above 90% of the nominal voltage and a successful
VOUT_MARGIN_LOW, VOUT_MARGIN_HIGH. Margining is
compensation calibration has completed.
activated by the command OPERATION.
By default, PG is deasserted if the output voltage falls below
85% of the nominal voltage. These limits may be changed
Output Voltage Trim
using the PMBus commands POWER_GOOD_ON and
POWER_GOOD_OFF.
The actual output voltage can be trimmed to optimize
The PG output is not defined during ramp up of the input
performance of a specific load by setting a non-zero value for
voltage due to the initialization of the product.
PMBus command VOUT_TRIM. The value of VOUT_TRIM is
summed with VOUT_COMMAND, allowing for multiple
products to be commanded to a common nominal value, but
Over Current Protection (OCP)
with slight adjustments per load.
The product includes robust current limiting circuitry for
protection at continuous overload. After ramp-up is complete
Output Voltage Range Limitation
the product can detect an output overload/short condition. The
The output voltage is by default limited to the least of 5.5 V and following OCP response options are available:
110% of the nominal output voltage, where the nominal output
1. Continue operating without interruption (this could result in
voltage is defined by pin-strap or by VOUT_COMMAND in
permanent damage to the product).
Non-Volatile Memory (see section Initialization Procedure).
This protects the load from an over voltage due to an
2. Immediate and definite shutdown of output voltage until
accidentally written wrong VOUT_COMMAND. The limitation
the fault is cleared by PMBus or the output voltage is reapplies to the regulated output voltage, rather than the internal
enabled.
value of VOUT_COMMAND. The output voltage limit can be
3. Immediate shutdown of output voltage followed by
reconfigured using the PMBus command VOUT_MAX.
continous restart attempts of the output voltage with a
preset interval (“hiccup” mode).
Output Over Voltage Protection (OVP)
The product includes over voltage limiting circuitry for
protection of the load. The default OVP limit is 15% above the
The default response from an over current fault is 3. Note that
delayed shutdown is not supported. The load distribution
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
BMR461 series
EAB/FJB/GM
7 (14)
No.
Checked
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
should be designed for the maximum output short circuit
current specified. The OCP limit and response can be
reconfigured using the PMBus commands
IOUT_OC_FAULT_LIMIT and
IOUT_OC_FAULT_RESPONSE.
Switching Frequency
The default switching frequency yields optimal performance.
The switching frequency can be re-configured in a certain
range using the PMBus command FREQUENCY_SWITCH.
Refer to Electrical Specification for default switching frequency
and range.
If changing the switching frequency more than +/-10% from the
default value, the following should be considered to maintain
reliable operation:
•
The default FLC value in COMP_MODEL should be
adjusted, see section Compensation Implementation.
•
Adjustment of the fixedDTR and fixedDTF values in
DEADTIME_GCTRL may be required, for higher switching
frequencies in particular.
Changing the switching frequency will affect efficiency/power
dissipation, load transient response and output ripple.
Synchronization
The product may be synchronized with an external clock to
eliminate beat noise on the input and output voltage lines by
connecting the clock source to the SYNC pin. Synchronization
can also be utilized for phase spreading, described in section
Phase Spreading.
The clock frequency of the external clock source must be
stable prior to enabling the output voltage. Further, the PMBus
command FREQUENCY_SWITCH must be set to a value
close to the frequency of the external clock prior to enabling
the output voltage, in order to set the internal controller in
proper operational mode.
The product automatically checks for a clock signal on the
SYNC pin when input power is applied and when the output is
enabled. If no incoming clock signal is present, the product will
use the internal oscillator at the configued switching frequency.
In the event of a loss of the external clock signal during normal
operation, the product will automatically switch to the internal
oscillator and switch at a frequency close to the original SYNC
input frequency.
Phase Spreading
When multiple products share a common DC input supply,
spreading of the switching clock phase between the products
can be utilized. This dramatically reduces input capacitance
requirements and efficiency losses, since the peak current
drawn from the input supply is effectively spread out over the
whole switch period. This requires that the products are
synchronized.
30/1301-BMR 461
Uen
Technical
Date
Rev
2013-08-27
Speciﬁcation
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Reference
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A
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The phase offset is measured from the rising edge of the
applied external clock to the center of the PWM pulse as
illustrated below.
SYNC
clock
Phase offset = 120°
PWM pulse
(VO/VI = 0.33)
Illustration of phase offset.
By default the phase offset is controlled by the defined PMBus
address (see section PMBus Interface) according to the table
below. This provides a way to configure phase spreading with
up to eight different phase positions without using a PMBus
command.
Set PMBus address
Phase offset
xxxx000b
0°
xxxx001b
60°
xxxx010b
120°
xxxx011b
180°
xxxx100b
240°
xxxx101b
300°
xxxx110b
90°
xxxx111b
270°
The default phase offset can be overridden by using the
standard PMBus command INTERLEAVE. The phase offset
can then be defined as
Phase _ offset (°) = 360° ×
Interleave _ order
Number _ in _ group
Interleave_order is in the range 0-15. Number_in_group is in
the range 0-15 where a value of 0 means 16. The set
resolution for the phase offset is 360° / 128 ≈ 2.8°.
Giving the PMBus command INTERLEAVE a value of 0x0000
will revert back to the default address controlled phase offset.
Ericsson provides software tools for convenient configuration of
optimized phase spreading, allowing the amount of input
capacitance to be significantly reduced.
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
8 (14)
No.
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
30/1301-BMR 461
Uen
Technical
Date
Rev
2013-08-27
Speciﬁcation
22
Reference
1/287 01-BMR 461 Uen A August 2013
A
© Ericsson AB
Initialization Procedure
The product follows an internal initialization procedure after
power is applied to the VIN pin (refer to figure below):
Vout related PMBus
command
Loaded value unless explicitly
written + stored to User NVM.
POWER_GOOD_ON
0.90 x loaded Vout level
1. Self test and memory check.
POWER_GOOD_OFF
0.85 x loaded Vout level
2. The address pin-strap resistors are measured and the
associated PMBus address is defined.
VOUT_MAX
1.10 x loaded Vout level
VOUT_MARGIN_HIGH
1.05 x loaded Vout level
3. The output voltage pin-strap resistor is measured. The
associated output voltage level will be loaded into
operational RAM memory, unless an overriding PMBus
command VOUT_COMMAND has been explicitly written
and stored in the User Non-Volatile Memory (indicated by
bit 0 in command STRAP_DISABLE).
VOUT_MARGIN_LOW
0.95 x loaded Vout level
VOUT_OV_FAULT_LIMIT 1.15 x loaded Vout level
VOUT_UV_FAULT_LIMIT
0.85 x loaded Vout level
Soft-start and Soft-stop
The soft-start and soft-stop control functionality allows the
output voltage to ramp-up and ramp-down with defined timing
with respect to the control of the output. This can be used to
control inrush current and manage supply sequencing of
multiple controllers.
The rise time is the time taken for the output to ramp to its
target voltage while the fall time is the time taken for the output
5. Check for external clock signal at the SYNC pin and wait
to ramp down from its regulation voltage to less than 10% of
for lock if used.
that value. The on delay time sets a delay from when the
Once this procedure is completed and the initialization time has output is enabled until the output voltage starts to ramp up. The
off delay time sets a delay from when the output is disabled
passed (see Electrical Specification), the output voltage is
until the output voltage starts to ramp down.
ready to be enabled and the PMBus interface can be used.
4. Values stored in the User Non-Volatile Memory (NVM) are
loaded into operational RAM memory. For PMBus
commands listed in the table below, loaded values will be
based on the output voltage level loaded in step 3 above,
unless the commands have been explicitly written and
stored in the User NVM.
Output
control
Pin-strap
VOUTRSET
NO
STRAP_DISABLE[0]=1?
RAM
On
delay
time
VOUT_COMMAND
YES
Rise
time
Off
delay
time
Fall
time
User NVM
VOUT_COMMAND
READ
VOUT
WRITE
PMBus Interface
VOUT_COMMAND
STRAP_DISABLE[0]=1
Loading of nominal output voltage level.
Illustration of Soft-Start and Soft-Stop
Soft-stop is disabled by default but may be enabled through the
PMBus command ON_OFF_CONFIG. The delay and ramp
times can be reconfigured using the PMBus commands
TON_DELAY, TON_RISE, TOFF_DELAY and TOFF_FALL.
Note the following implications of the initialization procedure:
•
If the RSET pin-strap resistance is changed, input voltage
will have to be cycled before the output voltage level is
affected.
•
If VOUT_COMMAND is changed and stored to User NVM,
input voltage will have to be cycled before the output
voltage related commands in the table below are re-scaled
according to the new output voltage level.
See section PMBus Interface for more information about the
Non-Volatile Memories (NVM) of the product.
The internal delay generator can only achieve certain discrete
timing values. A written TON_DELAY/TOFF_DELAY value will
be rounded to the closest achievable value, thus a
TON_DELAY/OFF_DELAY read will provide the actual set
value.
The internal ramp generator can only achieve certain discrete
timing values for a given combination of switch frequency,
output voltage level, set ramp time and trim data. These values
are close, but not exactly the same, when any of the relevant
parameters are altered. A written TON_RISE/TOFF_FALL
value will be rounded to the closest achievable value, thus a
TON_RISE/TOFF_FALL read will provide the actual set value.
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
9 (14)
No.
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Refer to Electrical Specification for default on delay time and
rise time and the configurability ranges and resolutions. The
specification provided for soft-start applies also for soft-stop, if
enabled.
Output Voltage Sequencing
A group of products may be configured to power up in a
predetermined sequence. This feature is especially useful
when powering advanced processors, FPGAs, and ASICs that
require one supply to reach its operating voltage prior to
another. Multi-product sequencing can be achieved by
configuring the start delay and rise time of each device through
the PMBus interface and by connecting the CTRL pin of each
product to a common enable signal.
30/1301-BMR 461
Uen
Technical
Date
Rev
Speciﬁcation
23
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
A
© Ericsson AB
Voltage Tracking
The product supports tracking of the output from a master
voltage applied to the CS_VTRK pin. To select the tracking
mode, a resistance ≤ 4.22 kΩ must be connected between the
VSET and PREF pins.
The tracking ratio used is controlled by an internal feedback
divider RDIV and an external resistive voltage divider (R1, R2)
which is placed from the supply being tracked to the PREF pin.
VTRACK
(MASTER)
BMR 461
R2
CS_VTRK RDIV
Voltage
VOUT
(SLAVE)
VSET
R1
VOUT
RSET
VOUT1
PREF
VOUT2
GND
RSET ≤ 4.22 kΩ
Tracking Mode Configuration
Time
In tracking mode the output voltage is regulated to the lower of:
Illustration of Output Voltage Sequencing.
VOUT =
Eq. 5
Pre-Bias Startup Capability
Pre-bias startup often occurs in complex digital systems when
current from another power source is fed back through a dualsupply logic component, such as FPGAs or ASICs. The
product incorporates synchronous rectifiers, but will not sink
current during startup, or turn off, or whenever a fault shuts
down the product in a pre-bias condition.
When the output is enabled the product checks the output for
the presence of pre-bias voltage. If the pre-bias voltage is
above the output overvoltage threshold the product will not
attempt soft-start. If the pre-bias voltage is less than 200 mV
the soft-start is performed assuming no pre-bias. If the pre-bias
voltage is above 200 mV but below target output voltage, the
product ramps up the output voltage from the pre-bias voltage
to the target regulation as shown in the figure below.
Voltage
Soft-start
ramp time
VTRACK
R1
×
RDIV R1 + R 2
or the output voltage defined by the PMBus command
VOUT_COMMAND.
RDIV is automatically selected based on the value of
VOUT_COMMAND as shown in the table below. If
VOUT_COMMAND is not defined by the user, it will default to
5.25 V with RDIV= 0.20272.
VOUT_COMMAND [V]
< 0.99
0.99547
0.99 to < 1.12
0.88222
1.12 to < 1.28
0.76897
1.28 to < 1.50
0.65572
1.50 to < 1.82
0.54247
1.82 to < 2.29
0.42922
2.29 to < 3.12
0.31597
3.12 to < 5.25
0.20272
VOUT_COMMAND not user
defined => 5.25
Time
Illustration of Pre-Bias Startup
RDIV
0.20272
For best tracking accuracy it is recommended that once the
product is powered up, the VOUT_COMMAND should not be
changed so as to cause a change to the operational RDIV. If
such a change in VOUT_COMMAND is required, the user
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
should save the new value to User Non-Volatile Memory (using
STORE_USER_ALL command) and recycle the input voltage
to set a new RDIV operational value.
To simplify resistor selection it is recommended to fix R1 at 10
kΩ and use the following equation to determine R2:
Eq. 6
10 (14)
No.

 VTRACK
R 2(kΩ) = R1 × 
− 1

 RDIV × VOUT
30/1301-BMR 461
Uen
Technical
Date
Rev
24
Speciﬁcation
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
A
© Ericsson AB
Voltage
R1 / (R1 + R2) < RDIV
VT RACK
VTRACK
R1
×
RDIV R1 + R 2
V OUT
Time
R2 must be chosen so that the CS_VTRK input does not
exceed 1.2 V.
As seen in Eq. 5, if the resistor-divider ratio from R1//R2 is
chosen such that it is equal to the operational RDIV, the output
voltage follows the tracking voltage coincidentally. For all other
cases, the output voltage follows a ratiometric tracking. These
two modes of tracking are further described below.
1. Coincident tracking. Output voltage is ramped at the same
rate as the VTRACK voltage. To achieve coincident tracking
the desired output voltage should be set by the PMBus
command VOUT_COMMAND. R2 should be set so that R2
= R1 / RDIV – R1. The output will stop ramping when the
VOUT_COMMAND level is reached.
Voltage
R1 / (R1 + R2) = RDIV
VTRACK
VOUT_
COMMAND
Ratiometric Voltage Tracking
Example:
External VTRACK = 3.3 V
Target VOUT = 1.3 V
VOUT_COMMAND not set => RDIV = 0.20272
R1 = 10 kΩ
Eq. 6 =>


3.3
R 2 = 10 × 
− 1 = 115kΩ
 0.20272 × 1.3



During voltage tracking compensation calibration is triggered
when the output voltage is above 450 mV and stable within a
100 mV window for two consecutive measurements at 10 ms
intervals. When calibration is complete, the power good (PG)
output is asserted. The PG output remains asserted until the
output voltage falls below 450 mV, as verified at 10 ms
intervals. For this reason, the PG output may remain high for
as much as 10 ms after the output voltage has fallen below 450
mV.
VOUT
Time
Coincident Voltage Tracking
Example:
External VTRACK = 3.3 V
Target VOUT = 1.85 V
R1 = 10 kΩ
VOUT_COMMAND = 1.85 V => RDIV = 0.42922
R2 = 10 / 0.42922 – 10 = 13.3 kΩ
2. Ratiomatric tracking. Output voltage is ramped at a rate
that is a percentage of the VTRACK voltage. To achieve
ratiometric tracking, R2 should be set according to Eq. 6
with VOUT being the desired output voltage. The PMBus
command VOUT_COMMAND should be set equal to or
higher than the output voltage given by Eq. 5, or not being
set at all giving the default VOUT_COMMAND value 5.25
V. Since the target voltage level is decided by the R1//R2
divider there will be a small regulation inaccuracy due to
the tolerance of the resistors. Note also that VOUT will be
higher than VTRACK if R1 / (R1 + R2) > RDIV.
When voltage tracking is enabled the output over voltage
protection limit is set 12% above VOUT_COMMAND as
default. This limit may be reconfigured using the PMBus
command VOUT_OV_FAULT_LIMIT. Output under voltage
protection is not functional in tracking mode.
Soft-start parameters TON_DELAY and TON_RISE are not
functional in tracking mode and will be set to their minimum
values to prevent interference with tracking. TOFF_DELAY and
TOFF_FALL can be used if soft-stop is enabled. In such case
the output voltage will follow the least of the output levels given
by the soft-stop parameters and the tracking equations.
E
Ericsson Internal
PRODUCT SPECIFICATION
Prepared (also subject responsible if other)
11 (14)
No.
EAB/FJB/GM QLAANDR
Approved
Checked
BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
30/1301-BMR 461
Uen
Technical
Date
Rev
2013-08-27
Speciﬁcation
25
Reference
1/287 01-BMR 461 Uen A August 2013
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© Ericsson AB
Thermal Consideration
Definition of Reference Temperature TP1
The reference temperature is used to monitor the temperature
General
limits of the product. Temperature above maximum TP1,
The product is designed to operate in different thermal
environments and sufficient cooling must be provided to ensure measured at the reference point P1 is not allowed and may
cause degradation or permanent damage to the product. TP1 is
reliable operation. Cooling is achieved mainly by conduction,
also used to define the temperature range for normal operating
from the pins to the host board, and convection, which is
dependent on the airflow across the product. Increased airflow conditions. TP1 is defined by the design and used to guarantee
safety margins, proper operation and high reliability of the
enhances the cooling of the product.
The Output Current Derating graph found in the Output section product.
for each model provides the available output current vs.
Alternative Thermal Verification
ambient air temperature and air velocity at specified VI.
Since it is difficult to access positions P1 and P3 of the product,
The product is tested on a 254 x 254 mm, 35 µm (1 oz), test
measuring the temperature at only position P2 is an alternative
board mounted vertically in a wind tunnel with a cross-section
method to verify proper thermal conditions. If measuring only
of 608 x 203 mm. The test board has 8 layers.
TP2 the maximum temperature of P2 must be lowered since in
some operating conditions TP1 will be higher than TP2. Using a
Proper cooling of the product can be verified by measuring the temperature limit of 110°C for TP2 will make sure that the
temperature at positions P1, P2 and P3. The temperature at
temperatures at all points P1, P2 and P3 stay below their
these positions should not exceed the max values provided in
maximum limits.
the table below. Note that the max value is the absolute
maximum rating (non destruction) and that the electrical Output Over Temperature Protection (OTP)
data is guaranteed up to TP1 +95°C.
The internal temperature of the product is continously
monitored at position P3. When the internal temperature rises
See Design Note 019 for further information.
above the configured threshold level the product will respond
as configured. The product can respond in a number of ways
Definition of Product Operating Temperature
as follows:
The product operating temperature is used to monitor the
1. Continue operating without interruption (this could result in
temperature of the product. Proper thermal conditions can be
permanent damage to the product).
verified by measuring the temperature at positions P1, P2 and
P3. The temperature at these position (TP1,TP2, TP3) should not 2. Continue operating for a given delay period, followed by
exceed the maximum temperatures in the table below. The
an output voltage shutdown if the fault still exists.
number of measurement points may vary with different thermal
3. Immediate and definite shutdown of output voltage until
design and topology.
the fault is cleared by PMBus or the output voltage is reenabled.
Position
Description
Max Temperature
4.
P1
T3, FET
Reference point
120°C
P2
L1, Inductor
120°C (110°C *)
P3
N1, Control circuit
110°C
* See section Alternative thermal verification.
Top view
AIR FLOW
P2
P1
P3
Temperature positions and air flow direction.
Immediate shutdown of output voltage while the fault is
present. Operation resumes and the output is enabled
when the fault condition no longer exists.
Default response is 4. The OTP protection uses hysteresis so
that the fault exists until the temperature has fallen to a certain
level (OT_WARN_LIMIT) below the fault threshold. The default
OTP threshold and hysteresis are specified in Electrical
Characteristics.
The OTP limit, hysteresis and response can be reconfigured
using the PMBus commands OT_FAULT_LIMIT,
OT_WARN_LIMIT and OT_FAULT_RESPONSE.
The product also incorporates a non-configurable hard-coded
thermal shutdown associated with the temperature monitored
at position P3 to ensure long-term flash-memory integrity. See
Electrical Characteristics.
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Input 4.5-14 V, Output up to 12 A / 60 W
30/1301-BMR 461
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2F
VSET
Output voltage pin strap. Used
with external resistor to set the
nominal output voltage or to
select tracking mode. See
section Output Voltage Adjust
using Pin-strap Resistor.
3F
PREF
Pin-strap reference. Ground
reference for pin-strap
resistors.
6D
CTRL
Remote Control. Can be used
to enable/disable the output
voltage of the product. See
section Remote Control.
2E
SYNC
External switching frequency
synchronization input. See
section Synchronization.
5F
SALERT
PMBus Alert. Asserted low
when any of the configured
protection mechanisms
indicate a fault.
6E
SDA
PMBus Data. Data signal for
PMBus communication. See
section PMBus Interface.
6F
SCL
PMBus Clock. Clock for
PMBus communication. See
section PMBus Interface.
Below table gives a brief description of the functionality of each
pin. A more detailed description can be found in the different
sub sections of the Operating Information section.
Function
1A, 1B
2A, 2B, 2C, VOUT
2D
Output Voltage
3A, 3B, 4A,
4B,
GND
5A, 5B
Power Ground
5C, 6A, 6B,
VIN
6C
Input Voltage
1C
+S
Positive sense. Connect to
output voltage close to the
load
1D
-S
1E
PG
1F
SA0
3E
SA1
Negative sense. Connect to
power ground close to the
load.
Power Good output. Asserted
high when the product is ready
to provide regulated output
voltage to the load. Open
drain. See section Power
Good.
PMBus address pin strap.
Used with external resistors to
assign a unique PMBus
address to the product. See
section PMBus Interface.
26
© Ericsson AB
Pin layout, bottom view.
Designation
Speciﬁcation
Reference
1/287 01-BMR 461 Uen A August 2013
2013-08-27
Connections
Pin
12 (14)
No.
BMR 461 3001:
Voltage Tracking input. Allows
for tracking of output voltage
to an external voltage. See
section Voltage Tracking.
4F
CS_VTRK
BMR 461 xxxx
(future product):
Current Sharing bus.
If nor tracking or current
sharing is used, this pin must
be connected to PREF.
4E
RSVD
Reserved. Connect to PREF.
5D, 5E
NC
No connection
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POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Unused Pins
Unused pins should be connected according to the table
below. Note that connection of CS_VTRK to PREF is required
for normal standalone operation.
VSET should always have a pin strap resistor.
Unused Pin Connection
CS_VTRK
PREF. Required for normal operation
CTRL
Open (pin has internal pull-up)
RSVD
PREF or pulled down to PREF
SYNC
PREF or pulled down to PREF
SA0
PREF or Open
SA1
PREF or Open
SDA
Pull-up resistor to voltage > 2 V
SCL
Pull-up resistor to voltage > 2 V
PG
Open
SALERT
Open
Typical Application Circuit
VIN
VIN
CI
Date
Rev
2013-08-27
1/287 01-BMR 461 Uen A August 2013
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© Ericsson AB
Further layout recommendations are listed below.
•
The pin strap resistors, RSET, and RSA0/RSA1 should be
placed as close to the product as possible to minimize
loops that may pick up noise.
•
Avoid current carrying planes under the pin strap resistors
and the PMBus signals.
•
The capacitors CI should be placed as close to the input
pins as possible.
•
The capacitors CO should be placed close to the load.
•
The point of output voltage sense should be “downstream”
of CO according to figure below.
•
Care should be taken in the routing of the connections
from the sensed output voltage to the S+ and S–
terminals. These sensing connections should be routed as
a differential pair, preferably between ground planes which
are not carrying high currents. The routing should avoid
areas of high electric or magnetic fields.
•
If possible use planes on several layers to carry VI, VO and
GND. There should be a large number of vias close to the
VIN, VOUT and GND pads in order to lower input and
output impedances and improve heat spreading between
the product and the host board.
CO
L
O
A
D
VO
LOAD
GND
-S
+S
PG
SA0
SA1
VSET
27
Speciﬁcation
Reference
VOUT
VOUT
+S
BMR461 -S
CTRL
RSET
13 (14)
No.
CO
3-5 V
CI
PREF
RSA0 RSA1
SALERT
SCL
CS_VTRK SDA
3 x RPU = 2.2 kΩ
SYNC
RSVD
GND
SALERT
SCL
SDA
DGND
VI
BMR
461
Typical standalone operation with PMBus communication.
GND
PCB Layout Consideration
The radiated EMI performance of the product will depend on
the PCB layout and ground layer design. If a ground layer is
used, it should be connected to the output of the product and
the equipment ground or chassis.
A ground layer will increase the stray capacitance in the PCB
and improve the high frequency EMC performance.
RSA0, RSET, RSA1
Layout guidelines.
SCL
SDA
SYNC
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1 (5)
No.
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POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
PMBus Interface
This product provides a PMBus digital interface that enables
the user to configure many aspects of the device operation as
well as to monitor the input and output voltages, output current
and device temperature. The product can be used with any
2
standard two-wire I C or SMBus host device. In addition, the
product is compatible with PMBus version 1.1 and includes an
SALERT line to help mitigate bandwidth limitations related to
continuous fault monitoring. The PMBus signals, SCL, SDA
and SALERT require passive pull-up resistors as stated in the
SMBus Specification. Pull-up resistors are required to
guarantee the rise time as follows:
τ = RP C p ≤ 1µs
31/1301-BMR 461
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Speciﬁcation
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© Ericsson AB
restore the Ericsson factory default values through the
command RESTORE_DEFAULT_ALL. The
RESTORE_DEFAULT_ALL command will load a nominal
output level of 0 V. Therefore, after a
RESTORE_DEFAULT_ALL command is sent, the input
voltage must be cycled in order to load correct output voltage
level according to VSET pin-strap resistor (see section Startup
procedure).
The User NVM is pre-loaded with Ericsson factory default
values. The User NVM is writable and open for customization.
The values in the User NVM are loaded during initialization
whereafter commands can be changed through the PMBus
Interface. The STORE_USER_ALL command will store the
changed parameters to the User NVM.
STORE_USER_ALL
where Rp is the pull-up resistor value and Cp is the bus
loading. The maximum allowed bus load is 400 pF. The pull-up
resistor should be tied to an external supply voltage in range
from 2.7 to 5.5 V, which should be present prior to or during
power-up. If the proper power supply is not available, voltage
dividers may be applied. Note that in this case, the resistance
in the equation above corresponds to parallel connection of the
resistors forming the voltage divider.
See application note AN304 for details on interfacing the
product with a microcontroller.
User NVM
Ericsson factory default
Customizable
RESTORE_USER_ALL
INITIALIZATION
Default NVM
Ericsson factory default
Write-protected
RESTORE_DEFAULT_ALL
RAM
WRITE
PMBus interface
Monitoring via PMBus
It is possible to monitor a wide variety of parameters through
the PMBus interface. Fault conditions can be monitored using
the SALERT pin, which will be asserted when any number of
pre-configured fault or warning conditions occur. It is also
possible to continuously monitor one or more of the power
conversion parameters including but not limited to the
following:
•
•
•
•
•
•
Input voltage (READ_VIN)
Output voltage (READ_VOUT)
Output current (READ_IOUT)
Internal junction temperature (READ_TEMPERATURE_1)
Switching frequency (READ_FREQUENCY)
Duty cycle (READ_DUTY_CYCLE)
READ
Protecting Commands
The user may write-protect specific PMBus commands in the
User NVM by following the steps below.
1.
Enter the default password 0x0000 through the command
USER_PASSWD. After the correct password is entered,
SECURITY_LEVEL will read back 0x01 instead of default
0x00.
2.
If desired, define a new password by writing it to the
USER_LOCK command.
3.
Define which commands should be locked by using the
256 bit command USER_CONF. Setting bit X will writeprotect the PMBus command with code X.
4.
Send command STORE_USER_ALL.
5.
Cycle the input voltage.
Reading Set Parameters
To clearly display the true performance of the product, PMBus
command reads of set levels, limits and timing parameters will
return the internally used values. For this reason, due to
rounding or internal representation in the controller of the
product, there may be a difference between written and read
value of a PMBus command. This applies to PMBus
commands of type Linear or VoutLinear.
Non-Volatile Memory (NVM)
The product incorporates two Non-Volatile Memory areas for
storage of the supported PMBus commands; the Default NVM
and the User NVM.
The Default NVM is pre-loaded with Ericsson factory default
values. The Default NVM is write-protected and can be used to
Software Tools for Design and Production
Ericsson provides software tools for configuration and
monitoring of this product via the PMBus interface.
For more information please contact your local Ericsson sales
representative.
E
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PRODUCT SPECIFICATION
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No.
31/1301-BMR 461
Technical
EAB/FJB/GM QLAANDR
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BMR461 series
EAB/FJB/GM
POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Date
2013-08-27
Rev
Speciﬁcation
29
Reference
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© Ericsson AB
PMBus Addressing
The PMBus address should be configured with resistors
connected between the SA0/SA1 pins and the PREF pin, as
shown in the table and figure below. Note that five different
values of RSA1 produce the same address. Recommended
resistor values for hard-wiring PMBus addresses are shown in
the table. 1% tolerance resistors are required. The
configurable PMBus addresses range from 0x0A to 0x7F. In
total 118 device address combinations are provided.
SA0
SA1
RSA1
RSA0
PREF
Schematic of connection of address resistor.
RSA1 [kΩ]
≤ 4.22
5.11
6.19
7.15
8.25
9.53
11.0
12.7
14.7
17.8
21.5
26.1
31.6
38.3
44.2
51.1
59.0
68.1
86.6
115
Optional PMBus Addressing
The user may leave SA0/SA1 open or shorted to PREF.
Shorting SA0/SA1 to PREF corresponds to RSA0/RSA1 ≤ 4.22
kΩ in the address table above.
Leaving SA0/SA1 open corresponds to RSA0/RSA1 ≥ 274 kΩ in
the address table above.
RSA0 [kΩ]
140
169
205
237
≥ 274
≤ 4.22
0x0A
0x22
0x3A
0x52
0x6A
5.11
0x0B
0x23
0x3B
0x53
0x6B
6.19
0x0C
0x24
0x3C
0x54
0x6C
7.15
0x0D
0x25
0x3D
0x55
0x6D
8.25
0x0E
0x26
0x3E
0x56
0x6E
9.53
0x0F
0x27
0x3F
0x57
0x6F
Address
Comment
11.0
0x10
0x28
0x40
0x58
0x70
0x00
General Call Address / START byte
12.7
0x11
0x29
0x41
0x59
0x71
0x01
CBUS address
14.7
0x12
0x2A
0x42
0x5A
0x72
0x02
Address reserved for different bus format
17.8
0x13
0x2B
0x43
0x5B
0x73
0x03 - 0x07
Reserved for future use
21.5
0x14
0x2C
0x44
0x5C
0x74
0x08
SMBus Host
26.1
0x15
0x2D
0x45
0x5D
0x75
0x09 - 0x0B
Assigned for Smart Battery
31.6
0x16
0x2E
0x46
0x5E
0x76
0x0C
SMBus Alert Response Address
38.3
0x17
0x2F
0x47
0x5F
0x77
0x28
Reserved for ACCESS.bus host
44.2
0x18
0x30
0x48
0x60
0x78
51.1
0x19
0x31
0x49
0x61
0x79
0x2C - 0x2D
Reserved by previous versions of the SMBus
specification
59.0
0x1A
0x32
0x4A
0x62
0x7A
0x37
68.1
0x1B
0x33
0x4B
0x63
0x7B
0x40 - 0x44
86.6
0x1C
0x34
0x4C
0x64
0x7C
115
0x1D
0x35
0x4D
0x65
0x7D
140
0x1E
0x36
0x4E
0x66
0x7E
169
0x1F
0x37
0x4F
0x67
0x7F
205
0x20
0x38
0x50
0x68
0x7F
≥ 237
0x21
0x39
0x51
0x69
0x7F
Reserved Addresses
Addresses listed in the table below are reserved or assigned
according to the SMBus specification and may not be usable.
Refer to the SMBus specification for further information.
0x48 - 0x4B
Reserved for ACCESS.bus default address
Reserved by previous versions of the SMBus
specification
Unrestricted addresses
0x61
SMBus Device Default Address
0x78 - 0x7B
10-bit slave addressing
0x7C - 0x7F
Reserved for future use
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POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
2
I C/SMBus – Timing
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PMBus Commands
The product is PMBus compliant. The following table lists all
the implemented PMBus read commands. For more detailed
information see PMBus Power System Management Protocol
Specification; Part I – General Requirements, Transport and
Electrical Interface and PMBus Power System Management
Protocol; Part II – Command Language.
Designation
Code
Impl
Standard PMBus Commands
Control Commands
Setup and hold times timing diagram
The setup time, tset, is the time data, SDA, must be stable
before the rising edge of the clock signal, SCL. The hold time
thold, is the time data, SDA, must be stable after the rising edge
of the clock signal, SCL. If these times are violated incorrect
data may be captured or meta-stability may occur and the bus
communication may fail. All standard SMBus protocols must
be followed, including clock stretching. Refer to the SMBus
specification, for SMBus electrical and timing requirements.
The bus-free time (time between STOP and START packet)
according to Electrical Specification must be followed.
The product supports PEC (Packet Error Checking) according
to the SMBus specification.
When sending subsequent commands to the same unit, it is
recommended to insert additional delays after write
transactions according to the table below, due to the product’s
controller executing processor-intensive tasks.
After the output voltage is enabled, it is recommended to wait
until PG is asserted (or the equivalent time) before sending
commands.
PMBus command
Delay after write before
additional command
STORE_USER_ALL
STORE_DEFAULT_ALL
500 ms
DEADTIME_GCTRL
USER_CONF
350 ms
MANUF_CONF
RESTORE_USER_ALL
RESTORE_DEFAULT_ALL
PAGE
00h
No
OPERATION
01h
Yes
ON_OFF_CONFIG
02h
Yes
WRITE_PROTECT
10h
Yes
CAPABILITY (read only)
19h
Yes
VOUT_MODE (read Only)
20h
Yes
VOUT_COMMAND
21h
Yes
VOUT_TRIM
22h
Yes
VOUT_CAL_OFFSET
23h
Yes
VOUT_MAX
24h
Yes
VOUT_MARGIN_HIGH
25h
Yes
VOUT_MARGIN_LOW
26h
Yes
VOUT_TRANSITION_RATE
27h
Yes
VOUT_DROOP
28h
Yes
MAX_DUTY
32h
No
FREQUENCY_SWITCH
33h
Yes
VIN_ON
35h
Yes
VIN_OFF
36h
Yes
IOUT_CAL_GAIN
38h
Yes
IOUT_CAL_OFFSET
39h
Yes
VOUT_SCALE_LOOP
29h
No
VOUT_SCALE_MONITOR
2Ah
No
COEFFICIENTS
30h
No
Output Commands
Fault Limit Commands
10 ms
POWER_GOOD_ON
5Eh
Yes
FREQUENCY_SWITCH
POWER_GOOD_OFF
5Fh
Yes
VOUT_DROOP
VOUT_OV_FAULT_LIMIT
40h
Yes
IOUT_CAL_GAIN
VOUT_OV_WARN_LIMIT
42h
No
VOUT_UV_WARN_LIMIT
43h
No
VOUT_UV_FAULT_LIMIT
44h
Yes
LOOP_CONFIG
IOUT_OC_FAULT_LIMIT
46h
Yes
COMP_MODEL
IOUT_OC_LV_FAULT_LIMIT
48h
No
ZETAP
IOUT_OC_WARN_LIMIT
4Ah
No
ADAPTIVE_MODE
FEEDBACK_EFFORT
0.5 ms
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Ericsson Internal
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POL Regulators (MICUBOR)
Input 4.5-14 V, Output up to 12 A / 60 W
Designation
4 (5)
No.
Code
Impl
IOUT_UC_FAULT_LIMIT
4Bh
No
OT_FAULT_LIMIT
4Fh
OT_WARN_LIMIT
51h
UT_WARN_LIMIT
UT_FAULT_LIMIT
Date
2013-08-27
Rev
31
Speciﬁcation
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Code
Impl
READ_TEMPERATURE_2
8Eh
Yes
Yes
READ_FAN_SPEED_1
90h
No
Yes
READ_DUTY_CYCLE
94h
Yes
52h
No
READ_FREQUENCY
95h
Yes
53h
No
READ_POUT
96h
No
VIN_OV_FAULT_LIMIT
55h
Yes
READ_PIN
97h
No
VIN_OV_WARN_LIMIT
57h
No
Group Commands
VIN_UV_WARN_LIMIT
58h
No
INTERLEAVE
37h
Yes
VIN_UV_FAULT_LIMIT
59h
Yes
PHASE_CONTROL
F0h
No
Fault Response Commands
Designation
Identification Commands
VOUT_OV_FAULT_RESPONSE
41h
Yes
PMBUS_REVISION
98h
Yes
VOUT_UV_FAULT_RESPONSE
45h
Yes
MFR_ID
99h
Yes
OT_FAULT_RESPONSE
50h
Yes
MFR_MODEL
9Ah
Yes
UT_FAULT_RESPONSE
54h
No
MFR_REVISION
9Bh
Yes
VIN_OV_FAULT_RESPONSE
56h
Yes
MFR_LOCATION
9Ch
Yes
VIN_UV_FAULT_RESPONSE
5Ah
Yes
MFR_DATE
9Dh
Yes
IOUT_OC_FAULT_RESPONSE
47h
Yes
MFR_SERIAL
9Eh
Yes
IOUT_OC_LV_FAULT_RESPONSE
49h
No
IC_DEVICE_ID
ADh
Yes
IOUT_UC_FAULT_RESPONSE
4Ch
No
IC_DEVICE_REV
AEh
Yes
63h
Yes
Supervisory Commands
STORE_DEFAULT_ALL
11h
Yes
TON_MAX_FAULT_RESPONSE
Time setting Commands
TON_DELAY
60h
Yes
RESTORE_DEFAULT_ALL
12h
Yes
TON_RISE
61h
Yes
STORE_USER_ALL
15h
Yes
TOFF_DELAY
64h
Yes
RESTORE_USER_ALL
16h
Yes
TOFF_FALL
65h
Yes
Product Specific Commands
TON_MAX_FAULT_LIMIT
62h
Yes
ADAPTIVE_MODE
D0h
Yes
FEEDBACK_EFFORT
D3h
Yes
Status Commands (Read Only)
CLEAR_FAULTS
03h
Yes
LOOP_CONFIG
D5h
Yes
STATUS_BYTE
78h
Yes
TEST_MODE
D9h
Yes
STATUS_WORD
79h
Yes
COMP_MODEL
DBh
Yes
STATUS_VOUT
7Ah
Yes
STRAP_DISABLE
DCh
Yes
STATUS_IOUT
7Bh
Yes
MANUF_CONF
E0h
Yes
STATUS_INPUT
7Ch
Yes
MANUF_LOCK
E1h
Yes
STATUS_TEMPERATURE
7Dh
Yes
MANUF_PASSWD
E2h
Yes
STATUS_CML
7Eh
Yes
USER_CONF
E3h
Yes
STATUS_MFR_SPECIFIC
80h
Yes
USER_LOCK
E4h
Yes
USER_PASSWD
E5h
Yes
88h
Yes
SECURITY_LEVEL
E6h
Yes
Monitor Commands (Read Only)
READ_VIN
READ_IIN
89h
No
DEADTIME_GCTRL
E7h
Yes
READ_VOUT
8Bh
Yes
ZETAP
E8h
Yes
READ_IOUT
8Ch
Yes
READ_TEMPERATURE_1
8Dh
Yes
Impl is short for Implemented.
E
Prepared (also subject responsible if other)
BMR461 series
POL Regulators
EAB/FJB/GM
[EKSEHAR]
1 (2)
4/1301-BMR 461Technical
3001 Uen
32
No.
EPETSCH
Approved
Ericsson Internal
PRODUCT SPEC. MECHANICAL
Checked
See §1
Input 4.5-14 V, Output up to 12 A / 60 W
Date
2013-05-03
Rev
Speciﬁcation
Reference
1/287 01-BMR 461 Uen A August 2013
A
© Ericsson AB
Mechanical Information - Surface Mount Version
All component placements – whether shown as physical components or symbolical outline – are for reference only and are subject to change throughout the product’s life cycle,
unless explicitly described and dimensioned in this drawing.
E
Ericsson Internal
PRODUCT SPECIFICATION
MECHANICAL.
Technical Speciﬁcation
Prepared (also subject responsible if other)
No.
EPETSCH
5/1301-BMR 461 3001 Uen
Approved
Date
1/287
01-BMRReference
461 Uen A August 2013
Rev
2013-07-03
©
CEricsson AB
BMR461 series POL Regulators Checked
EAB/FJB/GM
Harrisen]
See
Input 4.5-14[Ksenia
V, Output
up to 12 A / 60
W§1
1 (5)
33
Soldering Information - Surface Mounting
Lead-free (Pb-free) solder processes
The surface mount product is intended for forced convection or
vapor phase reflow soldering in SnPb or Pb-free processes.
For Pb-free solder processes, a pin temperature (TPIN) in
excess of the solder melting temperature (TL, 217 to 221°C for
SnAgCu solder alloys) for more than 30 seconds and a peak
temperature of 235°C on all solder joints is recommended to
ensure a reliable solder joint.
The reflow profile should be optimised to avoid excessive
heating of the product. It is recommended to have a sufficiently
extended preheat time to ensure an even temperature across
the host PCB and it is also recommended to minimize the time
in reflow.
A no-clean flux is recommended to avoid entrapment of
cleaning fluids in cavities inside the product or between the
product and the host board, since cleaning residues may affect
long time reliability and isolation voltage.
General reflow process specifications
SnPb eutectic
Pb-free
Average ramp-up (TPRODUCT)
3°C/s max
3°C/s max
183°C
221°C
Typical solder melting (liquidus)
temperature
TL
Minimum reflow time above TL
30 s
30 s
TPIN
210°C
235°C
Peak product temperature
TPRODUCT
225°C
260°C
Average ramp-down (TPRODUCT)
6°C/s max
6°C/s max
Maximum time 25°C to peak
6 minutes
8 minutes
Pin
profile
Product
profile
Time in
reflow
Time in preheat
/ soak zone
Time 25°C to peak
For SnPb solder processes, the product is qualified for MSL 1
according to IPC/JEDEC standard J-STD-020C.
Pb-free solder processes
Temperature
TL
SnPb solder processes
During reflow TPRODUCT must not exceed 225 °C at any time.
Minimum pin temperature
TPRODUCT maximum
TPIN minimum
Maximum Product Temperature Requirements
Top of the product PCB near pin A2 or A5 is chosen as
reference locations for the maximum (peak) allowed product
temperature (TPRODUCT) since these will likely be the warmest
part of the product during the reflow process.
Time
Minimum Pin Temperature Recommendations
Pin number C1 or D1 are chosen as reference location for the
minimum pin temperature recommendation since these will
likely be the coolest solder joint during the reflow process.
For Pb-free solder processes, the product is qualified for MSL 3
according to IPC/JEDEC standard J-STD-020C.
During reflow TPRODUCT must not exceed 260 °C at any time.
Dry Pack Information
Surface mounted versions of the products are delivered in
standard moisture barrier bags according to IPC/JEDEC
standard J-STD-033 (Handling, packing, shipping and use of
moisture/reflow sensitivity surface mount devices).
Using products in high temperature Pb-free soldering
processes requires dry pack storage and handling. In case the
products have been stored in an uncontrolled environment and
no longer can be considered dry, the modules must be baked
according to J-STD-033.
Thermocoupler Attachment
Top of PWB near pin A2 or A5 for measurement
of maximum product temperature, TPRODUCT
SnPb solder processes
For SnPb solder processes, a pin temperature (TPIN) in excess
of the solder melting temperature, (TL, 183°C for Sn63Pb37) for
more than 30 seconds and a peak temperature of 210°C is
recommended to ensure a reliable solder joint.
For dry packed products only: depending on the type of solder
paste and flux system used on the host board, up to a
recommended maximum temperature of 245°C could be used,
if the products are kept in a controlled environment (dry pack
handling and storage) prior to assembly.
Pin C1 or D1 for measurement of minimum
Pin (solder joint) temperature TPIN
E
Ericsson Internal
PRODUCT SPECIFICATION
MECHANICAL.
Technical Speciﬁcation
Prepared (also subject responsible if other)
No.
EPETSCH
5/1301-BMR 461 3001 Uen
Approved
Date
1/287
01-BMRReference
461 Uen A August 2013
Rev
2013-07-03
©
CEricsson AB
BMR461 series POL Regulators Checked
EAB/FJB/GM
Harrisen]
See
Input 4.5-14[Ksenia
V, Output
up to 12 A / 60
W§1
Surface Mount Assembly and Repair
The LGA of the product require particular care during
assembly since the LGA´s are hidden between the host board
and the product’s PCB. Special procedures are required for
successful rework of these products.
Assembly
Automatic pick and place equipment should be used to mount
the product on the host board. The use of a vision system,
utilizing the fiducials on the bottom side of the product, will
ensure adequate accuracy. Manual mounting of solder bump
products is not recommended.
This module is not recommended for assembly on the
bottom side of a customer board. If such an assembly is
attempted, components may fall off the module during the
second reflow process.
Repair
For a successful repair (removal and replacement) of a LGA
product, a dedicated rework system should be used. The
rework system should preferably utilize a reflow station and a
bottom side heater might also be needed for the operation.
The product is an open frame design with a pick up surface on
a large central component (in this case the choke). This pick
up surface can be used for removal of the module provided
that it is glued against module PCB before removal to prevent
it from separating from the module PCB.
For specific instructions regarding removal and re-solder of
the module refer to 1541 - BMR 461.
Delivery Package Information
The products are delivered in antistatic carrier tape
(EIA 481 standard).
Carrier Tape Specifications
Material
Surface
resistance
Bakeability
Tape width, W
Pocket pitch,
P1
Pocket depth,
K0
Reel diameter
Reel capacity
Reel weight
PS, antistatic
7
< 10 Ohm/square
The tape is not bakable
24 mm [0.94 inch]
20 mm [0.79 inch]
8.6 mm [0.339 inch]
330 mm [13 inch]
280 products /reel
1160 g/full reel
2 (5)
34
E
Ericsson Internal
PRODUCT SPECIFICATION
MECHANICAL.
Technical Speciﬁcation
Prepared (also subject responsible if other)
No.
EPETSCH
5/1301-BMR 461 3001 Uen
Approved
Date
1/287
01-BMRReference
461 Uen A August 2013
Rev
2013-07-03
©
CEricsson AB
BMR461 series POL Regulators Checked
EAB/FJB/GM
Harrisen]
See
Input 4.5-14[Ksenia
V, Output
up to 12 A / 60
W§1
Product Qualification Specification
Characteristics
External visual inspection
IPC-A-610
Change of temperature
(Temperature cycling)
IEC 60068-2-14 Na
Temperature range
Number of cycles
Dwell/transfer time
-40 to 100°C
1000
15 min/0-1 min
Cold (in operation)
IEC 60068-2-1 Ad
Temperature TA
Duration
-45°C
72 h
Damp heat
IEC 60068-2-67 Cy
Temperature
Humidity
Duration
85°C
85 % RH
1000 hours
Dry heat
IEC 60068-2-2 Bd
Temperature
Duration
125°C
1000 h
Electrostatic discharge
susceptibility
IEC 61340-3-1, JESD 22A114
IEC 61340-3-2, JESD 22A115
Human body model (HBM)
Machine Model (MM)
Class 2, 2000 V
Class 3, 200 V
Immersion in cleaning
solvents
IEC 60068-2-45 XA, method
2
Water
Glycol ether
Isopropyl alcohol
55°C
35°C
35°C
Mechanical shock
IEC 60068-2-27 Ea
Peak acceleration
Duration
100 g
6 ms
Moisture reflow sensitivity
J-STD-020C
Level 1 (SnPb-eutectic)
Level 3 (Pb Free)
225°C
260°C
Operational life test
MIL-STD-202G, method
108A
Duration
1000 h
Robustness of terminations
IEC 60068-2-21 Test Ua1
IEC 60068-2-21 Test Ue1
Through hole mount
products
Surface mount products
All leads
All leads
Preconditioning
Temperature, SnPb Eutectic
Temperature, Pb-free
150°C dry bake 16 h
215°C
235°C
Frequency
Spectral density
Duration
10 to 500 Hz
2
0.07 g /Hz
10 min in each 3
perpendicular directions
IEC 60068-2-58 test Td
Solderability
Vibration, broad band
random
IEC 60068-2-64 Fh, method
1
4 (5)
35

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