SN74LVC06A-Q1 www.ti.com .................................................................................................................................................. SCAS761B – FEBRUARY 2004 – REVISED APRIL 2008 HEX INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS FEATURES 1 • • • • • • D OR PW PACKAGE (TOP VIEW) Qualified for Automotive Applications Operate From 1.65 V to 3.6 V Inputs and Open-Drain Outputs Accept Voltages up to 5.5 V Max tpd of 3.7 ns at 3.3 V Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 1A 1Y 2A 2Y 3A 3Y GND 1 14 2 13 3 12 4 11 5 10 6 7 9 8 VCC 6A 6Y 5A 5Y 4A 4Y DESCRIPTION/ORDERING INFORMATION This hex inverter buffer/driver is designed for 1.65-V to 3.6-V VCC operation. The outputs of the SN74LVC06A device are open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 24 mA. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION (1) PACKAGE (2) TA –40°C to 125°C (1) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING SOIC – D Reel of 2500 SN74LVC06AQDRQ1 LVC06AQ TSSOP – PW Reel of 2000 SN74LVC06AQPWRQ1 LVC06AQ For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. FUNCTION TABLE (EACH INVERTER) INPUT A OUTPUT Y H L L H LOGIC DIAGRAM, EACH INVERTER (POSITIVE LOGIC) A Y 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2008, Texas Instruments Incorporated SN74LVC06A-Q1 SCAS761B – FEBRUARY 2004 – REVISED APRIL 2008 .................................................................................................................................................. www.ti.com Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V VO Output voltage range 6.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA –0.5 Continuous current through VCC or GND θJA Package thermal impedance Tstg Storage temperature range (1) (2) (3) (3) D package 86 PW package 113 –65 150 UNIT °C/W °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) VCC Supply voltage VIH High-level input voltage Operating Data retention only VCC = 1.65 V to 1.95 V MIN MAX 1.65 3.6 1.5 Low-level input voltage VI Input voltage VO Output voltage IOL Low-level output current TA Operating free-air temperature 1.7 VCC = 2.7 V to 3.6 V 2 2 V 0.35 × VCC VCC = 2.3 V to 2.7 V 0.7 VCC = 2.7 V to 3.6 V 0.8 V 0 5.5 V 0 5.5 V VCC = 1.65 V 4 VCC = 2.3 V 8 VCC = 2.7 V 12 VCC = 3 V (1) V 0.65 × VCC VCC = 2.3 V to 2.7 V VCC = 1.65 V to 1.95 V VIL UNIT mA 24 –40 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback Copyright © 2004–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC06A-Q1 SN74LVC06A-Q1 www.ti.com .................................................................................................................................................. SCAS761B – FEBRUARY 2004 – REVISED APRIL 2008 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOL = 100 µA VOL II ICC ΔICC Ci (1) MIN TYP (1) VCC MAX 1.65 V to 3.6 V 0.2 IOL = 4 mA 1.65 V 0.45 IOL = 8 mA 2.3 V 0.7 IOL = 12 mA 2.7 V 0.5 IOL = 24 mA 3V 0.65 UNIT V µA VI = 5.5 V or GND 3.6 V ±5 VI = VCC or GND, IO = 0 3.6 V 10 µA 2.7 V to 3.6 V 1 mA One input at VCC – 0.6 V, Other inputs at VCC or GND VI = VCC or GND 3.3 V 5 pF All typical values are at VCC = 3.3 V, TA = 25°C. Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A Y VCC = 2.7 V MIN VCC = 3.3 V ± 0.3 V MAX MIN MAX 3.9 1 3.7 UNIT ns Operating Characteristics, TA = 25°C PARAMETER Cpd Power dissipation capacitance per buffer/driver TEST CONDITIONS VCC = 3.3 V f = 10 MHz 2.5 TYP Submit Documentation Feedback Copyright © 2004–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC06A-Q1 UNIT pF 3 SN74LVC06A-Q1 SCAS761B – FEBRUARY 2004 – REVISED APRIL 2008 .................................................................................................................................................. www.ti.com PARAMETER MEASUREMENT INFORMATION (OPEN DRAIN) VLOAD S1 RL From Output Under Test Open TEST GND RL CL (see Note A) S1 tPZL (see Notes E and F) VLOAD tPLZ (see Notes E and G) VLOAD tPHZ/tPZH VLOAD LOAD CIRCUIT INPUT VCC VI 2.7 V 3.3 V ± 0.3 V VM tr/tf ≤ 2.5 ns ≤ 2.5 ns 2.7 V 2.7 V 1.5 V 1.5 V VLOAD 6V 6V CL RL V∆ 50 pF 50 pF 500 Ω 500 Ω 0.3 V 0.3 V VI Timing Input VM 0V tw tsu th VI VM Input VM VM Data Input VM 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VI VM Input VM 0V Output VM VOL tPHL VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS tPLZ VLOAD/2 VM tPZH VOH Output VM 0V Output Waveform 1 S1 at VLOAD (see Note B) tPLH VM VM tPZL VOH VM VI Output Control tPHL tPLH VI VOL + V∆ VOL tPHZ Output Waveform 2 S1 at VLOAD (see Note B) VM VLOAD/2 - V∆ VLOAD/2 ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VM. G. tPLZ is measured at VOL + V∆. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 4 Submit Documentation Feedback Copyright © 2004–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC06A-Q1 PACKAGE OPTION ADDENDUM www.ti.com 17-Aug-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06AQDRQ1 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06AQPWRG4Q1 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC06AQPWRQ1 ACTIVE TSSOP PW 14 Call TI Samples (Requires Login) SN74LVC06AQDRG4Q1 TBD (3) Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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OTHER QUALIFIED VERSIONS OF SN74LVC06A-Q1 : Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 17-Aug-2012 • Catalog: SN74LVC06A • Enhanced Product: SN74LVC06A-EP NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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