PTD08A020W www.ti.com SLTS286 – MAY 2007 20-A, 4.75-V to 14-V INPUT, NON-ISOLATED, WIDE-OUTPUT, DIGITAL POWERTRAIN™ MODULE FEATURES • • • • • Up to 20-A Output Current 4.75-V to 14-V Input Voltage Programmable Wide-Output Voltage (0.7 V to 3.6 V) Efficiencies up to 96% Digital I/O – PWM signal – INHIBIT – Current limit flag (FAULT) – Sychronous Rectifier Enable (SRE) Analog I/O – Temperature – Output currrent Safety Agency Approvals: (Pending) – UL/IEC/CSA-C22.2 60950-1 Operating Temperature: –40°C to 85°C APPLICATIONS • Digital Power Systems using UCD92XX Digital Controllers DESCRIPTION The PTD08A020W is a high-performance 20-A rated, non-isolated digital PowerTrain module. It is the power conversion section of a digital power system. The PTD08A020W must be used in conjunction with a digital power controller such as the UCD92XX or UCD91XX family. The PTD08A020W receives control signals from the digital controller and provides parametric and status information back to the digital controller. Together, PowerTrain modules and a digital power controller form a sophisticated, robust, and easily configured power management solution. Operating from an input voltage range of 4.75 V to 14 V, the PTD08A020W provides step-down power conversion to a wide range of output voltages from, 0.7 V to 3.6 V. The wide input voltage range makes the PTD08A020W particularly suitable for advanced computing and server applications that utilize a loosely regulated 8-V to 12-V intermediate distribution bus. Additionally, the wide input voltage range increases design flexibility by supporting operation with tightly regulated 5-V, 8-V, or 12-V intermediate bus architectures. The module incorporates output over-current and temperature monitoring which protects against most load faults. Output current and module temperature signals are provided for the digital controller to permit user defined over-current and over-temperature warning and fault scerarios. The module uses double-sided surface mount construction to provide a low profile and compact footprint. Package options include both through-hole and surface mount configurations that are lead (Pb) - free and RoHS compatible. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. POWERTRAIN, TMS320 are trademarks of Texas Instruments. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. Copyright © 2007, Texas Instruments Incorporated PRODUCT PREVIEW • • • PTD08A020W www.ti.com SLTS286 – MAY 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Standard PTD08A020W Application Digital Lines To/From Digital Controller 12 11 VBIAS PWM 10 9 SRE FAULT 8 INH VO VI 1 VO VI 4 PTD08A020W + CI1 CI2 330 mF 22 mF (Recommended) (Optional) L O A D + GND TEMP 2 5 IOUT AGND 6 7 GND 3 PRODUCT PREVIEW GND CO1 47 mF (Optional) CO2 330 mF (Recommended) GND Analog Lines To Digital Controller UDG-07054 2 Submit Documentation Feedback PTD08A020W www.ti.com SLTS286 – MAY 2007 ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see the TI website at www.ti.com. DATASHEET TABLE OF CONTENTS DATASHEET SECTION PAGE NUMBER ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS 3 ELECTRICAL CHARACTERISTICS TABLE 4 TERMINAL FUNCTIONS 5 ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS (Voltages are with respect to GND) VI Input voltage tbd V VB Bias voltage tbd V TA Operating temperature range Over VI range Twave Wave soldering temperature Surface temperature of module body or pins for 5 seconds maximum. Treflow Solder reflow temperature Surface temperature of module body or pins Tstg Storage temperature –40 to 85 suffix AD 260 suffix AS 235 (1) suffix AZ 260 (1) –55 to 125 (2) Mechanical shock Per Mil-STD-883D, Method 2002.3, 1 msec, 1/2 sine, mounted Mechanical vibration Mil-STD-883D, Method 2007.2, 20-2000 Hz suffix AD tbd suffix AS & AZ tbd Weight MTBF (1) (2) °C Reliability Per Telcordia SR-332, 50% stress, TA = 40°C, ground benign Flammability Meets UL94V-O G tbd tbd grams tbd 106 Hr During reflow of surface mount package version do not elevate peak temperature of the module, pins or internal components above the stated maximum. The shipping tray or tape and reel cannot be used to bake parts at temperatures higher than 65°C. Submit Documentation Feedback 3 PRODUCT PREVIEW UNIT PTD08A020W www.ti.com SLTS286 – MAY 2007 ELECTRICAL CHARACTERISTICS PTD08A010W TA= 25°C, VI= 12 V, VO= 3.3 V, VB= VI, CI1= 330 µF, CI2= 22 µF ceramic, CO1= 47 µF ceramic, CO2= 330 µF, and IO= IO(max) (unless otherwise stated) PARAMETER TEST CONDITIONS PTD08A010W MIN Output current Over VO range 0 20 A VI Input voltage range Over IO range 4.75 14 (1) V VOADJ Output voltage adjust range Over IO range 0.7 3.6 V Efficiency PRODUCT PREVIEW VOPP VO Ripple (peak-to-peak) VB Bias voltage VB UVLO Bias voltage under voltage lockout IB Bias current VIH High-level input voltage VIL Low-level input voltage PWM input TEMP output IO = 20 A, fs = 350 kHz VO = 3.3 V 91% VO = 2.5 V 89% VO = 1.8 V 86% VO = 1.5 V 84% VO = 1.2 V 83% VO = 1.0 V 80% 20-MHz bandwidth 20 VOL FAULT output ILIM 5 tbd VB increasing 4.25 4.5 4.75 VB decreasing 4.0 4.25 4.5 Inhibit (pin 8) to AGND Standby 5 Switching tbd 2.0 SRE, INH, & PWM input levels 0.8 Frequency range 300 500 Duty cycle limts tbd tbd Pulse width limits tbd tbd Rise time tbd tbd Range tbd tbd -4.0 +6.0 Accuracy, -40°C ≤ TA≤ 85°C Slope 10 500 tbd Low-level output voltage tbd tbd 30 CI CO tbd Gain tbd (2) (3) (4) (5) V tbd Capacitance Value Equivalent series resistance (non-ceramic) (1) °C A 330 (2) Ceramic 22 (2) Nonceramic 330 (3) tbd (4) 47 (3) tbd Nonceramic External input capacitance External output capacitance kHz tbd Accuracy Offset V mV tbd tbd V mV/°C High-level output voltage Range V mA 5.5 Overcurrent threshold; Reset, followed by auto-recovery IOUT output mVPP 4.75 Offset, TA = 0°C VOH 4 UNIT MAX IO η 25°C, natural convection TYP Ceramic tbd (5) µF µF mΩ The maximum input voltage is duty cycle limited to (VO× tbd) or 14 V, whichever is less. The maximum allowable input voltage is a function of switching frequency. Please review the Application Information section for more information. A 22 µF ceramic input capacitor is recommended for operation. An additional 330 µF bulk capacitor rated for a minimum of 500mA rms of ripple current is recommended. A 47 µF ceramic output capacitor is recommended for operation. An additional 330 µF bulk capacitor is recommended for improved transient response. See the related Application Information section for further guidance. tbd µF is the calculated maximum output capacitance. The minimum ESR limitation will often result in a lower value. This is the minimum ESR for all non-ceramic output capacitance. Use tbd mΩ as a minimum when using capacitor manufacturer's maximum ESR values. Submit Documentation Feedback PTD08A020W www.ti.com SLTS286 – MAY 2007 TERMINAL FUNCTIONS NAME VI NO. 1 GND 2 3 DESCRIPTION The positive input voltage power node to the module, which is referenced to common GND. This is the common ground connection for the VI and VO power connections. VO 4 The regulated positive power output with respect to GND. TEMP 5 Temperature sense output. The voltage level on this pin represents the temperature of the module. IOUT 6 Current sense output. The voltage level on this pin represents the average output current of the module. AGND 7 Analog ground return. It is the 0 Vdc reference for the control inputs. INH (1) 8 The inhibit pin is an open-collector/drain, negative logic input that is referenced to AGND. Applying a low-level signal to this pin disables the module and turns off the output voltage. A 10 kΩ pull-up to 3.3 V or 5 V is required if the INH signal is not used. FAULT 9 Current limit flag. The Fault signal is a 3.3 V digital output which is latched high after an over-current condition. The Fault is reset after two rising edges on the PWM pin. SRE 10 Synchronized Rectifier Enable. This pin is a high impedance digital input. A 3.3 V or 5 V logic level signals is used to enable the synchronous rectifier switch. PWM 11 This is the PWM input pin. It is a high impedance digital input that accepts 3.3 V or 5 V logic level signals up to 500 MHz. VBIAS 12 Bias voltage supply required to power internal circuitry. For optimal performance connect VBIAS to VI. (1) PRODUCT PREVIEW TERMINAL Denotes negative logic: Open = Normal operation, Ground = Function active 1 12 11 10 9 8 7 6 5 Texas Instruments PTD08A020W (Top View) 2 3 4 Submit Documentation Feedback 5 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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