NSC 54FCT541

54FCT541
Octal Buffer/Line Driver with TRI-STATE ® Outputs
General Description
Features
The ’FCT541 is an octal buffer and line driver with
TRI-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus-oriented transmitter/
receiver. The ’FCT541 is similar to the ’FCT244 with broadside pinout.
n
n
n
n
Non-inverting buffers
TTL input and output level compatible
CMOS power consumption
Output sink capability of 48 mA, source capability of
12 mA
n Flow-through pinout for ease of PC board layout
n Standard Microcircuit Drawing (SMD) 5962-8976601
Ordering Code
Military
Package
Package Description
Number
54FCT541DMQB
J20A
54FCT541FMQB
W20A
20-Lead Cerpack
54FCT541LMQB
E20A
20-Lead Ceramic Leadless Chip Carrier, Type C
Connection Diagram
20-Lead Ceramic Dual-In-Line
Pin Names
Pin Assignment
DIP and Cerpack
Description
OE1, OE2
Output Enable Input (Active Low)
I0–I7
Inputs
O0–O7
Outputs
Inputs
DS100953-1
Outputs
OE1
OE2
I
FCT541
L
L
H
H
H
X
X
Z
X
H
X
Z
L
L
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Pin Assignment
LCC
DS100953-30
TRI-STATE ® is a registered trademark of FAirchild Semiconductor Corporation.
© 1999 National Semiconductor Corporation
DS100953
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54FCT541 Octal Buffer/Line Driver with TRI-STATE Outputs
October 1999
54FCT541
Absolute Maximum Ratings (Note 1)
in the HIGH State
Current Applied to Output
in LOW State (Max)
DC Latchup Source Current
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
Ceramic
VCC Pin Potential to
Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Any Output
in the Disabled or
Power-Off State
−65˚C to +150˚C
−55˚C to +125˚C
−0.5V to VCC
twice the rated IOL (mA)
−500 mA
Recommended Operating
Conditions
−55˚C to +175˚C
Free Air Ambient Temperature
Military
Supply Voltage
Military
Minimum Input Edge Rate
Data Input
Enable Input
−0.5V to +7.0V
−0.5V to +7.0V
−30 mA to +5.0 mA
−0.5V to 5.5V
−55˚C to +125˚C
+4.5V to +5.5V
(∆V/∆t)
50 mV/ns
20 mV/ns
DC Electrical Characteristics
Symbol
Parameter
FCT541
Min
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VCD
Input Clamp Diode Voltage
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
IIH
Input HIGH Current
Typ
Units
VCC
Conditions
Max
2.0
V
0.8
V
−1.2
V
Recognized HIGH Signal
Min
54FCT
4.3
V
Min
54FCT
2.4
V
Min
V
Min
54FCT
0.2
54FCT
0.55
V
Min
5
µA
Max
Recognized LOW Signal
IIN = −18 mA
IOH = −300 µA
IOH = −12 mA
IOL = 300 µA
IOL = 48 mA
VIN = VCC
VIN = 0.0V
VOUT = 5.5V; OEn = 2.0V
VOUT = 0.0V; OEn = 2.0V
VOUT = 0.0V
IIL
Input LOW Current
−5
µA
Max
IOZH
Output Leakage Current
10
µA
Max
IOZL
Output Leakage Current
−10
µA
Max
IOS
Output Short-Circuit Current
-60
mA
Max
ICCQ
Quiescent Power
Supply Current
1.5
mA
Max
∆ICC
Quiescent Power
Supply Current
2.0
mA
Max
ICCD
Dynamic ICC
0.4
mA/
MHz
Max
VCC = 5.5V, Outputs Open,
One Bit Toggling, 50% Duty
Cycle, OEn = GND
ICC
Total Power Supply
Current
6.0
mA
Max
VCC = 5.5V, Outputs Open, fI
= 10MHz, OEn = GND, One
Bit Toggling, 50% Duty Cycle,
OEn = GND
VIN < 0.2V or VIN 5.3V, VCC =
5.5V
VI = VCC − 2.1V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions
is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
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2
Symbol
54FCT
TA = −55˚C to +125˚C
VCC = 4.5V–5.5V
Parameter
Fig.
Units
No.
ns
Figure
4
ns
Figure
5
ns
Figure
5
CL = 50 pF
Min
Max
2.0
9.0
tPLH
Propagation Delay
tPHL
Data to Outputs
2.0
9.0
tPZH
Output Enable Time
2.0
12.5
2.0
12.5
2.0
12.5
2.0
12.5
tPZL
tPHZ
Output Disable Time
tPLZ
Capacitance
Symbol
Parameter
Max
Units
Conditions
TA = 25˚C
VCC = 0.0V
VCC = 5.0V
CIN
Input Capacitance
10.0
pF
COUT (Note 3)
Output Capacitance
12.0
pF
Note 3: COUT is measured at frequency of f = 1 MHz, per MIL-STD-883B, Method 3012.
3
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54FCT541
AC Electrical Characteristics
54FCT541
AC Loading
DS100953-3
DS100953-4
FIGURE 2. Test Input Signal Levels
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
Amplitude
Rep. Rate
tw
tr
tf
3.0V
1 MHz
500 ns
2.5 ns
2.5 ns
FIGURE 3. Test Input Signal Requirements
AC Waveforms
DS100953-5
DS100953-7
FIGURE 4. Propagation Delay Waveforms for
Inverting and Non-Inverting Functions
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FIGURE 5. TRI-STATE Output HIGH and LOW
Enable and Disable Time
4
54FCT541
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Terminal Ceramic Chip Carrier
NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package
NS Package Number J20A
5
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54FCT541 Octal Buffer/Line Driver with TRI-STATE Outputs
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Ceramic Flatpack
NS Package Number W20A
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