NSC 54ABT240

54ABT240
Octal Buffer/Line Driver with TRI-STATE ® Outputs
General Description
The ’ABT240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock
driver and bus oriented transmitter or receiver which provides improved PC board density.
n Guaranteed latchup protection
n High impedance glitch free bus loading during entire
power up and power down cycle
n Nondestructive hot insertion capability
n Standard Microcircuit Drawing (SMD) — 5962-9318801
Features
n Output sink capability of 48 mA, source capability of
24 mA
Ordering Code
Package
Number
Military
Package Description
54ABT240J-QML
J20A
20-Lead Ceramic Dual-In-Line
54ABT240W-QML
W20A
20-Lead Cerpack
54ABT240E-QML
E20A
20-Lead Ceramic Leadless Chip Carrier, Type C
Connection Diagrams
Pin Assignment
for DIP and Flatpak
Pin Assignment
for LCC
DS100202-2
DS100202-1
Pin Names
OE1, OE2
Description
TRI-STATE Output
Enable Inputs
I0–I7
Inputs
O0–O7
Outputs
TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100202
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54ABT240 Octal Buffer/Line Driver with TRI-STATE Outputs
July 1998
Truth Tables
Inputs
In
Outputs
(Pins 12, 14, 16, 18)
L
L
H
L
H
L
H
X
Z
In
Outputs
(Pins 3, 5, 7, 9)
L
L
H
L
H
L
H
X
Z
OE1
Inputs
OE2
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
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2
Absolute Maximum Ratings (Note 1)
Current Applied to Output
in LOW State (Max)
DC Latchup Source Current
(Across Comm Operating
Range)
Over Voltage Latchup (I/O)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
Ceramic
VCC Pin Potential to
Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Any Output
in the Disabled or
Power-Off State
in the HIGH State
−65˚C to +150˚C
−55˚C to +125˚C
twice the rated IOL (mA)
−150 mA
10V
Recommended Operating
Conditions
−55˚C to +175˚C
−0.5V to +7.0V
−0.5V to +7.0V
−30 mA to +5.0 mA
Free Air Ambient Temperature
Military
Supply Voltage
Military
Minimum Input Edge Rate
Data Input
Enable Input
−0.5V to 5.5V
−0.5V to VCC
−55˚C to +125˚C
+4.5V to +5.5V
(∆V/∆t)
50 mV/ns
20 mV/ns
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under these
conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
Parameter
ABT240
Min
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VCD
Input Clamp Diode Voltage
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
IIH
Input HIGH Current
Typ
Units
VCC
Conditions
Max
2.0
V
Recognized HIGH Signal
0.8
V
Recognized LOW Signal
−1.2
V
Min
IIN = −18 mA
54ABT
2.5
V
Min
IOH = −3 mA
54ABT
2.0
V
Min
IOH = −24 mA
0.55
V
Min
IOL = 48 mA
5
µA
Max
54ABT
VIN = 2.7V (Note 4)
VIN = VCC
5
IBVI
Input HIGH Current Breakdown Test
7
µA
Max
VIN = 7.0V
IIL
Input LOW Current
−5
µA
Max
VIN = 0.5V (Note 4)
V
0.0
VIN = 0.0V
−5
VID
Input Leakage Test
4.75
IID = 1.9 µA
All Other Pins Grounded
VOUT = 2.7V; OEn = 2.0V
IOZH
Output Leakage Current
50
µA
0 − 5.5V
IOZL
Output Leakage Current
−50
µA
0 − 5.5V
IOS
Output Short-Circuit Current
−275
mA
Max
VOUT = 0.0V
ICEX
Output High Leakage Current
50
µA
Max
VOUT = VCC
IZZ
Bus Drainage Test
100
µA
0.0
VOUT = 5.5V; All Others GND
ICCH
Power Supply Current
50
µA
Max
All Outputs HIGH
ICCL
Power Supply Current
30
mA
Max
All Outputs LOW
ICCZ
Power Supply Current
50
µA
Max
−100
VOUT = 0.5V; OEn = 2.0V
OEn = VCC;
All Others at VCC or Ground
ICCT
Additional ICC/Input
Max
VI = VCC − 2.1V
Outputs Enabled
1.5
mA
Outputs TRI-STATE
1.5
mA
Enable Input VI = VCC − 2.1V
Outputs TRI-STATE
50
µA
Data Input VI = VCC − 2.1V
All Others at VCC or Ground
ICCD
Dynamic ICC
No Load
mA/
(Note 4)
0.1
MHz
Max
Outputs Open
OEn = GND, (Note 3)
One Bit Toggling, 50% Duty Cycle
Note 3: For 8 bits toggling, ICCD < 0.8 mA/MHz.
Note 4: Guaranteed, but not tested.
3
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AC Electrical Characteristics
Symbol
Parameter
54ABT
TA = −55˚C to +125˚C
VCC = 4.5V–5.5V
Units
Fig.
No.
ns
Figure 5
ns
Figure 4
ns
Figure 4
CL = 50 pF
Min
Max
tPLH
Propagation Delay
0.8
5.5
tPHL
Data to Outputs
1.0
5.5
tPZH
Output Enable
0.8
7.5
tPZL
Time
0.8
7.7
tPHZ
Output Disable
1.0
7.5
tPLZ
Time
1.0
7.2
Capacitance
Symbol
Parameter
Typ
Units
CIN
Input Capacitance
5.0
pF
COUT (Note 5)
Output Capacitance
9.0
pF
Conditions
TA = 25˚C
VCC = 0V
VCC = 5.0V
Note 5: COUT is measured at frequency f = 1 MHz, per MIL-STD-883B, Method 3012.
AC Loading
Amplitude
Rep. Rate
tW
tr
tf
3.0V
1 MHz
500 ns
2.5 ns
2.5 ns
FIGURE 3. Test Input Signal Requirements
DS100202-3
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
DS100202-4
FIGURE 2. Test Input Signal Levels
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4
AC Waveforms
DS100202-7
DS100202-6
FIGURE 5. Propagation Delay Waveforms for
Inverting and Non-Inverting Functions
FIGURE 4. TRI-STATE Output HIGH
and LOW Enable and Disable Times
5
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6
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Terminal Ceramic Chip Carrier (L)
NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J20A
7
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54ABT240 Octal Buffer/Line Driver with TRI-STATE Outputs
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Ceramic Flatpak (F)
NS Package Number W20A
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2. A critical component in any component of a life support
1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into
sonably expected to cause the failure of the life support
the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness.
ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
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