ETC 74LVX132TTR

74LVX132
LOW VOLTAGE CMOS QUAD 2-INPUT SCHMITT NAND GATE
WITH 5V TOLERANT INPUTS
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HIGH SPEED :
tPD = 5.9ns (TYP.) at VCC = 3.3V
5V TOLERANT INPUTS
LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA=25°C
TYPICAL HYSTERESIS : 0.7V at VCC = 3.3V
LOW NOISE:
VOLP = 0.3V (TYP.) at VCC = 3.3V
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 132
IMPROVED LATCH-UP IMMUNITY
POWER DOWN PROTECTION ON INPUTS
DESCRIPTION
The 74LVX132 is a low voltage CMOS QUAD
2-INPUT SCHMITT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications. Power down protection is provided
on all inputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage.
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
T&R
SOP
TSSOP
74LVX132M
74LVX132MTR
74LVX132TTR
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
Pin configuration and function are the same as
those of the 74LVX00 but the 74LVX132 has
hysteresis.
This together with its schmitt trigger function
allows it to be used on line receivers with slow
rise/fall input signals.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/8
74LVX132
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
1A to 4A
1B to 4B
1Y to 4Y
GND
VCC
14
NAME AND FUNCTION
Data Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
A
B
Y
L
L
H
H
L
H
L
H
H
H
H
L
ABSOLUTE MAXIMUM RATINGS
Symbol
V CC
Parameter
Value
Unit
Supply Voltage
-0.5 to +7.0
V
VI
DC Input Voltage
-0.5 to +7.0
V
VO
DC Output Voltage
-0.5 to VCC + 0.5
V
IIK
DC Input Diode Current
- 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Current
± 25
mA
± 50
mA
-65 to +150
°C
300
°C
ICC or IGND DC VCC or Ground Current
Tstg
Storage Temperature
TL
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
Value
Unit
Supply Voltage (note 1)
2 to 3.6
V
VI
Input Voltage
0 to 5.5
V
VO
Output Voltage
0 to VCC
V
Top
Operating Temperature
-55 to 125
°C
V CC
Parameter
1) Truth Table guaranteed: 1.2V to 3.6V
2/8
74LVX132
DC SPECIFICATIONS
Test Condition
Symbol
Vt+
VtVH
VOH
VOL
II
ICC
Parameter
High Level Input
Threshold
Low Level Input
Threshold
Hysteresis Voltage
High Level Output
Voltage
Low Level Output
Voltage
Input Leakage
Current
Quiescent Supply
Current
Value
TA = 25°C
VCC
(V)
Min.
Typ.
Max.
3.0
-40 to 85°C
-55 to 125°C
Min.
Min.
2.2
3.0
0.9
3.0
0.3
1.2
0.3
Max.
Unit
Max.
2.2
2.2
V
0.9
0.9
V
1.2
V
1.2
0.3
2.0
IO=-50 µA
1.9
2.0
1.9
1.9
3.0
IO=-50 µA
2.9
3.0
2.9
2.9
3.0
IO=-4 mA
2.58
2.0
IO=50 µA
0.0
0.1
0.1
0.1
3.0
IO=50 µA
0.0
0.1
0.1
0.1
3.0
IO=4 mA
0.36
0.44
0.55
3.6
VI = 5V or GND
± 0.1
±1
±1
µA
3.6
VI = VCC or GND
2
20
20
µA
2.48
V
2.4
V
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition
Symbol
Parameter
VOLP
Dynamic Low
Voltage Quiet
Output (note 1, 2)
Dynamic High
Voltage Input (note
1, 3)
Dynamic Low
Voltage Input (note
1, 3)
V OLV
V IHD
VILD
Value
TA = 25°C
VCC
(V)
Min.
3.3
-0.5
3.3
Typ.
Max.
0.3
0.5
-55 to 125°C
Min.
Min.
Max.
Unit
Max.
-0.3
2.2
C L = 50 pF
3.3
-40 to 85°C
V
0.9
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold
(VIHD), f=1MHz.
3/8
74LVX132
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns)
Test Condition
Symbol
Parameter
tPLH tPHL Propagation Delay
Time
tOSLH
tOSHL
Output To Output
Skew Time (note1,
2)
VCC
(V)
CL
(pF)
2.7
2.7
Value
TA = 25°C
Min.
-40 to 85°C
-55 to 125°C
Typ.
Max.
Min.
Max.
Min.
Max.
15
50
7.5
8.3
10.5
12.0
1.0
1.0
12.0
13.5
1.0
1.0
12.0
13.5
3.3 (*)
15
5.9
8.0
1.0
9.0
1.0
9.0
3.3 (*)
2.7
50
6.5
9.0
1.0
10.0
1.0
10.0
50
3.3 (*)
50
0.5
0.5
1.0
1.0
1.5
1.5
1.5
1.5
Unit
ns
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V ± 0.3V
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
VCC
(V)
Value
TA = 25°C
Min.
Typ.
Max.
10
CIN
Input Capacitance
3.3
6
C PD
Power Dissipation
Capacitance
(note 1)
3.3
16
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
10
Unit
Max.
10
pF
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per gate)
4/8
74LVX132
TEST CIRCUIT
C L =15/50pF or equivalent (includes jig and probe capacitance)
R T = ZOUT of pulse generator (typically 50Ω)
WAVEFORM : PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
5/8
74LVX132
SO-14 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.2
a2
MAX.
0.003
0.007
1.65
0.064
b
0.35
0.46
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
0.019
c1
45° (typ.)
D
8.55
8.75
0.336
0.344
E
5.8
6.2
0.228
0.244
e
1.27
0.050
e3
7.62
0.300
F
3.8
4.0
0.149
0.157
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
0.050
M
S
0.68
0.026
8° (max.)
PO13G
6/8
74LVX132
TSSOP14 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
MAX.
1.2
A1
0.05
A2
0.8
b
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0089
D
4.9
5
5.1
0.193
0.197
0.201
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
1
e
0.65 BSC
K
0°
L
0.45
A
0.60
0.0256 BSC
8°
0°
0.75
0.018
8°
0.024
0.030
A2
A1
b
e
K
c
L
E
D
E1
PIN 1 IDENTIFICATION
1
0080337D
7/8
74LVX132
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its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this pub lication are subject to change without notice. Thi s pub lication supersedes and replaces all information
previously supplied. STMicroelectronics prod ucts are not authori zed for use as critical components in life suppo rt devices or
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