PROFET® BTS611L1
Smart Two Channel Highside Power Switch
Features
Product Summary
Overvoltage protection
Operating voltage
• Overload protection
• Current limitation
• Short circuit protection
• Thermal shutdown
• Overvoltage protection (including load dump)
• Fast demagnetization of inductive loads
• Reverse battery protection1)
• Undervoltage and overvoltage shutdown with
auto-restart and hysteresis
• Open drain diagnostic output
• Open load detection in ON-state
• CMOS compatible input
• Loss of ground and loss of Vbb protection
• Electrostatic discharge (ESD) protection
Vbb(AZ)
Vbb(on)
43
5.0 ... 34
V
V
both
channels:
each parallel
200
100 mΩ
2.3
4.4
A
4
4
A
On-state resistance RON
Load current (ISO) ,/,62
Current limitation
,/6&U
TO-220AB/7
7
Application
1
• µC compatible power switch with diagnostic
Standard
feedback for 12 V and 24 V DC grounded loads
• All types of resistive, inductive and capacitve
loads
• Replaces electromechanical relays, fuses and discrete circuits
7
7
1
Straight leads
1
SMD
General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic
feedback, monolithically integrated in Smart SIPMOS technology. Fully protected by embedded protection
functions.
Voltage
source
V
3
IN1
6
IN2
ESD
5
Overvoltage
protection
Level shifter
sensor
Rectifier 1
Logic
Limit for
unclamped
ind. loads 1
4
Charge
pump 2
PROFET
Current
limit 2
1
Temperature
sensor 1
Gate 2
protection
Limit for
unclamped
ind. loads 2
Open load
Short to Vbb
detection 2
GND
2
OUT1
Open load
Short to Vbb
detection 1
Charge
pump 1
Level shifter
Rectifier 2
1)
+ V bb
Gate 1
protection
Logic
Voltage
ST
Current
limit 1
Signal GND
OUT2
7
Temperature
sensor 2
R
R
O1
Load
O2
GND
Load GND
With external current limit (e.g. resistor RGND=150 Ω) in GND connection, resistor in series with ST
connection, reverse load current limited by connected load.
Semiconductor Group
Page 1 of 15
20.Dec.96
BTS611L1
Pin
Symbol
Function
1
OUT1 (Load, L)
Output 1, protected high-side power output of channel 1
2
GND
Logic ground
3
IN1
Input 1, activates channel 1 in case of logical high signal
4
Vbb
5
ST
Positive power supply voltage,
the tab is shorted to this pin
Diagnostic feedback: open drain, low on failure
6
IN2
Input 2, activates channel 2 in case of logical high signal
7
OUT2 (Load, L)
Output 2, protected high-side power output of channel 2
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter
Supply voltage (overvoltage protection see page 4)
Supply voltage for full short circuit protection
Tj Start=-40 ...+150°C
Load dump protection2) VLoadDump = UA + Vs, UA = 13.5 V
RI3)= 2 Ω, RL= 5.3 Ω, td= 200 ms, IN= low or high
Load current (Short circuit current, see page 5)
Operating temperature range
Storage temperature range
Power dissipation (DC), TC ≤ 25 °C
Inductive load switch-off energy dissipation, single pulse
Vbb = 12V, Tj,start = 150°C, TC = 150°C const.
one channel, IL = 2.3 A, ZL = 89 mH, 0 Ω:
both channels parallel, IL = 4.4 A, ZL = 47 mH, 0 Ω:
Symbol
Vbb
Vbb
Values
43
34
Unit
V
V
60
V
IL
Tj
Tstg
Ptot
self-limited
-40 ...+150
-55 ...+150
36
A
°C
EAS
290
580
mJ
1.0
2.0
kV
-10 ... +16
±2.0
±5.0
V
mA
VLoad dump4)
W
see diagrams on page 9
Electrostatic discharge capability (ESD)
(Human Body Model)
IN: VESD
all other pins:
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
VIN
IIN
IST
Input voltage (DC)
Current through input pin (DC)
Current through status pin (DC)
see internal circuit diagrams page 7
2)
3)
4)
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a
150 Ω resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for the
protection of the input is integrated.
RI = internal resistance of the load dump test pulse generator
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
Semiconductor Group
Page 2
20.Dec.96
BTS611L1
Thermal Characteristics
Parameter and Conditions
Thermal resistance
Symbol
chip - case, both channels: RthJC
each channel:
junction - ambient (free air): RthJA
SMD version, device on PCB5):
min
----
Values
typ
max
-3.5
-7.0
-75
37
Unit
K/W
Electrical Characteristics
Parameter and Conditions, each channel
Symbol
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Values
min
typ
max
Unit
Load Switching Capabilities and Characteristics
On-state resistance (pin 4 to 1 or 7)
IL = 1.8 A
Tj=25 °C: RON
each channel
Tj=150 °C:
Nominal load current, ISO Norm (pin 4 to 1 or 7)
VON = 0.5 V, TC = 85 °C
each channel: IL(ISO)
both channels parallel:
Output current (pin 1 or 7) while GND disconnected
or GND pulled up, Vbb=30 V, VIN= 0, see diagram
page 8
Turn-on time
IN
to 90% VOUT:
Turn-off time
IN
to 10% VOUT:
RL = 12 Ω, Tj =-40...+150°C
Slew rate on
10 to 30% VOUT, RL = 12 Ω, Tj =-40...+150°C
Slew rate off
70 to 40% VOUT, RL = 12 Ω, Tj =-40...+150°C
5)
--
160
200
400
1.8
3.5
320
2.3
4.4
--
--
--10
ton
toff
80
80
200
200
400
400
µs
dV /dton
0.1
--
1
V/µs
-dV/dtoff
0.1
--
1
V/µs
IL(GNDhigh)
mΩ
A
mA
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air.
Semiconductor Group
Page 3
20.Dec.96
BTS611L1
Parameter and Conditions, each channel
Symbol
Values
min
typ
max
Tj =-40...+150°C:
Tj =-40...+150°C:
Tj =-40...+25°C:
Tj =+150°C:
Undervoltage restart of charge pump
see diagram page 13
Undervoltage hysteresis
∆Vbb(under) = Vbb(u rst) - Vbb(under)
Overvoltage shutdown
Tj =-40...+150°C:
Overvoltage restart
Tj =-40...+150°C:
Overvoltage hysteresis
Tj =-40...+150°C:
Overvoltage protection7)
Tj =-40...+150°C:
Ibb=40 mA
Standby current (pin 4)
VIN=0
Tj=-40...+25°C:
Tj= 150°C:
Vbb(on)
Vbb(under)
Vbb(u rst)
5.0
3.5
--
----
Vbb(ucp)
--
∆Vbb(under)
Vbb(over)
Vbb(o rst)
∆Vbb(over)
Vbb(AZ)
Leakage output current (included in Ibb(off))
VIN=0
Operating current (Pin 2)8), VIN=5 V
both channels on, Tj =-40...+150°C
Operating current (Pin 2)8)
one channel on, Tj =-40...+150°C:
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Operating Parameters
Operating voltage6)
Undervoltage shutdown
Undervoltage restart
6)
7)
8)
Unit
5.6
34
5.0
5.0
7.0
7.0
V
--
0.2
--
V
34
33
-42
--0.5
47
43
----
V
V
V
V
14
17
--
30
35
12
µA
IL(off)
----
IGND
--
4
6
mA
IGND
--
2
3
mA
Ibb(off)
V
V
V
µA
At supply voltage increase up to Vbb= 5.6 V typ without charge pump, VOUT ≈Vbb - 2 V
See also VON(CL) in table of protection functions and circuit diagram page 8.
Add IST, if IST > 0, add IIN, if VIN>5.5 V
Semiconductor Group
Page 4
20.Dec.96
BTS611L1
Parameter and Conditions, each channel
Symbol
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Protection Functions
Initial peak short circuit current limit (pin 4 to 1
or 7)
Tj =-40°C:
Tj =25°C:
Tj =+150°C:
Repetitive short circuit shutdown current limit
Tj = Tjt (see timing diagrams, page 11)
Output clamp (inductive load switch off)
at VOUT = Vbb - VON(CL)
IL= 40 mA:
Thermal overload trip temperature
Thermal hysteresis
Reverse battery (pin 4 to 2) 9)
Reverse battery voltage drop (Vout > Vbb)
IL = -1.8 A, each channel
Tj=150 °C:
Diagnostic Characteristics
Open load detection current
(on-condition)
Values
min
typ
max
Unit
IL(SCp)
5.5
4.5
2.5
9.5
7.5
4.5
13
11
7
A
--
4
--
A
41
150
---
47
-10
--
53
--32
V
°C
K
V
--
610
--
mV
10
10
---
200
150
mA
2
3
4
V
4
10
30
kΩ
IL(SCr)
VON(CL)
Tjt
∆Tjt
-Vbb
-VON(rev)
Tj=-40 °C: IL (OL)
Tj=25 ..150°C:
Open load detection voltage10) (off-condition)
VOUT(OL)
Tj=-40..150°C:
Internal output pull down
(pin 1 or 7 to 2), VOUT=5 V, Tj=-40..150°C
RO
9)
Requires 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal
operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature
protection is not active during reverse current operation! Input and Status currents have to be limited (see
max. ratings page 2 and circuit page 8).
10) External pull up resistor required for open load detection in off state.
Semiconductor Group
Page 5
20.Dec.96
BTS611L1
Parameter and Conditions, each channel
Symbol
Values
min
typ
max
RI
2.5
3.5
6
kΩ
VIN(T+)
VIN(T-)
∆ VIN(T)
IIN(off)
1.7
1.5
-1
--0.5
--
3.5
--50
V
V
V
µA
On state input current (pin 3 or 6), VIN = 3.5 V,
Tj =-40..+150°C
IIN(on)
20
50
90
µA
Delay time for status with open load after switch
off (other channel in off state)
(see timing diagrams, page 12), Tj =-40..+150°C
Delay time for status with open load after switch
off (other channel in on state)
(see timing diagrams, page 12), Tj =-40..+150°C
Status invalid after positive input slope
(open load)
Tj=-40 ... +150°C:
Status output (open drain)
Zener limit voltage Tj =-40...+150°C, IST = +1.6 mA:
ST low voltage
Tj =-40...+25°C, IST = +1.6 mA:
Tj = +150°C, IST = +1.6 mA:
td(ST OL4)
100
320
800
µs
td(ST OL5)
--
5
20
µs
td(ST)
--
200
600
µs
5.4
---
6.1
---
-0.4
0.6
V
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Input and Status Feedback11)
Input resistance
Tj=-40..150°C, see circuit page 7
Input turn-on threshold voltage
Tj =-40..+150°C:
Input turn-off threshold voltage
Tj =-40..+150°C:
Input threshold hysteresis
Off state input current (pin 3 or 6), VIN = 0.4 V,
Tj =-40..+150°C
11)
VST(high)
VST(low)
Unit
If a ground resistor RGND is used, add the voltage drop across this resistor.
Semiconductor Group
Page 6
20.Dec.96
BTS611L1
Truth Table
Normal operation
Open load
Channel 1
Channel 2
Short circuit to Vbb
Channel 1
Channel 2
Overtemperature
both channel
Channel 1
Channel 2
Undervoltage/ Overvoltage
L = "Low" Level
H = "High" Level
bb
IN2
OUT1
OUT2
ST
BTS611L1
ST
BTS612N1
L
L
H
H
L
L
H
L
H
L
H
L
H
X
L
L
H
H
Z
Z
H
L
H
L
H
L
H
X
H
H
H
H
H
H
H
H
L
H
H
L
H
X
L
L
H
L
L
H
L
H
X
L
H
X
H
H
H
Z
Z
H
L
H
X
L
H
X
L
X
H
L
H
X
X
X
L
L
H
L
H
X
X
X
L
H
X
L
H
X
L
L
L
L
L
X
X
L
H
H
H
L
L
L
X
X
L
L
L
H(L12))
H
L
H(L12))
H
L
L13)
H
H(L14))
L13)
H
H(L14))
H
L
L
H
L
H
L
H
L
H
H
L
H
H
L
H
H
H
L
L
H
L
H
L
H
X = don’t care
Z = high impedance, potential depends on external circuit
Status signal after the time delay shown in the diagrams (see fig 5. page 12...13)
Terms
V
IN1
Input circuit (ESD protection)
4
I IN1
3
Ibb
Vbb
IN1
OUT1
I IN2
6
IN2
I ST
ST
V
V
IN1 IN2 V
5
ST
1
PROFET
OUT2
GND
GND
IN
I L1
I
ESD-ZD I
I L2
I
I
GND
7
V
OUT1
2
R
R
V
ON1
VON2
I
GND
VOUT2
ESD zener diodes are not to be used as voltage clamp
at DC conditions. Operation in this mode may result in
a drift of the zener voltage (increase of up to 1 V).
12)
With additional external pull up resistor
An external short of output to Vbb, in the off state, causes an internal current from output to ground. If RGND
is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious.
14) Low resistance to V may be detected in the ON-state by the no-load-detection
bb
13)
Semiconductor Group
Page 7
20.Dec.96
BTS611L1
Status output
Open-load detection
+5V
ON-state diagnostic condition: VON < RON * IL(OL); IN
high
R ST(ON)
ST
+ V bb
ESDZD
GND
VON
ON
ESD-Zener diode: 6.1 V typ., max 5 mA;
RST(ON) < 380 Ω at 1.6 mA, ESD zener diodes are not
to be used as voltage clamp at DC conditions.
Operation in this mode may result in a drift of the zener
voltage (increase of up to 1 V).
OUT
Open load
detection
Logic
unit
Inductive and overvoltage output clamp
+ V bb
V
OFF-state diagnostic condition: VOUT > 3 V typ.; IN low
Z
VON
R
OFF
OUT
GND
EXT
PROFET
V
Open load
detection
Logic
unit
VON clamped to 47 V typ.
Overvolt. and reverse batt. protection
R
OUT
O
Signal GND
+ V bb
IN1
V
RI
GND disconnect
Z2
IN2
Logic
R ST
V
4
bb
ST
3
V
IN1
Ibb
Vbb
OUT1
Z1
6
IN2
PROFET
ST
GND
GND
OUT2
R GND
5
7
2
Signal GND
VZ1 = 6.1 V typ., VZ2 = 47 V typ., RI= 3.5 kΩ typ,
RGND= 150 Ω
1
V
V
V
IN1 IN2 ST
V
GND
Any kind of load. In case of Input=high is VOUT ≈ VIN - VIN(T+) .
Due to VGND >0, no VST = low signal available.
Semiconductor Group
Page 8
20.Dec.96
BTS611L1
GND disconnect with GND pull up
Inductive Load switch-off energy
dissipation
E bb
4
3
V
Vbb
IN1
OUT1
IN1
6
V
IN2
5
IN2
PROFET
ST
GND
OUT2
E AS
1
IN
7
V
bb
OUT
PROFET
2
V
ELoad
Vbb
=
V
ST
ST
EL
GND
GND
ZL
{
L
RL
ER
Any kind of load. If VGND > VIN - VIN(T+) device stays off
Due to VGND >0, no VST = low signal available.
Vbb disconnect with energized inductive
load
Vbb
IN1
OUT1
high
6
OUT2
5
1
EAS= Ebb + EL - ER= ∫ VON(CL)·iL(t) dt,
PROFET
IN2
ST
2
EL = 1/2·L·I L
While demagnetizing load inductance, the energy
dissipated in PROFET is
4
3
Energy stored in load inductance:
with an approximate solution for RL > 0 Ω:
7
GND
EAS=
2
V
IL· L
IL·RL
·(V + |VOUT(CL)|)· ln (1+
)
|VOUT(CL)|
2·RL bb
Maximum allowable load inductance for
a single switch off (both channels parallel)
bb
Normal load current can be handled by the PROFET
itself.
L = f (IL ); Tj,start = 150°C,TC = 150°C const.,
Vbb = 12 V, RL = 0 Ω
L [mH]
1000
Vbb disconnect with charged external
inductive load
4
3
IN1
Vbb
OUT1
high
6
IN2
PROFET
ST
GND
OUT2
5
1
100
D
7
2
V
10
bb
If other external inductive loads L are connected to the PROFET,
additional elements like D are necessary.
1
2
3
4
5
6
7
8
IL [A]
Semiconductor Group
Page 9
20.Dec.96
BTS611L1
Typ. transient thermal impedance chip case
ZthJC = f(tp), one Channel active
ZthJC [K/W]
10
1
D=
0.5
0.2
0.1
0.05
0.02
0.01
0
0.1
0.01
1E-5
1E-4
1E-3
1E-2
1E-1
1E0
1E1
tp [s]
Typ. transient thermal impedance chip case
ZthJC = f(tp), both Channel active
ZthJC [K/W]
10
1
D=
0.5
0.2
0.1
0.05
0.02
0.01
0
0.1
0.01
1E-5
1E-4
1E-3
1E-2
1E-1
1E0
1E1
tp [s]
Semiconductor Group
Page 10
20.Dec.96
BTS611L1
Timing diagrams
Both channels are symmetric and consequently the diagrams
are valid for each channel as well as for permuted channels
Figure 1a: Vbb turn on:
Figure 2b: Switching an inductive load
IN1
IN
IN2
V bb
t
ST
d(ST)
*)
V
OUT1
V
OUT
V
OUT2
IL
ST open drain
I L(OL)
t
t
*) if the time constant of load is too large, open-load-status may
occur
Figure 2a: Switching a lamp:
Figure 3a: Short circuit
shut down by overtempertature, reset by cooling
IN
IN
other channel: normal operation
ST
V
OUT
IL
I L(SCp)
I
I L(SCr)
L
t
ST
t
Heating up may require several milliseconds, depending on
external conditions
Semiconductor Group
Page 11
20.Dec.96
BTS611L1
Figure 5b: Open load: detection in ON-state, turn
on/off to open load
Figure 4a: Overtemperature:
Reset if Tj <Tjt
IN1
IN2
IN
channel 2: normal operation
V
ST
OUT1
V
I
OUT
L1
channel 1: open load
t
d(ST)
t
d(ST OL4)
t
t
d(ST)
d(ST OL5)
T
J
ST
t
t
Figure 5c: Open load: detection in ON- and OFF-state
(with REXT), turn on/off to open load
Figure 5a: Open load: detection in ON-state, open
load occurs in on-state
IN1
IN1
IN2
IN2
channel 2: normal operation
channel 2: normal operation
V
OUT1
VOUT1
I L1
channel 1:
open
load
IL1
open
load
normal
load
t d(ST OL1) t
d(ST OL2)
channel 1: open load
ST
t d(ST OL1)
t d(ST)
t
d(ST)
t d(ST OL5)
t d(ST OL2)
t
ST
t
td(ST OL5) depends on external circuitry because of high
impedance
td(ST OL1) = 30 µs typ., td(ST OL2) = 20 µs typ
Semiconductor Group
Page 12
20.Dec.96
BTS611L1
Figure 6a: Undervoltage:
Figure 7a: Overvoltage:
IN
IN
V
Vbb
bb
V ON(CL)
Vbb(over)
V bb(o rst)
Vbb(u cp)
V
V
bb(under)
bb(u rst)
V
OUT
V OUT
ST
ST open drain
t
t
Figure 6b: Undervoltage restart of charge pump
on-state
off-state
V
V
bb(u rst)
V
V
V
bb(over)
off-state
VON(CL)
V on
bb(o rst)
bb(u cp)
bb(under)
V bb
charge pump starts at Vbb(ucp) =5.6 V typ.
Semiconductor Group
Page 13
20.Dec.96
BTS611L1
SMD TO 220AB/7, Opt. E3128 Ordering code
Package and Ordering Code
BTS611L1 E3128A T&R:
All dimensions in mm
Standard TO-220AB/7
BTS611L1
TO 220AB/7, Opt. E3230
BTS611L1 E3230
Semiconductor Group
Q67060-S6302-A4
Ordering code
Q67060-S6302-A2
Ordering code
Q67060-S6314
Changed since 04.96
Date Change
Dec
td(ST OL4) max reduced from 1500
1996 to 800µs, typical from 400 to
320µs, min limit unchanged
EAS maximum rating and diagram
and ZthJC diagram added
ESD capability increased
Typ. reverse battery voltage drop VON(rev) added
Page 14
20.Dec.96
BTS611L1
Published by Siemens AG, Bereich Bauelemente, Vertrieb,
Produkt-Information, Balanstraße 73, D-81541 München
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life supporting devices or systems16) with the express written
approval of the Semiconductor Group of Siemens AG.
15) A critical component is a component used in a life-support
device or system whose failure can reasonably be expected to
cause the failure of that life-support device or system, or to
affect its safety or effectiveness of that device or system.
16) Life support devices or systems are intended (a) to be
implanted in the human body or (b) support and/or maintain
and sustain and/or protect human life. If they fail, it is
reasonably to assume that the health of the user or other
persons may be endangered.
Semiconductor Group
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20.Dec.96