LM4914 1W Monaural, 85mW Stereo Headphone Audio Amplifier General Description j Micro-power shutdown supply current The unity-gain stable LM4914 is both a mono differential output (for bridge-tied loads, or BTL) audio power amplifier and a single-ended (SE) stereo headphone amplifier. Operating on a single 5V supply, the mono BTL mode delivers 1W into an 8Ω load. In SE stereo mode, the amplifier delivers 85mW to 32Ω loads. The LM4914 features circuitry that suppresses output transients ("clicks and pops"). j PSRR (f = 1kHz) The LM4914 is designed for notebook and other handheld portable applications. It delivers high quality output power from a surface-mount package and requires few external components. The LM4914 is pin and functionally compatible with the TPA0253. Other features include an active-low micro-power shutdown mode and thermal shutdown protection. The LM4914 is available in a space efficient 10-lead exposed-DAP TSSOP package. Key Specifications 52dB (typ) 52dB (typ) Features n n n n n n n n Advanced "click and pop" suppression circuitry Stereo headphone amplifier mode Low current micro-power shutdown mode Thermal shutdown protection circuitry 2.5V to 5.5V operation Unity-gain stable Gain set with external resistors Space-saving exposed-DAP TSSOP package Applications n PDAs n Cellular phones n Handheld portable electronic devices j BTL output power (RL = 8Ω) VDD = at 3.0V, THD = 0.1% VDD = at 5.0V, THD = 0.1% VDD = at 3.0V, BTL Mode VDD = at 5.0V, BTL Mode 0.03µA (typ) 330mW (typ) 1W (typ) j SE output power (RL = 32Ω) VDD = at 3.0V, THD = 0.1% VDD = at 5.0V, THD = 0.1% 30mW (typ) 85mW (typ) Connection Diagram 200634A0 Top View Order Number LM4914MH See NS package Number MXF10A Boomer ® is a registered trademark of National Semiconductor Corporation. © 2003 National Semiconductor Corporation DS200634 www.national.com LM4914 1W Monaural, 85mW Stereo Headphone Audio Amplifier March 2003 LM4914 Typical Application 200634C3 FIGURE 1. Typical Audio Amplifier Application Circuit www.national.com 2 Infrared (15sec) (Note 3) See AN-450 "Surface Mounting and their Effects on Product Reliability" for other methods of soldering surface-mount devices. If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage 6.0V Storage Temperature Thermal Resistance −65˚C to +150˚C θJA (typ) - MXF10A −0.3V to VDD +0.3V Input Voltage Power Dissipation (Note 4) Internally Limited ESD Susceptibility (Note 5) 2000V ESD Susceptibility (Note 6) 200V Junction Temperature 46˚C/W Operating Ratings Temperature Range 150˚C TMIN ≤ TA ≤ TMAX Solder Information −40˚C ≤ TA ≤ 85˚C 2.5V ≤ VDD ≤ 5.5V Supply Voltage Small Outline Package Vapor Phase (60sec) 220˚C 215˚C Electrical Characteristics for Entire Amplifier (VDD = 5V) (Note 3) The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25˚C. LM4914 Symbol Parameter VDD Supply Voltage Conditions IDD Quiescent Power Supply Current ISD Shutdown Quiescent Power Supply VSHUTDOWN = GND Current VIN = 0V, IO = 0A, No Load VOS Output Offset Voltage VDD = 5V, CBYPASS = 0.47µF, Vripple = 200mVp-p 1kHz sine wave RL = 8Ω Typical Limit (Note 8) (Notes 9, 10) Units (Limits) 2.5 5.5 V (min) V (max) 4 6.5 mA (max) 0.03 5 µA (max) 7 30 mV (max) 52 BTL 60 SE PSRR Power Supply Rejection Ratio HP-SVIH HP-SENSE Logic-High Threshold Voltage 4.5 V (min) HP-SVIL HP-SENSE Logic-Low Threshold Voltage 2.75 V (max) SDVIH Shutdown Logic High Threshold 2.0 V (min) SDVIL Shutdown Logic LowThreshold 0.8 V (max) 3 dB www.national.com LM4914 Absolute Maximum Ratings LM4914 Electrical Characteristics: Bridged-Mode Operation (VDD = 5V) (Note 3) The following specifications apply for the circuit shown in Figure 1, RL = 8Ω, and a measurement bandwidth of 20Hz to 80kHz, unless otherwise specified. Limits apply for TA = 25˚C. LM4914 Symbol Parameter Conditions PO Output Power (Note 1, 11) RL = 8Ω, f = 1kHz, THD+N = 0.1%, AV = 8dB THD+N Total Harmonic Distortion + Noise RL = 8Ω, f = 1kHz, PO = 1W VON Output Voltage Noise CB = 0.47µF, 20Hz < f < 20kHz Typical Limit (Note 8) (Notes 9, 10) 1 Units (Limits) W (min) 0.33 % 35 µVRMS Electrical Characteristics: SE Operation (VDD = 5V) (Note 3) The following specifications apply for the circuit shown in Figure 1 and a measurement bandwidth of 20Hz to 80kHz, unless otherwise specified. Limits apply for TA = 25˚C. LM4914 Symbol Parameter Conditions Typical Limit (Note 8) (Notes 9, 10) Units (Limits) PO Output Power (Note 11) THD+N = 0.1%, f = 1kHz, RL = 32Ω, AV = 1.9dB (Note 12) 85 mW (min) VON Output Voltage Noise CB = 0.47µF, 20Hz < f < 20kHz 13 µVRMS Electrical Characteristics for Entire Amplifier (VDD = 3V) (Note 3) The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25˚C. LM4914 Symbol Parameter VDD Supply Voltage Conditions IDD Quiescent Power Supply Current ISD Shutdown Quiescent Power Supply VSHUTDOWN = GND Current VIN = 0V, IO = 0A, No Load VOS Output Offset Voltage VDD = 3V, CBYPASS = 0.47µF, Vripple = 200mVp-p 1kHz sine wave RL = 8Ω Typical Limit (Note 8) (Notes 9, 10) Units (Limits) 2.5 5.5 V (min) V (max) 2.7 5 mA (max) 0.03 4 µA (max) 7 30 mV (max) 52 BTL 60 SE PSRR Power Supply Rejection Ratio HP-SVIH HP-SENSE Logic-High Threshold Voltage 2.7 V (min) HP-SVIL HP-SENSE Logic-Low Threshold Voltage 1.65 V (max) SDVIH Shutdown Logic High Threshold 2 V (min) SDVIL Shutdown Logic LowThreshold 0.8 V (max) www.national.com 4 dB LM4914 Symbol Parameter PO Output Power (Note 11) THD+N Total Harmonic Distortion + Noise VON Output Voltage Noise Conditions THD = 0.1%, f = 1kHz AV = 14dB, RL = 8Ω Typical Limit (Note 8) (Notes 9, 10) Units (Limits) 330 mW f = 1kHz PO = 250mW 0.2 % CB = 0.47µF, 20Hz < f < 20kHz 29 µVRMS Electrical Characteristics: SE Operation (VDD = 3V) (Note 3) The following specifications apply for the circuit shown in Figure 1 and a measurement bandwidth of 20Hz to 80kHz, unless otherwise specified. Limits apply for TA = 25˚C. LM4914 Symbol Parameter Conditions Typical Limit (Note 8) (Notes 9, 10) Units (Limits) PO Output Power (Note 11) THD+N = 0.1%, f = 1kHz, RL = 32Ω, AV = 1.9dB (Note 12) 30 mW VON Output Voltage Noise CB = 0.47µF, 20Hz < f < 20kHz 13 µVRMS Note 1: When operating on a 5VDC, an LM4914MH that has been properly mounted to a circuit board will deliver 1W into 8Ω. See the Application Information sections for further information concerning PCB layout suggestions to maximize the LM4914MH’s output power into an 8Ω load. Note 2: All voltages are measured with respect to the GND pin unless otherwise specified. Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance. Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4914, see power derating curves for additional information. Note 5: Human body model, 100pF discharged through a 1.5kΩ resistor. Note 6: Machine Model, 220pF–240pF discharged through all pins. Note 7: The given θJA is for an LM4914 packaged in an MH with the Exposed-DAP soldered to an exposed 2in2 area of 1oz printed circuit board copper. Note 8: Typicals are measured at 25˚C and represent the parametric norm. Note 9: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 10: Datasheet minimum and maximum specification limits are guaranteed by design, test, or statistical analysis. Note 11: Output power is measured at the amplifier’s package pins. Note 12: See Application Information section "Single-Ended Output Power Performance and Measurement Considerations" for more information. 5 www.national.com LM4914 Electrical Characteristics: Bridged-Mode Operation (VDD = 3V) (Note 3) The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25˚C. LM4914 External Components Description (Figure 1) Components Functional Description 1. Ri This is the input resistor for the inverting input that, along with the 62.5kΩ internal feedback resistor Rf, sets the first stage’s closed-loop gain. The overall SE gain is AV (SE) = 62.5kΩ / Ri, whereas the overall BTL gain is AV (BTL) = -125kΩ / Ri. Input resistance Ri and input capacitance Ci form a high pass filter. The filter’s cutoff frequency is filter’s cutoff frequency is fC = 1 / 2πRiCi. 2. Ci This is the input coupling capacitor. It blocks DC voltage at the amplifier’s inverting input. Ci and Ri create a highpass filter. The filter’s cutoff frequency is fC = 1 / 2πRiCi. Refer to the Application Information section, SELECTING EXTERNAL COMPONENTS, for an explanation of determining Ci’s value. 3. CC This is the output coupling capacitor. Refer to the Application Information section, SELECTING EXTERNAL COMPONENTS, for an explanation of determining CC’s value. 4. CS The supply bypass capacitor. Refer to the POWER SUPPLY BYPASSING section for information about properly placing, and selecting the value of this capacitor. 5. CB This capacitor filters the half-supply voltage present on the BYPASS pin. Refer to the Application Information section, SELECTING EXTERNAL COMPONENTS, for information about properly placing, and selecting the value of this capacitor. Typical Performance Characteristics THD+N vs Output Power VDD = 3V, BTL AV = 8dB, RL = 8Ω THD+N vs Output Power VDD = 3V, BTL, f = 1kHz AV = 8dB, RL = 8Ω 200634C6 200634C4 THD+N vs Output Power VDD = 5V, BTL, f = 1kHz AV = 8dB, RL = 8Ω THD+N vs Output Power VDD = 3V, Stereo AV = 1.9dB, RL = 32Ω 200634C8 www.national.com 200634C9 6 LM4914 Typical Performance Characteristics (Continued) THD+N vs Output Power VDD = 5V, Stereo AV = 1.9dB, RL = 32Ω THD+N vs Output Power VDD = 5V, BTL AV = 8dB, RL = 8Ω 200634D1 200634D3 THD+N vs Frequency VDD = 3V, Stereo AV = 1.9dB, BW = 20Hz to 20kHz THD+N vs Frequency VDD = 3V, BTL, RL = 8Ω AV = 8dB, PO = 250mW 200634C5 200634C7 THD+N vs Frequency VDD = 5V, BTL RL = 8Ω, PO = 1W THD+N vs Frequency VDD = 5V, Stereo, AV = 1.9dB 200634D0 200634D2 7 www.national.com LM4914 Typical Performance Characteristics (Continued) PSRR vs Frequency VDD = 5V, BTL AV = 8dB, CB = 0.47µF Output Voltage Noise vs Frequency 200634D5 200634D4 PSRR vs Frequency VDD = 5V, Stereo AV = 1.9dB, CB = 0.47µF 200634D6 www.national.com 8 LM4914 Application Information 200634C3 FIGURE 2. Typical Audio Amplifier Application Circuit Bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single amplifier’s output and ground. At any given supply voltage, bridge mode has a distinct advantage over the single-ended configuration: its differential output doubles the voltage swing across the load. Theoretically, this produces four times the output power when compared to a single-ended, capacitively coupled amplifier under the same conditions. This increase in attainable output power assumes that an amplifier is not current limited and that the output signal is not clipped. To ensure minimum output signal clipping when choosing an amplifier’s closed-loop gain, refer to the Audio Power Amplifier Design section. BRIDGE (BTL) OR SINGLE-ENDED (SE) CONFIGURATION EXPLANATION As shown in Figure 2, the LM4914 consists of one input multiplexer (MUX) and two power amplifiers designed to drive loads that have a minimum impedance of 4Ω. In mono BTL mode, AMP1 and AMP2 drive a speaker connected between their outputs. In stereo SE mode, AMP1 and AMP2 each drive a SE load such as stereo headphones. In mono BTL mode, R1 works with one of AMP1’s internal 62.5kW feedback resistors to set this amplifier’s gain. AMP2 operates unity gain, set by two internal 20kΩ resistors. In stereo SE modes, R2 and R3 work with AMP1’s and AMP2’s internal 62.5kΩ feedback resistors to set each amplifier’s gain. The LM4914 drives a BTL load, such as a speaker, connected between AMP1’s and AMP2’s outputs. Two SE loads can also be connected to the LM4914’s outputs, one driven by AMP1 and the other driven by AMP2. When the LM4914 operates in BTL mode, AMP1’s output serves as AMP2’s input through AMP2’s input MUX. This results in AMP1 and AMP2 producing signals identical in magnitude, but 180˚ out of phase. Taking advantage of this phase difference, a load placed between ROUT/M+ and LOUT/M- is driven differentially (commonly referred to as "bridge mode"). This results in a differential, or BTL, gain of AV (BTL) = -2(AV(SE)) AV (SE) = -2(62.5kΩ) / Ri AV (BTL) = -125kΩ / Ri (1) POWER DISSIPATION Power dissipation is a major concern when designing a successful single-ended or bridged amplifier. Equation (2) states the maximum power dissipation point for a singleended amplifier operating at a given supply voltage and driving a specified output load. (2) PDMAX-SE = (VDD)2 / 2π2RL: Single-Ended However, a direct consequence of the increased power delivered to the load by a bridge amplifier is higher internal power dissipation for the same conditions. The LM4914 has two operational amplifiers driving a mono bridge load. The maximum internal power dissipation operating in the bridge mode is twice that of a single-ended amplifier. From Equation (3), assuming a 5V power supply and an 8Ω load, the maximum BTL-mode power dissipation is 158mW. 9 www.national.com LM4914 Application Information PDMAX-MONOBTL = 2(VDD)2 / 2π2RL: design. Failing to optimize thermal design may compromise the LM4914’s high power performance and activate unwanted, though necessary, thermal shutdown protection. (Continued) Bridge Mode (3) The maximum power dissipation point given by Equation (3) must not exceed the power dissipation given by Equation (4): (4) PDMAX’ = (TJMAX - TA) / θJA The MH package must have its DAP soldered to a copper pad on the PCB. The DAP’s PCB copper pad is connected to a large plane of continuous unbroken copper. This plane forms a thermal mass, and heat sink, and radiation area. Place the heat sink area on either outside plane in the case of a two-sided PCB, or on an inner layer of a board with more than two layers. Connecting to a ground plane is permissible. Connect the DAP copper pad to the inner layer or backside copper heat sink area with 4(2x2) vias. The via diameter should be 0.012in-0.013in with a 1.27mm pitch. Ensure efficient thermal conductivity by plating-through and solder-filling the vias. Best thermal performance is achieved with the largest practical copper heatsink area. If the heatsink and amplifier share the same PCB layer, a nominal 2.5in2 (min) area is necessary for 5V operation with an 8Ω load. The heatsink area should be 5in2 (min) when placed on a layer different from that used by the LM4914. The last two area recommendations apply for 25˚C ambient temperature. Increase the area to compensate for ambient temperatures above 25˚C. In all circumstances and conditions, the junction temperature must be held below 150˚C to prevent activating the LM4914’s thermal shutdown protection. The LM4914’s power de-rating curve in the Typical Performance Characteristics shows the maximum power dissipation versus temperature. An example PCB layout for the LM4914’s exposedDAP package is shown in the Demonstration Board Layout section. The LM4914’s TJMAX = 150˚C. In the MH package, the LM4914’s θJA is 46˚C/W. At any given ambient temperature TA, use Equation (4) to find the maximum internal power dissipation supported by the IC packaging. Rearranging Equation (4) and substituting PDMAX for PDMAX ’ results in Equation (5). This equation gives the maximum ambient temperature that still allows maximum mono BTL power dissipation without violating the LM4914’s maximum junction temperature. (5) TA = TJMAX - PDMAX-MONOBTLθJA For a typical application with a 5V power supply and an 8Ω load, the maximum ambient temperature that allows maximum BTL power dissipation without exceeding the maximum junction temperature is approximately 134˚C for the IBL package. (6) TJMAX = PDMAX-MONOBTLθJA + TA Equation (6) gives the maximum junction temperature TJMAX. If the result violates the LM4914’s 150˚C TJMAX, reduce the maximum junction temperature by decreasing the power supply voltage or increasing the load resistance. Further allowance should be made for increased ambient temperatures. The above examples assume that a device is a surface mount part operating around the maximum power dissipation point. Since internal power dissipation is a function of output power, higher ambient temperatures are allowed as output power or duty cycle decreases. If the result of Equation (3) is greater than that of Equation (4), then decrease the supply voltage, increase the load impedance, or reduce the ambient temperature. If these measures are insufficient, a heat sink can be added to reduce θJA. The heat sink can be created using additional copper area around the package, with connections to the ground pin(s), supply pin and amplifier output pins. External, solder attached SMT heatsinks such as the Thermalloy 7106D can also improve power dissipation. When adding a heat sink, the θJA is the sum of θJC, θCS, and θSA. (θJC is the junction-to-case thermal impedance, θCS is the case-to-sink thermal impedance, and θSA is the sink-toambient thermal impedance.) Refer to the Typical Performance Characteristics curves for power dissipation information at lower output power levels. PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 4Ω LOADS Power dissipated by a load is a function of the voltage swing across the load and the load’s impedance. As load impedance decreases, load dissipation becomes increasingly dependent on the interconnect (PCB trace and wire) resistance between the amplifier output pins and the load’s connections. Residual trace resistance causes a voltage drop, which results in power dissipated in the trace and not in the load as desired. For example, 0.1Ω trace resistance reduces the output power dissipated by an 8Ω load from 1W to 0.9W. This problem of decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide as possible. Poor power supply regulation adversely affects maximum output power. A poorly regulated supply’s output voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the same effects as poor supply regulation. Therefore, make the power supply traces as wide as possible to maintain full output voltage swing. EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS The LM4914’s exposed-DAP (die attach paddle) package provides a low thermal resistance between the die and the PCB to which the part is mounted and soldered. This low thermal resistance is achieved by soldering the DAP to a copper pad on the PCB. The copper pad’s dimensions should match the DAP’s. The copper pad should then connect to a larger copper area. This area can be on the component side, in an inner layer in a multi-layer board, or on the board’s back side. This connection from the DAP, to the DAP pad, and finally to a larger copper area allows rapid heat transfer away from the die to the surrounding air. The result is a low voltage audio power amplifier that produces 1W at = 1% THD+N with an 8Ω load. This high power is achieved through careful consideration of necessary thermal www.national.com POWER SUPPLY BYPASSING As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. Applications that employ a 5V regulator typically use a 10µF in parallel with a 0.1µF filter capacitors to stabilize the regulator’s output, reduce noise on the supply line, and improve the supply’s transient response. However, their presence does not eliminate the need for a local 0.47µF tantalum bypass capacitance connected between the 10 (SPST), a microprocessor, or a microcontroller. When using a switch, connect a 100kΩ pull-up resistor between the SHUTDOWN pin and VDD and the SPST switch between the SHUTDOWN pin and GND. Select normal amplifier operation by opening the switch. Closing the switch applies GND to the SHUTDOWN pin, activating micro-power shutdown. The switch and resistor guarantee that the SHUTDOWN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or a microcontroller, use a digital output to apply the active-state voltage to the SHUTDOWN pin. (Continued) LM4914’s supply pins and ground. Do not substitute a ceramic capacitor for the tantalum. Doing so may cause oscillation. Keep the length of leads and traces that connect capacitors between the LM4914’s power supply pin and ground as short as possible. Connecting a 0.47µF capacitor, CB, between the BYPASS pin and ground improves the internal bias voltage’s stability and improves the amplifier’s PSRR. The PSRR improvements increase as the bypass pin capacitor value increases. Too large, however, increases turn-on time and can compromise the amplifier’s click and pop performance. The selection of bypass capacitor values, especially CB, depends on desired PSRR requirements, click and pop performance (as explained in the section, Proper Selection of External Components), system cost, and size constraints. HEADPHONE (SINGLE-ENDED) AMPLIFIER OPERATION BTL/SE [Mono (BTL)/Stereo (SE)] Function Applying a voltage greater than 0.9VDD to the LM4914’s BTL/SE headphone control pin switches the amplifier’s operation from mono BTL to stereo SE. Applying a voltage less than 0.55VDD to the LM4914’s BTL/SE headphone control pin switches the amplifier’s operation from stereo SE to mono BTL. MICRO-POWER SHUTDOWN The LM4914 features an active-low micro-power shutdown mode. When active, the LM4914’s micro-power shutdown feature turns off the amplifier’s bias circuitry, reducing the supply current. The logic threshold is typically VDD/2. The low 0.03µA typical shutdown current is achieved by applying a voltage to the SHUTDOWN pin that is as near to GND as possible. A voltage that is greater than GND may increase the shutdown current. There are a few methods to control the micro-power shutdown. These include using a single-pole, single-throw switch Figure 3 shows how to control the LM4914’s headphone function using four external resistors and a dual-switch stereo headphone jack. External resistors R4 - R6 provide the control voltages that are applied through the upper headphone jack switch. R6 and R7 provide a DC return path for the SE coupling capacitors. 200634A1 FIGURE 3. Headphone Operation and BTL - SE Mode Switching connection between AMP4’s output and the BTL speaker, muting it. The output coupling capacitors block the amplifier’s half supply DC voltage, protecting the headphones from the VDD/2 DC output voltage. Figure 3 also shows the suggested headphone jack electrical connections. The jack is designed to mate with a threewire plug. The plug’s tip and adjacent ring should carry the left and right channel stereo signals, respectively. The sleeve furthest from the tip should carry the ground return. The Switchcraft 35RAPC4BH3 five-terminal headphone jack With no headphones connected to the headphone jack, the R5-R6 voltage divider sets the voltage applied to the BTL/SE pin (pin 7) at approximately 50mV (comfortably below the 0.55VDD logic-low threshold). This 50mV tells the LM4914 to select the signal applied to the MONO-IN input and places the LM4914 in mono BTL operation. When stereo SE operation is desired, both headphone jack switches are opened with a headphone plug. Opening the lower one allows R5 to apply VDD to the BTL/SE pin. This switches the amplifier’s inputs to the stereo signal. Opening the lower one breaks the 11 www.national.com LM4914 Application Information LM4914 Application Information headphone jack. For applications that require an SPDIF interface in the stereo headphone jack, use a Foxconn 2F1138-TJ-TR. (Continued) easily satisfies the LM4914’s requirement for a dual switch 200634A2 FIGURE 4. Headphone Circuit sary for the desired bandwidth helps minimize clicks and pops. CB’s value should be in the range of 5 times to 7 times the value of Ci. This ensures that output transients are eliminated when power is first applied or the LM4914 resumes operation after shutdown. SELECTING EXTERNAL COMPONENTS Input Capacitor Value Selection Amplifying the lowest audio frequencies requires high value input coupling capacitors (C1 and C2 in Figure 2). A high value capacitor can be expensive and may compromise space efficiency in portable designs. In many cases, however, the speakers used in portable systems, whether internal or external, have little ability to reproduce signals below 150Hz. Applications using speakers with this limited frequency response reap little improvement by using large input capacitor. The LM4914’s advanced output transient suppression circuitry has eliminated the need to select the input capacitor’s value in relation to the BYPASS capacitor’s value as was necessary in some previous Boomer amplifiers. The value of C1 and C2 are now strictly determined by the desired low frequency response. As shown in Figure 2, the input resistors (R1 and R2) and the input capacitors (C1 and C2) produce a high pass filter cutoff frequency that is found using Equation (7). (7) fC = 1 / 2πRiCi As an example, when using a speaker with a low frequency limit of 150Hz, and input resistances (R2 and R3) of 16.8kΩ, using Equation (7), input capacitances (C1 and C2) are 0.063µF. The 0.1µF capacitors (C1 and C2) shown in Figure 2 allow the LM4914 to drive high efficiency, full range speaker whose response extends below 30Hz. OPTIMIZING CLICK AND POP REDUCTION PERFORMANCE The LM4914 contains circuitry that eliminates turn-on and shutdown transients ("clicks and pops") and transients that could occur when switching between BTL speakers and single-ended headphones. For this discussion, turn-on refers to either applying the power supply voltage or when the micro-power shutdown mode is deactivated. As the VDD/2 voltage present at the BYPASS pin ramps to its final value, the LM4914’s internal amplifiers are configured as unity gain buffers and are disconnected from the RO/MO+ and LO/MO- pins. An internal current source charges the capacitor connected between the BYPASS pin and GND in a controlled, linear manner. Ideally, the input and outputs track the voltage applied to the BYPASS pin. The gain of the internal amplifiers remains unity until the voltage on the bypass pin reaches VDD/2. As soon as the voltage on the bypass pin is stable, the device becomes fully operational and the amplifier outputs are reconnected to their respective output pins. Although the BYPASS pin current cannot be modified, changing the size of CB alters the device’s turn-on time. There is a linear relationship between the size of CB and the turn-on time. Here are some typical turn-on times for various values of CB: Bypass Capacitor Value Selection Besides minimizing the input capacitor size, careful consideration should be paid to value of CB, the capacitor connected to the BYPASS pin. Since CB determines how fast the LM4914 settles to quiescent operation, its value is critical when minimizing turn-on pops. The slower the LM4914’s outputs ramp to their quiescent DC voltage (nominally VDD/ 2), the smaller the turn-on pop. Choosing CB equal to 1.0µF along with a small value of Ci (in the range of 0.1µF to 0.39µF), produces a click-less and pop-less shutdown function. As discussed above, choosing Ci no larger than neceswww.national.com CB(µF) 12 TON (ms) 0.01 2 0.1 20 0.22 42 0.47 90 1.0 200 2.2 420 (RESUME HERE- All that is left is to discuss the BTL low frequency phase shift.) (Continued) In order to eliminate "clicks and pops", all capacitors must be discharged before turn-on. Rapidly switching VDD may not allow the capacitors to fully discharge, which may cause "clicks and pops". (10) Thus, a minimum gain of 2.83 allows the LM4914’s to reach full output swing and maintain low noise and THD+N performance. For this example, let AV(BTL) = 3. The amplifier’s overall gain is set using the input (Ri), the first stage internal feedback resistor, and the second stage’s fixed gain of 1.25. With the desired input impedance set at 20kW, the feedback resistor is found using Equation (11). (11) Ri = -125kΩ / AV (BTL) AUDIO POWER AMPLIFIER DESIGN Audio Amplifier Design: Driving 1W into an 8Ω Load Given: Power Output Load Impedance 1 Wrms 8Ω Input Level 1 Vrms Input Impedance > 20kΩ Bandwidth The value of Ri is 44.2kΩ. The nominal output power is 1.13W. The last step in this design example is setting the amplifier’s -3dB frequency bandwidth. To achieve the desired ± 0.25dB pass band magnitude variation limit, the low frequency response must extend to at least one-fifth the lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth limit. The gain variation for both response limits is 0.17dB, well within the ± 0.25dBdesired limit. The results are an (12) fL = 100Hz / 5 = 20Hz and an (13) fL = 20kHz x 5 = 100kHz As mentioned in the SELECTING EXTERNAL COMPONENTS section, Ri and Ci create a highpass filter that sets the amplifier’s lower bandpass frequency limit. Find the coupling capacitor’s value using Equation (14). (14) Ci = 1 / 2πRifL The result is 1 / 2π x 44.2kΩ x 20Hz = 0.180µF (15) Use a 180µF capacitor, the closest standard value. The product of the desired high frequency cutoff (100kHz in this example) and the differential gain AV(BTL), determines the upper passband response limit. With AV(BTL) = 3 and fH = 100kHz, the closed-loop gain bandwidth product (GBWP) is 300kHz. This is less than the LM4914’s 3.5MHz GBWP. With this margin, the amplifier can be used in designs that require more differential gain while avoiding performance restricting bandwidth limitations. 100Hz – 20kHz ± 0.25 dB The design begins by specifying the minimum supply voltage necessary to obtain the specified output power. One way to find the minimum supply voltage is to use the Output Power vs Supply Voltage curve in the Typical Performance Characteristics section. Another way, using Equation (8), is to calculate the peak output voltage necessary to achieve the desired output power for a given load impedance. To account for the amplifier’s dropout voltage, two additional voltages, based on the Dropout Voltage vs Supply Voltage in the Typical Performance Characteristics curves, must be added to the result obtained by Equation (8). The result is Equation (9). (8) (9) VDD = VOUTPEAK + VODTOP + VODBOT The Output Power vs. Supply Voltage graph for an 8Ω load indicates a minimum supply voltage of 4.6V. The commonly used 5V supply voltage easily meets this. The additional voltage creates the benefit of headroom, allowing the LM4914 to produce peak output power in excess of 1W without clipping or other audible distortion. The choice of supply voltage must also not create a situation that violates of maximum power dissipation as explained above in the Power Dissipation section. After satisfying the LM4914’s power dissipation requirements, the minimum differential gain needed to achieve 1W dissipation in an 8Ω load is found using Equation (10). 13 www.national.com LM4914 Application Information LM4914 Application Information (Continued) LM4914MH DEMO BOARD ARTWORK 200634D7 200634D9 FIGURE 5. Top Overlay FIGURE 7. Bottom Layer 200634D8 FIGURE 6. Top Layer www.national.com 14 LM4914 1W Monaural, 85mW Stereo Headphone Audio Amplifier Physical Dimensions inches (millimeters) unless otherwise noted TSSOP EXP-DAP Order Number LM4914MH NS Package Number MXF10A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Americas Customer Support Center Email: [email protected] Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Support Center Fax: +65-6250 4466 Email: [email protected] Tel: +65-6254 4466 National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: [email protected] Tel: 81-3-5639-7560 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.