Preliminary User’s Manual
IE-703017-MC-EM1
In-circuit Emulator Option Board
Target device
V850/SA1
Document No. U12898EJ1V0UM00 (1st edition)
Date Published February 1998 N CP(K)
©
Printed in Japan
1998
1
[MEMO]
2
V850 family and EEPROM are trademarks of NEC Corporation.
Windows is a trademark or a registered trademark of Microsoft Corporation in the United States and/or
other countries.
PC/AT is a trademark of International Business Machines Corporation.
Ethernet is a trademark of Xerox Corporation.
UNIX is a registered trademark in the United States and other countries, licensed exclusively through
X/Open Company Limited.
The information in this document is subject to change without notice.
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
from use of such device. No license, either express, implied or otherwise, is granted under any patents,
copyrights or other intellectual property rights of NEC Corporation or of others.
M7A 96. 10
3
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC
product in your application, pIease contact the NEC office in your country to obtain a list of authorized
representatives and distributors. They will verify:
•
Device availability
•
Ordering information
•
Product release schedule
•
Availability of related technical literature
•
Development environment specifications (for example, specifications for third-party tools and
components, host computers, power plugs, AC supply voltages, and so forth)
•
Network requirements
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary
from country to country.
NEC Electronics Inc. (U.S.)
NEC Electronics (Germany) GmbH
NEC Electronics Hong Kong Ltd.
Santa Clara, California
Tel: 408-588-6000
800-366-9782
Fax: 408-588-6130
800-729-9288
Benelux Office
Eindhoven, The Netherlands
Tel: 040-2445845
Fax: 040-2444580
Hong Kong
Tel: 2886-9318
Fax: 2886-9022/9044
NEC Electronics Hong Kong Ltd.
Velizy-Villacoublay, France
Tel: 01-30-67 58 00
Fax: 01-30-67 58 99
Seoul Branch
Seoul, Korea
Tel: 02-528-0303
Fax: 02-528-4411
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Milton Keynes, UK
Tel: 01908-691-133
Fax: 01908-670-290
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Madrid, Spain
Tel: 01-504-2787
Fax: 01-504-2860
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Tel: 253-8311
Fax: 250-3583
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NEC Electronics (Germany) GmbH
Milano, Italy
Tel: 02-66 75 41
Fax: 02-66 75 42 99
Scandinavia Office
Taeby, Sweden
Tel: 08-63 80 820
Fax: 08-63 80 388
NEC Electronics (France) S.A.
NEC Electronics (Germany) GmbH
Duesseldorf, Germany
Tel: 0211-65 03 02
Fax: 0211-65 03 490
NEC Electronics (UK) Ltd.
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Taipei, Taiwan
Tel: 02-719-2377
Fax: 02-719-5951
NEC do Brasil S.A.
Cumbica-Guarulhos-SP, Brasil
Tel: 011-6465-6810
Fax: 011-6465-6829
J97. 8
4
INTRODUCTION
READERS
This manual is intended for users who design and develop application systems using the V850/SA1.
PURPOSE
The purpose of this manual is to describe the proper operation of the IE-703017-MC-EM1 and its basic
specifications.
ORGANIZATION
This manual is broadly divided into the following parts.
•
Overview
•
Name and function of components
•
Cautions
HOW TO READ THIS MANUAL
This manual assumes readers who have general knowledge of electric engineering, logic circuits, and
microcomputers.
The IE-703017-MC-EM1 is used connected to the IE-703002-MC in-circuit emulator. This manual explains
the basic setup procedure and switch settings of the IE-703002-MC when it is connected to the IE-703017-MCEM1. For the names and functions, and the connection of components, refer to the IE-703002-MC User’s
Manual − Hardware.
To broadly learn about the basic specifications and operation methods
→ Read this manual in the order listed in CONTENTS.
To learn the operation methods and command functions, etc., of the IE-703002-MC and IE-703017-MC-EM1
→ Read the user’s manual of the debugger (optional) that is used.
LEGEND
Note
: Footnote explaining items marked with ″Note″ in the text
Caution
: Information requiring special attention.
Remark
: Supplementary information provided in addition to the text
Numeral representations : Binary … xxxx or xxxxB
Decimal … xxxx
Hexadecimal … xxxxH
Prefix representing the power of 2 (Address space, Memory capacity):
K (kilo)
10
: 2 = 1024
20
M (mega) : 2 = 1024
2
5
TERMINOLOGY
The meaning of terms used in this manual is listed below.
Target device
Device that is emulated.
Target system
The system (user-built system) to be debugged. This includes the target program and userconfigured hardware.
RELATED DOCUMENTS
Some of the related documents listed below may be preliminary versions, but are not noted as such.
{ Documents related V850/SA1
Document
Document Number
V850/SA1 User’s Manual-Hardware
U12768E
TM
V850 Family User’s Manual-Architecture
U10243E
µPD703015 Data Sheet
To be prepared
µPD703015Y Data Sheet
To be prepared
µPD703017 Data Sheet
To be prepared
µPD703017Y Data Sheet
To be prepared
{ Documents related to development tools (User’s Manual)
Product
Document Number
IE-703002-MC (In-circuit emulator)
U11595E
IE-703017-MC-EM1 (In-circuit emulator option board)
CA850 (C Compiler package)
This manual
TM
Operation UNIX based
TM
RX850 (Real-time OS)
6
U12839E
Operation Windows based
U12827E
C language
U12840E
Assembly Language
U10543E
Project manager (Windows-based)
U11991E
Basics
U12861E
Technical
U11117E
Nucleus installation
U11038E
Debugger Windows-based
U11158E
Installation (UNIX-based)
U12863E
Installation (Windows-based)
U12862E
AZ850 (System performance analyzer) − Operation
U11181E
ID850 (C source debugger)
Operation Windows-based
U11196E
Operation UNIX-based
U12209E
Installation UNIX-based
U12210E
CONTENTS
CHAPTER 1
OVERVIEW .........................................................................................................................11
1.1
Hardware Configuration .............................................................................................................................. 11
1.2
Features (When connected to IE-703002-MC)............................................................................................ 12
1.3
Function Specifications (When connected to IE-703002-MC) .................................................................. 12
1.4
System Configuration .................................................................................................................................. 13
1.5
Contents in Carton ....................................................................................................................................... 14
1.6
Connection between IE-703002-MC and IE-703017-MC-EM1................................................................ 16
CHAPTER 2
NAME AND FUNCTION OF COMPONENTS.....................................................................19
2.1
Component Name and Function of IE-703017-MC-EM1............................................................................ 19
2.2
Clock Settings .............................................................................................................................................. 21
2.2.1
Main clock settings ........................................................................................................................... 21
2.2.2
Subclock settings ............................................................................................................................ 22
2.3
Illegal Access Detection ROM Setting........................................................................................................ 23
2.4
CPU Operation Voltage Range Switching Setting..................................................................................... 23
2.5
Separate Bus Function Setting ................................................................................................................... 24
CHAPTER 3
FACTORY SETTINGS ........................................................................................................25
CHAPTER 4
CAUTIONS..........................................................................................................................27
4.1
VDD and BVDD of Target System................................................................................................................... 27
4.2
NMI Signal ..................................................................................................................................................... 28
4.3
VPP Signal ...................................................................................................................................................... 28
4.4
MAM Register ............................................................................................................................................... 28
4.5
NMI Signal Mask Function........................................................................................................................... 29
4.6
Bus Interface Pin .......................................................................................................................................... 29
APPENDIX
DIMENSIONS.........................................................................................................................31
7
List of Figures
Figure No.
Title
Page
1-1
System Configuration .......................................................................................................................................13
1-2
Contents in Carton ...........................................................................................................................................14
1-3
Accessories .......................................................................................................................................................15
1-4
Connection between IE-703002-MC and IE-703017-MC-EM1..........................................................................17
2-1
IE-703017-MC-EM1...........................................................................................................................................19
4-1
Schematic Diagram of Power Supply Acquisition..............................................................................................27
4-2
NMI Signal Flow Path ........................................................................................................................................28
4-3
VPP Signal Flow Path .........................................................................................................................................28
8
List of Tables
Table No.
Title
Page
2-1
Main Clock Setting ............................................................................................................................................ 21
2-2
Subclock Setting ............................................................................................................................................... 22
2-3
JP1 setting in IE-703002-MC ............................................................................................................................ 23
2-4
JP3 and JP4 Setting in IE-703002-MC.............................................................................................................. 23
2-5
MAM Register and J1 Setting Correspondence ................................................................................................ 24
4-1
Bus Interface Pin Operation List........................................................................................................................ 29
9
[MEMO]
10
CHAPTER 1
OVERVIEW
The IE-703017-MC-EM1 is an optional board for the IE-703002-MC in-circuit emulator. By connecting the IE703017-MC-EM1 and IE-703002-MC, hardware and software can be debugged efficiently in system development
using the V850/SA1.
In this manual, the basic setup sequences and switch settings of the IE-703002-MC when using IE-703017-MCEM1 are described. For the names and functions of the parts of the IE-703002-MC, and for the connection of
elements, refer to the IE-703002-MC User’s Manual.
1.1
Hardware Configuration
Optional
Optionalhardware
hardware
In-circuit emulator (IE-703002-MC)
Option board
(IE-703017-MC-EM1)
IE-703002-MC can be used as in-circuit emulator for V850/SA1 by
adding this board.
Optional hardware
Extension probe (SC-100SDNote 1)
General-purpose
CORPORATION
PC interface board
(IE-70000-xx-IF-B,
IE-70000-xx-IF-C)
This board is used to connect the IE-703002-MC to a personal computer.
This board is inserted in the expansion slot of the personal computer.
Network module
(IE-70000-MC-SV3Note 2)
The module is used when a workstation controls the IE-703002-MC via
ethernet™.
Power adapter
(IE-70000-MC-PS-B)
AC adapter dedicated to the IE-703002-MC
Notes 1. Contact: Daimaru Kogyo Co., Ltd.
extension
probe
made
by
TOKYO
ELETECH
Tokyo Electronic Components Division (TEL 03-3820-7112)
Osaka Electronic Components Division (TEL 06-244-6672)
2. Under development
11
CHAPTER 1 OVERVIEW
1.2
Features (When connected to IE-703002-MC)
{ Maximum operation frequency: 17 MHz (at 3.3-V operation)
{ Extremely lightweight and compact
{ Higher equivalence with target device can be achieved by omitting buffer between signal cables.
{ Following pins can be masked.
RESET, NMI, WAIT, HLDRQ
{ Two methods of connection to target system:
• Pod tip direct connection (For information on the pod, refer to the IE-703002-MC User’s Manual)
• Attach an extension probe (optional) to the pod tip for connection.
{ Dimensions of the IE-703017-MC-EM1 are as follows.
Parameter
Value
Note
Power dissipation (Max. value at 3.3-V supply voltage)
0.35 W (at 17-MHz operation frequency)
External dimensions
(Refer to APPENDIX DIMENSIONS)
Height
15 mm
Length
194 mm
Width
96 mm
Weight
160 g
Note 10.35 W when IE-703002-MC with IE-703017-MC-EM1
1.3
Function Specifications (When connected to IE-703002-MC)
Parameter
Emulation memory capacity
Capacity
Internal ROM
External
memory
Execution/pass detection
Internal ROM
coverage memory capacity
External
memory
256 Kbytes
In ROM-less mode
2 Mbytes
When using iROM
1 Mbyte
256 Kbytes
In ROM-less mode
2 Mbytes
When using iROM
1 Mbyte
Memory access detection coverage memory capacity (external memory)
1 Mbyte
Coverage memory capacity for branching
entry number counting
256 Kbytes
Caution
12
Internal ROM
External
memory
In ROM-less mode
2 Mbytes
When using iROM
1 Mbyte
Some of the functions may not be supported depending on the debugger used.
CHAPTER 1 OVERVIEW
1.4
System Configuration
The system configuration when connecting the IE-703002-MC to IE-703017-MC-EM1 and a personal computer
(PC-9800 series or PC/AT
TM
(or compatibles)) is shown below.
Figure 1-1. System Configuration
<13>
<5>
<14>
<6>
<7>
[Magnified drawing: example of use of
connector for target connection]
<12>
<8>
<4>
<2>
<10>
Target
system
<11>
For PC-9800 series
<9>
<3>
<10>
For PC/AT
<11>
<1>
Target system
Remark
<1> Personal computer (PC-9800 series or PC/AT)
<2> Debugger (optional)
<3> PC interface board (IE-70000-98-IF-B/IE-70000-98-IF-C, IE-70000-PC-IF-B/IE-70000-PC-IF-C: optional)
<4> PC interface cable (included with IE-703002-MC)
<5> In-circuit emulator (IE-703002-MC: optional)
<6> In-circuit emulator option board (IE-703017-MC-EM1)
<7> External logic probe (included with IE-703002-MC)
<8> Socket for target connection (YQSOCKET100SDN: included with IE-703002-MC)
<9> Extension probe (SC-100SD: optional)
<10> Connector for emulator connection (YQPACK100SD: included in IE-703002-MC)
<11> Connector for target connection (NQPACK100SD: included)
<12> Power adapter (IE-70000-MC-PS-B : optional)
<13> AC100-V power cable (attachment of optional IE-70000-MC-PS-B)
<14> AC220-V power cable (attachment of optional IE-70000-MC-PS-B)
13
CHAPTER 1 OVERVIEW
1.5
Contents in Carton
The carton of the IE-703017-MC-EM1 contains a main unit, guarantee card, packing list, and accessory bag.
Make sure that the accessory bag contains this manual and the connector accessories. In case of missing or
damaged contents, please contact an NEC sales representative or NEC dealer.
Figure 1-2. Contents in Carton
<1> IE-703017-MC-EM1
<4> Packing list
<3> Guarantee card
<2> Accessory bag
<1> IE-703017-MC-EM1 × 1 pc.
<2> Accessory bag × 1 pc.
<3> Guarantee card × 1 pc.
<4> Packing list × 1 sheet
14
CHAPTER 1 OVERVIEW
Check that the accessory bag contains this manual, an accessory list, and the following accessories.
(a) Connector for target connection (NQPACK100SD) × 1 set
(including NQGUIDE 3 pcs., screw driver × 1 pc.)
(b) Crystal oscillator (17 MHz, 8-pin type): 1 pc.
(c) Plastic screws × 4 pcs.
(including nuts and washer × 4 sets)
Figure 1-3. Accessories
(a) Connector for target connection
(b) Crystal oscillator
(c) Plastic screw
NQPACK100SD
(Side View)
NQGUIDE
Caution
Driver
NQPACK100SD is intended for program development and evaluation in laboratories.
15
CHAPTER 1 OVERVIEW
1.6
Connection between IE-703002-MC and IE-703017-MC-EM1
The procedure for connecting the IE-703002-MC and IE-703017-MC-EM1 is described below.
Caution
Connect carefully so as not to break or bend connector pins.
<1> Remove the pod cover (upper and lower) of the IE-703002-MC.
<2> Replace the crystal oscillator mounted in the pod of the IE-703002-MC with the attached crystal oscillator (17
MHz) or user’s oscillator (with user’s frequency).
<3> Set the PGA socket lever of the IE-703017-MC-EM1 to the OPEN position as shown in Figure 1-4 (b).
<4> Connect the IE-703017-MC-EM1 to the PGA socket at the back of the pod (refer to Figure 1-4 (c)). When
connecting, position the IE-703002-MC and IE-703017-MC-EM1 so that they are horizontal.
<5> Set the PGA socket lever of the IE-703017-MC-EM1 to the CLOSE position as shown in Figure 1-4 (b).
<6> Set the jumpers (JP1 to JP4). Open JP1 and JP3 (Remove the jumper contact. Attach the removed jumper
contact to one of the jumper pins to avoid losing them.)
Retain the factory settings of JP2 (first and second pins shorted, and the fifth and sixth pins shorted).
Short the second and third pins of JP4.
<7> Fix the IE-703017-MC-EM1 between the pod covers (upper and lower) with the plastic screws (supplied in
IE-703002-MC).
<8> Secure the pod cover (upper) end with nylon rivets.
Remark
For JP1 setting, refer to 2.3 Illegal Access Detection ROM Setting. For JP3 and JP4, refer to
2.4 CPU Operation Voltage Range Switch Setting.
16
CHAPTER 1 OVERVIEW
Figure 1-4. Connection between IE-703002-MC and IE-703017-MC-EM1 (1/2)
(a) Overview
Nut
Upper cover
Washer
IE-703017-MC-EM1
Nylon rivets
IE-703002-MC
Lower cover
Plastic screw
(b) PGA Socket Lever of IE-703017-MC-EM1
CLOSE
OPEN
17
CHAPTER 1 OVERVIEW
Figure 1-4. Connection between IE-703002-MC and IE-703017-MC-EM1 (2/2)
(c) Connecting part (IE-703017-MC-EM1)
Pin A1 location
: Insertion guide
: IE-703002-MC insertion area
18
CHAPTER 2
NAME AND FUNCTION OF COMPONENTS
This chapter describes the names, functions, and switch settings of components comprising the IE-703017-MCEM1. For the details of the pod, jumpers, and switch positions, etc., refer to IE-703002-MC User’s Manual.
2.1
Component Name and Function of IE-703017-MC-EM1
Figure 2-1. IE-703017-MC-EM1
(a) Top View
(b) Bottom View
Pin 1 direction of the connector
for target connection
Pin 1 direction of the connector
for target connection
Connector for target
connection
JP1
3
4
1
2
VPP
TP6
LED
TP5
V850/SA1
I/O chip
2
1
JP2
TP7
J1
FPGA
TP4
12
11
EEPROMTM
Connector for cnnection to
IE-703002-MC
19
CHAPTER 2
NAME AND FUNCTION OF COMPONENTS
(1) Test pin (TP4-TP7)
These pins are used for testing analog signals for the emulator as a standalone unit.
• TP4: AVREF
• TP5: AVSS
• TP6: AVDD
• TP7: P70 (Analog port)
(2) JP1
This is the switch jumper of the main clock supply source. (For details, refer to 2.2 Clock Settings)
(3) JP2
This is a pin block for supplying the subclock. (For details, refer to 2.2 Clock Settings)
(4) LED
LED for VPP
ON: Voltage is applied to VPP
OFF: Voltage is not applied to VPP
(5) Connector for IE-703002-MC connection
This is a connector to connect with the IE-703002-MC.
(6) Connector for target connection
This is a connector to connect the target system or the extension probe.
20
CHAPTER 2
2.2
NAME AND FUNCTION OF COMPONENTS
Clock Settings
This section describes the clock settings.
For JP1 and JP2 in IE-703017-MC-EM1, refer to Figure 2-1.
For the jumper switch position in the IE-703002-MC, refer to IE-703002-MC User’s Manual.
2.2.1 Main clock settings
Table 2-1. Main Clock Setting
Emulator use
environment
Clock supply method
IE-703017-MC-EM1 setting
JP1
When using
emulator as
standalone unit
Internal clock
When using
emulator with
target system
Internal clock
IE-703002-MC setting
SW1
SW2
ON
ON
JP2
3
1
7
1
4
2
8
2
3
1
4
2
3
1
4
2
Target clock
21
CHAPTER 2
NAME AND FUNCTION OF COMPONENTS
2.2.2 Subclock settings
Table 2-2. Subclock Setting
Emulator use environment
Clock supply method
IE-703017-MC-EM1 setting
JP2
When using emulator as
standalone unit
Internal clock
Note 1
Oscillator is included (32.768 kHz oscillation circuit is included at
factory shipment)Note 3
When using emulator with
target system
Internal clockNote 1
Oscillator is included (32.768 kHz oscillation circuit is included at
factory shipment) Note 3
Target clockNote 2
Short between XT1 and TGNote 4
GND
C1
XT1
TG
XT2
C2
GND
Notes 1. Internal clock does not support the clock input by oscillator.
2. The target clock supports only an oscillator, and does not support clock input by resonator.
3. To use the sub-clock frequency of 32.768 kHz, remove the clock module on JP2 and set an oscillation
circuit.
The settings of JP2 are as follows.
V850/SA1
I/O chip
XT1
XT2
Target
XT1
GND
4. Use a short pin
22
C1
XT1
TG
XT2
C2
GND
CHAPTER 2
2.3
NAME AND FUNCTION OF COMPONENTS
Illegal Access Detection ROM Setting
If using the IE-703002-MC for an in-circuit emulator for V850/SA1 by connecting IE-703017-MC-EM1, set JP1 of
the IE-703002-MC as follows.
Table 2-3. JP1 setting in IE-703002-MC
JP1
Description
Note
Open
Illegal Access Detection ROM (mounted on IE-703017-MC-EM1) for V850/SA1 is
used.
Note When JP1 is set open, keep the removed jumper contact attached to one pin
JP1
as shown in the drawing at right.
Jumper
contact
2.4
CPU Operation Voltage Range Switching Setting
If using the IE-703002-MC for an in-circuit emulator for V850/SA1 by connecting IE-703017-MC-EM1, set JP3 and
JP4 of the IE-703002-MC as follows.
Table 2-4. JP3 and JP4 Setting in IE-703002-MC
JP3, JP4
Description
JP3
Operating voltage range of IE-703002-MC is from 2 to 3.6 V.
1
2
(Open)
JP4
1
Operating voltage range of target system is from 2 to 4.5 V. (Since operating
voltage of V850/SA1 is from 2 to 3.6 V, this setting is effective)
2
3
Caution
With the setting of JP3 and JP4, the IE-703002-MC operates in the same voltage as the target
system if the target system power is ON. If the target system power is OFF or the emulator is used
as a stand-alone unit, the IE-703002-MC always operates in 3.3 V.
23
CHAPTER 2
2.5
NAME AND FUNCTION OF COMPONENTS
Separate Bus Function Setting
To use the separate bus function, J1 of IE-703017-MC-EM1 must be set. Table 2-5 shows the correspondence
between the MAM register and J1 settings.
Table 2-5. MAM Register and J1 Setting Correspondence
MAM2
0
0
0
1
1
1
1
MAM1
0
1
1
0
0
1
1
MAM0
0
0
1
0
1
0
1
Operation of P34-P36, P100-P107, P110P113
P34-P36
Port mode
P100-P107
Port mode
P110-P113
Port mode
P34-P36
Port mode
P100-P107
Port mode
2
12
1
11
2
12
1
11
P110-P113
A1-A4
P34-P36
Port mode
P100-P103
A5-A8
2
12
P104-P107
Port mode
1
11
P110-P113
A1-A4
P34-P36
Port mode
P100-P107
A5-A12
2
12
1
11
P110-P113
A1-A4
P34
A13
P35, P36
Port mode
2
12
P100-P107
A5-A12
1
11
P110-P113
A1-A4
P34, P35
A13, A14
P36
Port mode
2
12
P100-P107
A5-A12
1
11
P110-P113
A1-A4
P34-P36
A13-A15
P100-P107
A5-A12
2
12
1
11
P110-P113
24
J1 Setting
A1-A4
CHAPTER 3
Pin
FACTORY SETTINGS
Description
Remark
JP1
JP2
Internal main clock setting
3
1
4
2
Oscillation circuit is set
32.768-kHz clock is supplied for subclock.
J1
2
12
1
11
Set to port mode (P34-P36, P100-P107, P110P113)
25
[MEMO]
26
CHAPTER 4
4.1
CAUTIONS
VDD and BVDD of Target System
(1) BVDD in the target system is not connected to BVDD in the evaluation chip in the IE-703002-MC.
The IE-703002-MC uses the BVDD of the target system for the following purposes:
•
Power ON/OFF detection of target system
•
BVDD emulation of target system
(2) When the voltage of the target system is 1 V or higher, the evaluation chip in the emulator is supplied VDD to
operate by the target system. The power consumption is equivalent to that of the µPD70F3017.
(3) When the voltage of the target system is lower than 1 V, the emulator recognizes the target system power is off
and operates at 3.3 V.
Figure 4-1. Schematic Diagram of Power Supply Acquisition
Target system
IE-703017-MC-EM1
IE-703002-MC
BVDD
Target voltage
emulation
V850/SA1
I/O chip
BVDD
VDD
Relay
BVDD >= 1 V
Evaluation chip
BVDD < 1 V
27
CHAPTER 4
4.2
CAUTIONS
NMI Signal
The input signal (NMI signal) from the target system is delayed (tpD = 10 ns (MAX.)) because it passes through
FPGA before it is input to the I/O chip of the emulator.
In addition, the DC characteristics change. The input voltage becomes VIH = 2.0 V (MIN.) and VIL = 0.8 V (MAX.).
The input current becomes IIN = ±1.0 µA (MAX.).
Figure 4-2. NMI Signal Flow Path
IE-703017-MC-EM1
Target system
NMI signal
NMI pin
4.3
FPGA
I/O chip
VPP Signal
The VPP signal from the target system is connected to LED via a 330-Ω resistor in the emulator.
It is not
connected to the evaluation chip in the emulator.
Figure 4-3. VPP Signal Flow Path
IE-703017-MC-EM1
Target system
VPP signal
330 Ω
4.4
LED
Evaluation chip
MAM Register
Debugging of MAM register cannot be performed in the emulator. If debugging MAM register with software,
proceed with care.
In the target device, the port can be used as an address bus by setting a value to the MAM register (address:
FFFFF068H) that is mapped in the internal peripheral I/O area with the software (Separate bus function). In the
emulator, however, switching to the separate bus through MAM register setting by software is impossible.
To use the separate bus function, set the J1 jumper in advance. (refer to 2.5 Separate Bus Function Setting)
28
CHAPTER 4
4.5
CAUTIONS
NMI Signal Mask Function
When using the P00/NMI pin in the port mode, do not mask the NMI signal.
4.6
Bus Interface Pin
The operation of the pin for the bus interface differs between the emulator and the target device as follows.
Table 4-1. Bus Interface Pin Operation List (1/2)
(a) During break
Pin name
Internal memory
Memory used by
emulator
F
R
Internal
ROM
W
R
External memory
Internal RAM
R
W
Internal
Peripheral I/O
R
Emulation RAM
W
R
Target System
W
R
W
A16-A21
Hold the accessed last
Active
Active
AD0-AD15
Hi-Z
Active
Active
ASTB
H
Active
Active
R/W
H
Active
Active
DSTB
H
H
Active
LBEN
H
Active
Active
UBEN
H
Active
Active
WAIT
Invalid
Maskable
Maskable
HLDRQ
Maskable
Maskable
Maskable
HLDAK
H or L
H or L
H or L
WRL
H
H
H
Note
WRH
H
H
H
Note
RD
H
H
Note
H
Note Active
Remarks 1.
2.
F
: Fetch
R
: Read
W
: Write
H
: High-level output
L
: Low-level output
Hi-Z : High-impedance
29
CHAPTER 4
CAUTIONS
Table 4-1. Bus Interface Pin Operation List (2/2)
(b) During Run
Pin name
Internal memory
Internal ROM
F
R
Internal RAM
F
R
External memory
Internal
Peripheral I/O
W
R
Emulation RAM
W
F
R
Target System
W
F
R
W
A16-A21
Hold the accessed last
Active
Active
AD0AD15
Hi-Z
Active
Active
ASTB
H
Active
Active
R/W
H
Active
Active
DSTB
H
H
Active
LBEN
H
Active
Active
UBEN
H
Active
Active
WAIT
Invalid
Maskable
Maskable
HLDRQ
Maskable
Maskable
Maskable
HLDAK
H or L
H or L
H or L
WRL
H
H
H
Note
WRH
H
H
H
Note
RD
H
H
Note
H
Note Active
Remarks 1.
2.
F
: Fetch
R
: Read
W
: Write
H
: High-level output
L
: Low-level output
Hi-Z : High-impedance
30
APPENDIX
DIMENSIONS
IE-703002-MC + IE-703017-MC-EM1 (Unit: mm)
481
212
103
58.8
90
166
Top View
52
Pin 1 direction
Side View
27
IE-703002-MC
IE-703017-MC-EM1
Bottom View
194
29.0
96
37.5
14.5
Top View
29.0
31
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