ADVANCE INFORMATION PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 LVDS High-Speed Differential Line Receivers Features Description • • • • • • • • The PI90LV/LVT3486 and PI90LV/LVT9637 are differential line receivers that use low-voltage differential signaling (LVDS) to support data rates in excess of 400 Mbps. These products are designed for applications requiring high-speed, low-power consumption and low noise generation. Signaling Rates >400Mbps (200 MHz) Single 3.3V Power Supply Design Accepts ±350mV (typical) Differential Swing Maximum Differential Skew of 0.35ns Integrated 110-ohm termination on PI90LVTxxxx Maximum Propagation Delay of 3.3ns Low Voltage TTL (LVTTL) Outputs Industrial Temperature Operating Range: -40°C to 85°C • SOIC and TSSOP Packaging • Open, Short, and Terminated Fail Safe • Meets or Exceeds ANSI/TIA/EIA-644 LVDS Standard A differential input signal (350mV) is translated by the device to 3V CMOS output level. Exclusive to the PI90LV.LVT3486 quad receiver is a power-down mode that three-states the outputs and places the device in a low-power idle state (40mW typical). Applications Applications include point-to-point and multidrop baseband data transmission over controlled impedance media of approximately 100 ohms. The transmission media can be printed circuit board traces, backplanes, or cables. The PI90LV/LVT3486 and PI90LV/LVT9637 and companion line drivers PI90LV/LVT3487 and PI90LV/LVT9638 provide new alternatives to RS-232, PECL, and ECL devices for high-speed, point-topoint interface applications. PI90LV/LVT3486 4 Places, PI90LVT3486 only RIN1– RIN1+ ROUT1 1,2EN ROUT2 RIN2+ RIN2– GND 1 2 3 4 5 6 7 8 16 15 14 16-Pin 13 W, L 12 11 10 9 VCC RIN4– RIN4+ ROUT4 3,4EN ROUT3 RIN3+ RIN3- RIN1+ + RIN1– – RIN2+ + RIN2– – R1 R2 ROUT1 ROUT2 1,2EN RIN3+ + RIN3- – R3 ROUT3 3,4EN RIN4+ + RIN4- – R4 ROUT4 PI90LV/LVT9637 2 Places, PI90LVT9637 only VCC 1 8-Pin W, U 8 RIN1+ RIN1+ + 7 RIN1– RIN1– – R1 ROUT1 2 ROUT2 3 6 RIN2+ RIN2+ + GND 4 5 RIN2– RIN2– – 1 R2 ROUT1 ROUT2 P-0.1 01/20/03 ADVANCE INFORMATION PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Function Tables Absolute Maximum Ratings (see Note 1, Page 4) PI90LV/LVT3486 Supply Voltage (VCC) ....................................... –0.3V to +4.0V Enable Input Voltage (RIN+, RIN-) ............................... –0.3V to +3.9V EN Enable Input Voltage (EN) ...................... –0.3V to (VCC +0.3V) H VID ≥ 100mV H Output Voltage (ROUT) .......................... –0.3V to (VCC +0.3V) H –100mV < VID < 100mV ? H VID ≤ –100mV L L X Z H Open H S Package .................................................................... 750mW Derate S Package ................................8.2mW/°C above +25°C Storage Temperature Range .......................... –65°C to +150°C Lead Temperature Range Soldering (4s) ...................... +260°C Maximum Junction Temperature .................................. +150°C Output RIN+, RIN– ROUT Pin Descriptions ESD Rating ................................................................... ≥ 10kV Name Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Recommended Operating Conditions De s cription ROUT TTL/CMOS receiver output pins RIN+ Non- inverting receiver input pins RIN– Inverting receiver input pins GND Ground pin VCC Positive power supply pin, +3.3V ±10% PI90LV/LVT9637 M in. Typ. M ax. Supply Voltage (VCC) +3.0 +3.3 +3.6 Receiver Input Voltage GND Operating Free Air Temperature (TA) –40 +3.0 +25 Diffe re ntial Inputs +85 Diffe re ntial Inputs Units RIN+, RIN– V °C 2 Output ROUT VID ≥ 100mV H –100mV < VID < 100mV ? VID ≤ –100mV L Open H P-0.1 01/20/03 ADVANCE INFORMATION PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Electrical Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified. (Note 2) Symbol VTH VTL VCMR IIN Parame te r Differential Input High Threshold Differential Input Low Threshold Conditions –100 Common- Mode Voltage Range VID = 200mV peak- to- peak(5) Input Current VIN = +2.8V RIN+, RIN- VCC = +3.6 or 0V VIN = +3.6V Output High Voltage M in. Typ. M ax. +20 +100 Vcm = +1.2V(12) VIN = 0V VOH Pin VCC = 0V 0.1 2.6 –10 ±1 +10 –10 ±1 +10 IOH = –0.4mA, VID = +200mV 2.7 3.0 IOH = –0.4mA, Input terminated 2.7 3.0 IOH = –0.4mA, Input shorted 2.7 3.0 IOL = 2mA, VID = –200mV IOS Output Short Circuit Current Enabled, Vout = 0V(10) IOZ Output Three- State Current Disabled, VOUT = 0V or VCC VIH Input High Voltage 2.0 VCC VIL Input Low Voltage GND 0.8 VIN = 0V or VCC, Other Input = VCC or GND VCL Input Clamp Voltage ICL = –18mA ICC No Load Supply Current Receivers Enabled EN = VCC or GND, Inputs Open ICCZ No Load Supply Current Receivers Disabled CW Input Capacitance RTERM Termination Impedance EN = 2.4V or 0.5V, Inputs Open EN 0.1 0.25 –15 –48 –120 mA –10 ±1 +10 µA –20 ±1 –1.5 –0.8 VCC EN = GND, Inputs Open PI90LVTxxxx 90 3 µA V Output Low Voltage Input Current V +20 VOL II mV –20 –20 ROUT Units +20 V µA V 10 15 10 15 7 10 5 10 pF 110 132 Ω P-0.1 mA 01/20/03 ADVANCE INFORMATION PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified. (Notes 3,4,7,8) Symbol Parame te r Conditions M in. Typ. M a x. tPHLD Differential Propagation Delay High to Low (VCM = 1.23V) 1.8 4.7 tPLHD Differential Propagation Delay Low to High (VCM = 1.23V) 1.8 4.7 (6) tSKD1 Differential Pulse Skew | tPHLD - tPLHD | tSKD2 Differential Channel- to- Channel Skew- same device(7) C L = 10 p F VID = 200mV (Figures 1 & 2) (8) 0 0.1 0.5 0 0.1 0.5 tSKD3 Differential Part- to- Part Skew tSKD4 Differential Part- to- Part Skew(9) tTLH Rise Time 0.35 1.2 tTHL Fall Time 0.35 1.2 tPHZ Disable Time High to Z 1.0 8 12 tPLZ Disable Time Low to Z 6 12 tPZH Enable Time Z to High 11 17 tPZL Enable Time Z to Low 11 17 fMAX Maximum Operating Frequency(13) 1.5 RL = 2kΩ C L = 10 p F (Figures 3 & 4) All channels switching Units 250 ns MHz Notes: 1. “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation. 2. Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground unless otherwise specified. 3. All typicals are given for: VCC = +3.3V, TA = +25°C. 4. Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50Ω, tR and tF (0% to 100%) ≤ 3ns for RIN. 5. The VCMR range is reduced for larger VID. Example : if VID = 400mV, the VCMR is 0.2V to 2.2V. The fail-safe condition with inputs shorted is valid over a common-mode range of 0V to 2.3V. A VID up tp VCC - 0V may be applied to the RIN+ / RIN- inputs with the Common-Mode voltage set to VCC/2. Propagation delay and Differential Pulse skew decrease when VID is increased from 200mV to 400mV. Skew specifications apply for 200mV ≤ VID ≤ 800mV over the common mode range. 6. tskd1 is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. 7. tSKD2, Channel-to-Channel Skew, is defined as the difference between the propagation delay of one channel and that of the others on the same chip with any event on the inputs. 8. tSKD3, Part-to-Part Skew, is the differential Channel-to-Channel skew of any event between devices. This specification applies to devices at the same VCC,and within 5ºC of each other within the operating temperature range. 9. tSKD4, Part-to-Part Skew, is the differential Channel-to-Channel skew of any event between devices. This specification applies to devices over recommended operating temperature and voltage ranges, and across process distribution. tskd4 is defined as IMax - Mini differential propagation delay. 10. Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at a time, do not exceed maximum junction temperature specification. 11. CL includes probe and jig capacitance. 12. VCC is always higher than RIN+ and RIN- voltage. RIN- and RIN+ are allowed to have a voltage range -0.2V to VCC- VID/2. However, to be compliant with AC specifications, the common voltage range 0.1V to 2.3V. 13. fmax generator input conditions: tR = tF < 1ns, (0% to 100%), 50% duty cycle, differential (1.05V to1.35V peak to peak). Output Criteria: duty cycle = 60%/40%, VOL (max 0.4V), VOH (min 2.7V), Load = 10pF (stray plus probes). 4 P-0.1 01/20/03 ADVANCE INFORMATION PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Parameter Measurement Information RIN+ Generator RIN– ROUT R CL 50Ω 50Ω Receiver Enabled Figure 1. Receiver Propagation Delay and Transition Time Test Circuit RIN- +1.3V 0V (Differential) VID = 200mV +1.2V RIN+ +1.1V tPHLD tPLHD 80% ROUT 80% 1.5V 1.5V 20% 20% VOL tTHL tTLH Figure 2. Receiver Propagation Delay and Transition Time Waveforms VCC CL includes load and test jig capacitance. S1 = VCC for TPZL, and TPLZ measurements S1= GND for tPZH and tPHZ measurements S1 1/4 PI90LV3486 RL EN Device Under Test RIN+ RIN– Generator ROUT CL 50Ω Figure 3. Receiver Three-State Delay Test Circuit 5 P-0.1 01/20/03 ADVANCE INFORMATION PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 EN When EN* = VCC 3V 1.5V 1.5V 0V 3V 1.5V 1.5V 0V EN* When EN = GND tPZL tPLZ Output When VID = -100mV Output When VID = +100mV VCC 50% 0.5V VOL tPZH tPHZ VOH 0.5V 50% GND Figure 4. Receiver Three-State Delay Waveforms Enable Balanced System Data Input RT 100Ω 1/4 PI90LV3486 + Data – Output ANY LVDS DRIVER Figure 5. Point-to-Point Application 6 P-0.1 01/20/03 ADVANCE INFORMATION PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 16-Pin SOIC (150 Mil) Package 16 3.78 3.99 .149 .157 0.25 x 45˚ 0.50 .0099 .0196 1 0-8˚ .386 .393 9.80 10.00 0.41 1.27 .053 .068 .0155 .0260 0.393 0.660 REF 1.35 1.75 0.19 0.25 .0075 .0098 0.19 0.25 .016 .050 .2284 .2440 5.80 6.20 SEATING PLANE .050 BSC 1.27 .0075 .0098 .0040 0.10 .0098 0.25 .013 .020 0.330 0.508 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 8-Pin SOIC (150 Mil) Package 8 .149 .157 3.78 3.99 .0099 .0196 1 .189 .196 .016 .026 0.406 0.660 0.25 x 45˚ 0.50 0-8˚ 4.80 5.00 0.40 .016 1.27 .050 .053 .068 .2284 .2440 5.80 6.20 1.35 1.75 SEATING PLANE REF .050 BSC 1.27 .0040 0.10 .0098 0.25 .013 0.330 .020 0.508 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 7 P-0.1 01/20/03 ADVANCE INFORMATION PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 16-Pin TSSOP (4.4mm wide) Package 16 .169 .177 4.3 4.5 1 .193 .201 4.9 5.1 .004 .008 .047 max. 1.20 0.45 .018 0.75 .030 SEATING PLANE .0256 BSC 0.65 .007 .012 .002 .006 0.09 0.20 .252 BSC 6.4 0.05 0.15 X.XX DENOTES CONTROLLING X.XX DIMENSIONS IN MILLIMETERS 0.19 0.30 Ordering Information Part Pin-Package Te mpe rature PI90LV3486W 16- SOIC –40ºC to 85ºC PI90LV9637W 8- SOIC –40ºC to 85ºC PI90LVT3486W 16- SOIC –40ºC to 85ºC PI90LVT9637W 8- SOIC –40ºC to 85ºC PI90LV3486L 16- TSSOP –40ºC to 85ºC PI90LVT3486L 16- TSSOP –40ºC to 85ºC Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 8 P-0.1 01/20/03