ETC PZT2222AT1/D

ON Semiconductor
PZT2222AT1
NPN Silicon Planar
Epitaxial Transistor
ON Semiconductor Preferred Device
This NPN Silicon Epitaxial transistor is designed for use in linear
and switching applications. The device is housed in the SOT-223
package which is designed for medium power surface mount
applications.
• PNP Complement is PZT2907AT1
• The SOT-223 package can be soldered using wave or reflow.
• SOT-223 package ensures level mounting, resulting in improved
thermal conduction, and allows visual inspection of soldered joints.
The formed leads absorb thermal stress during soldering, eliminating
the possibility of damage to the die.
BASE
• Available in 12 mm tape and reel
1
Use PZT2222AT1 to order the 7 inch/1000 unit reel.
Use PZT2222AT3 to order the 13 inch/4000 unit reel.
SOT-223 PACKAGE
NPN SILICON
TRANSISTOR
SURFACE MOUNT
COLLECTOR
2, 4
4
1
2
3
3
EMITTER
CASE 318E-04, STYLE 1
TO-261AA
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Collector-Emitter Voltage
VCEO
40
Vdc
Collector-Base Voltage
VCBO
75
Vdc
Emitter-Base Voltage (Open Collector)
VEBO
6.0
Vdc
IC
600
mAdc
PD
1.5
Watts
Storage Temperature Range°
Tstg
– 65 to +150
°C
Junction Temperature°
TJ
150
°C
RθJA
83.3
°C/W
TL
260
10
°C
Sec
Collector Current
Total Power Dissipation up to TA =
25°C(1)
THERMAL CHARACTERISTICS
Thermal Resistance from Junction to Ambient
Lead Temperature for Soldering, 0.0625″ from case
Time in Solder Bath
DEVICE MARKING
P1F
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Max
Unit
Collector-Emitter Breakdown Voltage (IC = 10 mAdc, IB = 0)
V(BR)CEO
40
—
Vdc
Collector-Base Breakdown Voltage (IC = 10 µAdc, IE = 0)
V(BR)CBO
°75°
°—°
Vdc
Emitter-Base Breakdown Voltage (IE = 10 µAdc, IC = 0)
V(BR)EBO
6.0
—
Vdc
Base-Emitter Cutoff Current (VCE = 60 Vdc, VBE = – 3.0 Vdc)
IBEX
—
20
nAdc
Collector-Emitter Cutoff Current (VCE = 60 Vdc, VBE = – 3.0 Vdc)
ICEX
—
10
nAdc
Emitter-Base Cutoff Current (VEB = 3.0 Vdc, IC = 0)
IEBO
—
100
nAdc
OFF CHARACTERISTICS
1. Device mounted on an epoxy printed circuit board 1.575 inches x 1.575 inches x 0.059 inches; mounting pad for the collector lead min. 0.93 inches2.
Preferred devices are ON Semiconductor recommended choices for future use and best overall value.
 Semiconductor Components Industries, LLC, 2001
March, 2001 – Rev. 3
1
Publication Order Number:
PZT2222AT1/D
PZT2222AT1
ELECTRICAL CHARACTERISTICS — continued (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Max
Unit
—
—
10
10
nAdc
µAdc
35
50
70
35
100
50
40
—
—
—
—
300
—
—
—
—
0.3
1.0
0.6
—
1.2
2.0
2.0
0.25
8.0
1.25
—
—
8.0x10-4
4.0x10-4
50
75
300
375
5.0
25
35
200
F
—
4.0
dB
Current-Gain — Bandwidth Product
(IC = 20 mAdc, VCE = 20 Vdc, f = 100 MHz)
fT
300
—
MHz
Output Capacitance
(VCB = 10 Vdc, IE = 0, f = 1.0 MHz)
Cc
—
8.0
pF
Input Capacitance
(VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz)
Ce
—
25
pF
(VCC = 30 Vdc, IC = 150 mAdc,
IB(on)
mAdc VEB(off)
0 5 Vdc)
B( ) = 15 mAdc,
EB( ff) = 0.5
Figure 1
td
—
10
ns
tr
—
25
(VCC = 30 Vdc, IC = 150 mAdc,
IB(on)
B( ) = IB(off)
B( ff) = 15 mAdc)
Figure 2
ts
—
225
tf
—
60
OFF CHARACTERISTICS (continued)
Collector-Base Cutoff Current
(VCB = 60 Vdc, IE = 0)
(VCB = 60 Vdc, IE = 0, TA = 125°C)
ICBO
ON CHARACTERISTICS
DC Current Gain
(IC = 0.1 mAdc, VCE = 10 Vdc)
(IC = 1.0 mAdc, VCE = 10 Vdc)
(IC = 10 mAdc, VCE = 10 Vdc)
(IC = 10 mAdc, VCE = 10 Vdc, TA = – 55°C)
(IC = 150 mAdc, VCE = 10 Vdc)
(IC = 150 mAdc, VCE = 1.0 Vdc)
(IC = 500 mAdc, VCE = 10 Vdc)
hFE
Collector-Emitter Saturation Voltages
(IC = 150 mAdc, IB = 15 mAdc)
(IC = 500 mAdc, IB = 50 mAdc)
VCE(sat)
Base-Emitter Saturation Voltages
(IC = 150 mAdc, IB = 15 mAdc)
(IC = 500 mAdc, IB = 50 mAdc)
VBE(sat)
Input Impedance°
(VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz)
(VCE = 10 Vdc, IC = 10 mAdc, f = 1.0 kHz)
°hie°
Voltage Feedback Ratio
(VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz)
(VCE = 10 Vdc, IC = 10 mAdc, f = 1.0 kHz)
hre
Small-Signal Current Gain
(VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz)
(VCE = 10 Vdc, IC = 10 mAdc, f = 1.0 kHz)
hfe
Output Admittance°
(VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz)
(VCE = 10 Vdc, IC = 10 mAdc, f = 1.0 kHz)
°hoe°
Noise Figure (VCE = 10 Vdc, IC = 100 µAdc, f = 1.0 kHz)
—
Vdc
Vdc
kΩ
—
—
µmhos
DYNAMIC CHARACTERISTICS
SWITCHING TIMES (TA = 25°C)
Delay Time
Rise Time
Storage Time
Fall Time
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2
ns
PZT2222AT1
VCC
Vi
R2
90%
10%
0
tr
Vo
R1
Vi
D.U.T.
tp
Figure 1. Input Waveform and Test Circuit for Determining Delay Time and Rise Time
Vi = – 0.5 V to +9.9 V, VCC = +30 V, R1 = 619 Ω, R2 = 200 Ω.
PULSE GENERATOR:
PULSE DURATION
RISE TIME
DUTY FACTOR
tp ≤
tr ≤
δ =
OSCILLOSCOPE:
INPUT IMPEDANCE
INPUT CAPACITANCE
RISE TIME
200 ns
2 ns
0.02
Zi
Ci
tr
> 100 kΩ
<
12 pF
<
5 ns
VCC
Vi
+16.2 V
R2
0
Vi
TIME
R1
D.U.T.
R3
Vo
OSCILLOSCOPE
D1
-13.8 V
tf
R4
100 µs
VBB
Figure 2. Input Waveform and Test Circuit for Determining Storage Time and Fall Time
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PZT2222AT1
INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.15
3.8
0.079
2.0
0.091
2.3
0.248
6.3
0.091
2.3
0.079
2.0
0.059
1.5
0.059
1.5
0.059
1.5
inches
mm
SOT-223
SOT-223 POWER DISSIPATION
Although the power dissipation can almost be doubled with
this method, area is taken up on the printed circuit board
which can defeat the purpose of using surface mount
technology. A graph of RθJA versus collector pad area is
shown in Figure 3.
The power dissipation of the SOT-223 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by TJ(max), the maximum rated junction
temperature of the die, RθJA, the thermal resistance from the
device junction to ambient, and the operating temperature,
TA. Using the values provided on the data sheet for the
SOT-223 package, PD can be calculated as follows:
R
JA , Thermal Resistance, Junction
to Ambient (C/W)
PD =
160
Board Material = 0.0625″
G10/FR4, 2 oz Copper
140
TJ(max) – TA
TA = 25°C
0.8 Watts
° 120
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 1.5 watts.
1.25 Watts*
1.5 Watts
100
θ
80
0.0
PD = 150°C – 25°C = 1.5 watts
83.3°C/W
*Mounted on the DPAK footprint
0.2
0.4
0.6
A, Area (square inches)
0.8
1.0
Figure 3. Thermal Resistance versus Collector
Pad Area for the SOT-223 Package (Typical)
The 83.3°C/W for the SOT-223 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 1.5 watts.
There are other alternatives to achieving higher power
dissipation from the SOT-223 package. One is to increase
the area of the collector pad. By increasing the area of the
collector pad, the power dissipation can be increased.
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
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4
PZT2222AT1
SOLDER STENCIL GUIDELINES
or stainless steel with a typical thickness of 0.008 inches.
The stencil opening size for the SOT-223 package should be
the same as the pad size on the printed circuit board, i.e., a
1:1 registration.
Prior to placing surface mount components onto a printed
circuit board, solder paste must be applied to the pads. A
solder stencil is required to screen the optimum amount of
solder paste onto the footprint. The stencil is made of brass
SOLDERING PRECAUTIONS
• The soldering temperature and time should not exceed
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference should be a maximum of 10°C.
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient should be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
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PZT2222AT1
TYPICAL SOLDER HEATING PROFILE
graph shows the actual temperature that might be
experienced on the surface of a test board at or near a central
solder joint. The two profiles are based on a high density and
a low density board. The Vitronics SMD310
convection/infrared reflow soldering system was used to
generate this profile. The type of solder used was 62/36/2
Tin Lead Silver with a melting point between 177–189°C.
When this type of furnace is used for solder reflow work, the
circuit boards and solder joints tend to heat first. The
components on the board are then heated by conduction. The
circuit board, because it has a large surface area, absorbs the
thermal energy more efficiently, then distributes this energy
to the components. Because of this effect, the main body of
a component may be up to 30 degrees cooler than the
adjacent solder joints.
For any given circuit board, there will be a group of
control settings that will give the desired heat pattern. The
operator must set temperatures for several heating zones,
and a figure for belt speed. Taken together, these control
settings make up a heating “profile” for that particular
circuit board. On machines controlled by a computer, the
computer remembers these profiles from one operating
session to the next. Figure 4 shows a typical heating profile
for use when soldering a surface mount device to a printed
circuit board. This profile will vary among soldering
systems but it is a good starting point. Factors that can affect
the profile include the type of soldering system in use,
density and types of components on the board, type of solder
used, and the type of board or substrate material being used.
This profile shows temperature versus time. The line on the
STEP 1
PREHEAT
ZONE 1
RAMP"
200°C
STEP 2
STEP 3
VENT
HEATING
SOAK" ZONES 2 & 5
RAMP"
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
150°C
STEP 5
STEP 6 STEP 7
STEP 4
HEATING
VENT COOLING
HEATING
ZONES 3 & 6 ZONES 4 & 7
205° TO
SPIKE"
SOAK"
219°C
170°C
PEAK AT
SOLDER
160°C
JOINT
150°C
100°C
140°C
100°C
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
50°C
TMAX
TIME (3 TO 7 MINUTES TOTAL)
Figure 4. Typical Solder Heating Profile
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PZT2222AT1
PACKAGE DIMENSIONS
SOT–223 (TO–261)
CASE 318E–04
ISSUE K
A
F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
4
S
1
2
3
B
D
L
G
J
C
0.08 (0003)
H
M
K
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7
INCHES
DIM MIN
MAX
A
0.249
0.263
B
0.130
0.145
C
0.060
0.068
D
0.024
0.035
F
0.115
0.126
G
0.087
0.094
H 0.0008 0.0040
J
0.009
0.014
K
0.060
0.078
L
0.033
0.041
M
0
10 S
0.264
0.287
MILLIMETERS
MIN
MAX
6.30
6.70
3.30
3.70
1.50
1.75
0.60
0.89
2.90
3.20
2.20
2.40
0.020
0.100
0.24
0.35
1.50
2.00
0.85
1.05
0
10 6.70
7.30
PZT2222AT1
Thermal Clad is a trademark of the Bergquist Company
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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PZT2222AT1/D