ETC UCC39411N

 1 0
SLUS245B – MARCH 1999 REVISED JULY 2000
1-V Input Voltage Operation Start-Up
PW PACKAGE
(TOP VIEW)
Ensured Under Full Load on Main Output,
and Operation Down to 0.5 V
200-mW Output Power at Battery Voltages
as Low as 0.8 V
Secondary 7-V Supply from a Single
Inductor
Output Fully Disconnected in Shutdown
Adaptive Current Mode Control for
Optimum Efficiency
High Efficiency Over Wide Operating Range
6- A Shutdown Supply Current
Output Reset Function with Programmable
Reset Period
1
2
3
4
VIN
SD/FB
RESB
CT
8
7
6
5
VGD
VOUT
SW
GND
D, N, OR J PACKAGE
(TOP VIEW)
VOUT
VGD
VIN
SD/FB
1
8
2
7
3
6
4
5
SW
GND
CT
RESB
description
The UCCx9411 family of low-input voltage, single-inductor-boost converters is optimized to operate from a
single or dual alkaline cell, and steps up to a 3.3-V, 5-V, or adjustable output at 200 mW. The UCCx9411 family
also provides an auxiliary 7-V output, primarily for the gate-drive supply, which can be used for applications
requiring an auxiliary output, such as 5 V, by linear regulating. The primary output starts up under full load at
input voltages typically as low as 0.8 V with a ensured max of 1 V, and operates down to 0.5 V once the converter
is operating, thereby maximizing battery usage.
simplified block diagram and application circuit
+
22 µ H
100 µ F
1 V TO 3.5 V
SW
1
VIN
6
VGD
3.3 V 200 mW
8
1.2 Ω
7
100 µ F
START–UP
CIRCUITRY
VOUT
100 µ F
0.5 Ω
MODULATOR CONTROL CIRCUIT
SYNCHRONOUS RECTIFICATION CIRCUITRY
ANTI–CROSS CONDUCTION
START–UP
MULTIPLEXING LOGIC
MAX INPUT POWER CONTROL
ADAPTIVE CURRENT CONTROL
R RES
RESB
SD/FB
2
RESET CONTROL CIRCUIT
GLITCH SUPRESSION
PROGRAMMABLE TIMING
3
CT
4
GND
CT
5
NOTE A: Pinout shown is for the TSSOP Package. Consult Package Descriptions for the DIP and SOIC configurations.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2000, Texas Instruments Incorporated
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*+&) -))&+/ )',+#'& ()'**#&! '* &'+ &**)#$/ #&$,
+*+#&! ' $$ ()%+)*
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description (continued)
The UCCx9411 family is designed to accommodate demanding applications such as pagers and cell phones
that require high efficiency over a wide operating range of several milli-watts to a couple of hundred milli-watts.
High efficiency at low output current is achieved by optimizing switching and conduction losses with a low total
quiescent current. At higher output current, the 0.5-Ω switch and 1.2-Ω synchronous rectifier along with
continuous mode conduction provide high power efficiency. The wide input voltage range of the UCCx9411
family can accommodate other power sources such as NiCd and NimH.
The UCCx9411 family also provides shutdown control. Packages available are the 8-pin SOIC (D), 8-pin DIP
(J or N), and 8-pin TSSOP (PW) to optimize board space.
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 10 V
Input Voltage, SD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VIN
Input Voltage, VGD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 14 V
Input Voltage, SW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 15 V
Output Voltage, VOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 10 V
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡ Currents are positive into, negative out of the specific terminal. Consult Packaging Section of the Portable Products Data Book (TI Literature
Number SLUD001) for thermal limitations and considerations of packages.
AVAILABLE OPTIONS
Package PW
Output Voltage
TJ
2
Package D, N, or J
Output Voltage
1.25 V
1.25 V
2.5 V
1.25 V
1.25 V
2.5 V
–55°C to 125°C
19411PW
19412PW
19413PW
19411D/N/J
19412D/N/J
19413D/N/J
–40°C to 85°C
29411PW
29412PW
29413PW
29411D/N/J
29412D/N/J
29413D/N/J
0°C to 70°C
39411PW
39412PW
39413PW
39411D/N/J
39412D/N/J
39413D/N/J
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electrical characteristics, TJ = 0°C to 70°C for the UCC3941x, TJ = –40°C to 85°C for the UCC2941x,
TJ = –55°C to 125°C for the UCC1941x, VIN = 1.25 V for UCC39411, UCC39412, VIN = 2.5 V for the
UCC39413, TA = TJ
UCC1941x
UCC2941x
UCC3941x
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
TJ = 25°C,
See Note 1
0.8
IOUT = 60 mA
0.9
MIN
UNITS
TYP
MAX
1
0.08
1
V
1.1
1.2
1.4
V
0.7
V
Input Voltage Section
start up voltage
Minimum start-up
Minimum dropout voltage
No external VGD load,
IOUT = 60 mA
No external VGD load,
See Note 1
No external VGD load, IOUT = 10 mA
See Note 1
Input voltage range
0.5
3.2
V
Quiescent supply current
See Note 2
1.1
6
3.2
12
1.3
8
16
µA
Supply current at shutdown
SD = GND
6
12
8
16
µA
Quiescent supply current
See Note 2
15
28
20
37
µA
Supply current at shutdown
SD = GND
3
6
5
10
µA
3.2
3.3
3.39
3.15
3.3
3.45
V
3.17
3.3
3.43
3.11
3.3
3.5
V
4.85
5
5.15
4.78
5
5.23
V
4.8
5
5.2
4.71
5
5.3
V
1.212
1.25
1.288
1.194
1.25
1.306
V
5.5
V
Output Section
1 V < VIN < 3 V
Regulation voltage (UCC39412)
1 V < VIN < 3 V,
See Note 1
0 mA < IOUT < 60 mA
1 V < VIN < 5 V
Regulation voltage (UCC39413)
1 V < VIN < 5 V,
See Note 1
ADJ voltage (UCC39411)
1 V < VIN < 3 V
0 mA < IOUT < 60 mA
Maximum output voltage
(UCCx9411)
5.5
VGD Output Section
Quiescent supply current
See Note 2
20
40
27
55
µA
Supply current at shutdown
SD = GND
20
40
27
55
µA
6.3
7
7.7
6.3
7
7.7
V
6.3
7
7.7
6.3
7
7.7
V
1 V < VIN < 3 V
Regulation voltage (UCC39411/2)
1 V < VIN < 3 V,
See Note 1
0 mA < IOUT < 10 mA
1 V < VIN < 5 V
Regulation voltage (UCC39413)
1 V < VIN < 5 V,
See Note 1
7.7
8.5
9.3
7.7
8.5
9.3
V
0 mA < IOUT < 10 mA
7.7
8.5
9.3
7.7
8.5
9.3
V
L = 22.1 µH
180
250
300
180
250
300
mA
385
550
715
385
550
715
mA
0.75
0.6
0.85
Inductor Charging Section (L = 22 µH)
Peak discontinuous current
Operating range,
Peak continuous current
Charge switch RDS(on)
D package
0.5
Current limit delay
See Note 1
50
D package
1.2
50
Ω
ns
Synchronous Rectifier Section
Rectifier RDS(on)
1.8
1.4
2.16
Ω
NOTES: 1. Ensured by design. Not production tested.
2. For the UCC39411 FB = 1.306 V, VGD = 7.7 V, For the UCC39412 VOUT = 3.5 V and VGD = 7.7 V, For the UCC39413 VOUT = 5.3 V,
VGD=9.3 V.
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SLUS245B – MARCH 1999 REVISED JULY 2000
electrical characteristics, TJ = 0°C to 70°C for the UCC3941x, TJ = –40°C to 85°C for the UCC2941x,
TJ = –55°C to 125°C for the UCC1941x, VIN = 1.25 V for UCC39411, UCC39412, VIN = 2.5 V for the
UCC39413, TA = TJ (continued)
UCC1941x
UCC2941x
UCC3941x
PARAMETER
TEST CONDITIONS
UNITS
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
0.4
0.6
0.8
0.2
0.6
0.9
V
2
5
15
2
5
20
Shutdown Section
Threshold
SD = GND
Input bias current
SD = 1.25 V
5
15
µA
20
100
nA
Reset Section
Threshold (UCC39411)
1.08
1.125
1.17
1.07
1.125
1.18
V
Threshold (UCC39412)
2.85
2.97
3.09
2.83
2.97
3.11
V
Threshold (UCC39413)
4.32
4.5
4.68
4.3
4.5
4.7
V
113
188
263
94
188
282
ms
Reset period
CT = 0.15 µF
VOUT to reset delay
Sink current
VOUT falling at –1 mV/µs,
Output low voltage
IOUT = 500 µA
See Note 1
60
1
Output leakage
µs
60
20
1
20
mA
0.1
0.1
V
0.5
0.5
µA
NOTES: 1. Ensured by design. Not production tested.
2. For the UCC39411 FB = 1.306 V, VGD = 7.7 V, For the UCC39412 VOUT = 3.5 V and VGD = 7.7 V, For the UCC39413 VOUT = 5.3 V,
VGD=9.3 V.
pin assignments
VIN: Input voltage to supply the IC during start-up. After the output is running the IC draws power from VOUT
or VGD.
SW: An inductor is connected between this pin and VIN. The VGD (gate drive supply) flyback diode is also
connected to this pin. When servicing the main output supply this pin pulls low, charging the inductor, then shuts
off dumping the energy through the synchronous rectifier to the output. When servicing the VGD supply, the
internal synchronous rectifier stays off and the energy is diverted to VGD through the flyback diode. During
discontinuous portions of the inductor current, a MOSFET resistively connects VIN to SW damping excess
circulating energy to eliminate undesired high-frequency ringing.
VGD: The VGD pin, which is coarsely regulated around 7 V (8.5 V for the UCC39413), is primarily used for the
gate drive supply for the power switches in the IC. This pin can be loaded with up to 10 mA as long as it does
not present a load at voltages below 2 V (this ensures proper start-up of the IC). The VGD supply can go as
low as 6.3 V without interfering with the servicing of the main output. When below 6.3 V, VGD has the highest
priority.
VOUT: Main output voltage (3.3 V, 5 V, or adjustable), has highest priority in the multiplexing scheme, as long
as VGD is above the critical level of 6.3 V. Startup at full load is achievable at input voltages down to 1 V.
CT: This pin provides the timer for determining the reset period. The period is controlled by placing a capacitor
to ground of value C = (0.81e–6) × t where t is the desired reset period.
RESB: This pin provides an active low signal to alert the user when the main output voltage falls below 10%
of its targeted value. The open-drain output can be used to reset a microcontroller that may be powered off of
the main output voltage.
SD/FB: For the UCC39411, this pin is used to adjust the output voltage via a resistive divider from VOUT. It also
serves as the shutdown pin for all three versions. Pulling this pin low provides a shutdown signal to the IC.
GND: Ground of the IC.
4
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APPLICATION INFORMATION
operation
A detailed block diagram of the UCC39411 is shown in Figure 1. Unique control circuitry provides high-efficiency
power conversion for both light and heavy loads by transitioning between discontinuous and continuous
conduction based on load conditions. Figure 2 depicts converter waveforms for the application circuit shown
in Figure 3. A single 22-µH inductor provides the energy pulses required for a highly efficient 3.3-V converter
at up to 200-mW output power.
At time t1, the 3.3-V output voltage has dropped below its lower threshold, and the inductor is charged with an
on time determined by: tON = 5.5 µs/VIN. For a 1.25-V input and a 22-µH inductor, the resulting peak current
is approximately 250 mA. At time t2, the inductor begins to discharge with a minimum off time of approximately
1 ms. Under lightly loaded conditions, the amount of energy delivered in this single pulse satisfies the
voltage-control loop, and the converter does not command any more energy pulses until the output again drops
below the lower-voltage threshold.
At time t3, the VGD supply drops below its lower threshold, but the output voltage is still above its threshold point.
This results in an energy pulse to the gate-drive supply at t4. In some cases, a single pulse supplied to VGD
is insufficient to raise the VGD voltage level enough to satisfy the voltage loop. Under this condition, multiple
pulses are supplied to VGD. Note that when the UCC3941x is servicing VGD only, the IC maintains a
discontinuous mode of operation. After time t4, the 3.3-V output drops below its threshold and requests to be
serviced once the VGD cycle has completed, which occurs at time t5.
Time t6 represents a transition between light load and heavy load. A single energy pulse is not sufficient to force
the output voltage above its upper threshold before the minimum off time has expired and a second charge cycle
is commanded. Since the inductor current does not reach zero in this case, the peak current is greater than
250 mA at the end of the next charge on time. The result is a ratcheting of inductor current until either the output
voltage is satisfied, or the converter reaches its set current limit. At time t7, the gate drive voltage has dropped
below its 7-V threshold but the converter continues to service the output because it has higher priority unless
VGD drops below ≈ 6.3 V.
Between time t7 and t8, the converter reaches its peak current limit.
Once the peak current is reached, the converter operates in continuous mode with approximately 60-mA of
inductor current ripple. At time t8, the 3.3-V output is satisfied and the converter can service the gate drive
voltage, VGD, which occurs at time t9.
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5
6
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6
5
RESET
2
CT
VGD
• DALLAS, TEXAS 75265
2.5 V
VOUT
VREF
GOOD
5 V GS
VGD
RESET
TIMER
CT
VLOW
VBAT
VGD
1.25 V
REFERENCE
0.66 A
MAX
FROM SD
INTERNAL
BIAS
VDD
RISING EDGE
DELAY
T ON = 5.5 E –6
VBAT
50 ns
R.E.D.
C PUMP
8
3
200 kHZ
START–UP
OSCILLATOR
AND
CONTROL
SW
VIN
VON
50 ns
R.E.D.
VGD
1 µs
R.E.D.
VON
SD
R
Q
Q
t OFF TIMER
1-µ s RISING
EDGE DELAY
VBAT
R
SD
PRIORITY
ENCODER
D
CLK
FROM SD
VREF GOOD
VGD
Q
6 V (UCC39411/2)
7.5 V (UCC39413)
VGD
7.5 V (UCC39411/2)
8.5 V (UCC39413)
VGD
1.25 V (UCC39411)
3.3 V (UCC39412)
5.0 V (UCC39413)
0.5V
SD
1.2 Ω
7
4
1
SD/FB
VOUT
SLUS245B – MARCH 1999 REVISED JULY 2000
APPLICATION INFORMATION
NOTE A: Switches are shown in the low state. Pinouts as shown is for the 8-pin D, J, or N. See package descriptions for 8-pin SOIC.
Figure 1. Low Power Synchronous Boost
SLUS245B – MARCH 1999 REVISED JULY 2000
APPLICATION INFORMATION
VGD
RIPPLE
50 mV/DIV
7V
200 mVP–P
TYPICAL
OUTPUT
RIPPLE
20 mV/DIV
3.3 V
20 mVP–P
CURRENT
LIMIT
TYPICAL
INDUCTOR
CURRENT
t2
t1
t3
t4
t5
t6
t7
LIGHT LOAD CURRENT
t8
t9
HIGH LOAD CURRENT
Figure 2. Inductor Current and Output Ripple Waveforms
L=10 µ H TO 100 µ H
10 µ F
2
3
8
VIN
SW
VGD
VOUT
1
10 µ F
R1
6
80 nF
CT
SD/FB
1–2 CELL ALKALINE
1.0 V TO 3.2 V
100 µ F
4
VOUT
100 k Ω
5
R2
RESET
GND
7
Figure 3. Low Power Synchronous Boost Converter ADJ Version –200 mW
NOTE A: Pinout shown is for the TSSOP Package. Consult Package Descriptions for the DIP and SOIC configurations.
POST OFFICE BOX 655303
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7
SLUS245B – MARCH 1999 REVISED JULY 2000
APPLICATION INFORMATION
shutdown control
Shutdown of the UCC3941x is controlled via the interface with the SD/FB pin. Pulling the SD/FB pin low, for all
versions, causes the IC to go into shutdown. In the UCC39412 and UCC39413, the SD/FB pin is used solely
as a shutdown function. Therefore, the SD/FB pin for the UCC39412 and UCC39413 can be directly controlled
using conventional CMOS or transistor to transistor logic (TTL) technology. For the UCC39411, interface into
the SD/FB is slightly more complicated due to the added feedback function. When feeding back the output
voltage to the SD/FB pin on the UCC39411, the IC requires a Thevenin impedance of at least 200-kΩ (500-kΩ
for industrial/military applications) to ground. Then, to accomplish shutdown of the IC, an open-drain device may
be used.
component selection inductor selection
An inductor value of 22 µH works well in most applications, but values between 10 µH to 100 µH are also
acceptable. Lower value inductors typically offer lower ESR and smaller physical size. Due to the nature of the
“bang-bang” controllers, larger inductor values typically result in larger overall voltage ripple, because once the
output voltage level is satisfied the converter goes discontinuous, resulting in the residual energy of the inductor
causing overshoot.
It is recommended to keep the ESR of the inductor below 0.15 Ω for 200-mW applications. A Coilcraft
DT3316P-223 surface-mount inductor is acceptable because it has a current rating of 1.5 A and an ESR of 84
mΩ.
Other choices for surface-mount inductors are shown in Table 1.
Table 1. Inductor Suppliers
MANUFACTURER
PART NUMBERS
Coilcraft
DT Series
Cary, Illinois
Tel: 708–639–2361
Fax: 708–639–1469
Coiltronics
CTX Series
Boca Raton, Florida
Tel: 407–241–7876
output capacitor selection
Once the inductor value is selected, the capacitor value determines the ripple of the converter. The worst case
peak-to-peak ripple of a cycle is determined by two components, one is due to the charge storage characteristic,
and the other is the ESR of the capacitor. The worst case ripple occurs when the inductor is operating at max
current and is expressed as follows:
2
ICL L
V I C
CL ESR
2CV V I
O
8
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SLUS245B – MARCH 1999 REVISED JULY 2000
APPLICATION INFORMATION
output capacitor selection (continued)
•
•
•
•
•
ICL = the peak inductor current = 550 mA
∆V = Output ripple
VO = Output voltage
VI = Input voltage
CESR = ESR of the output capacitor
A Sanyo OS-CON series surface-mount capacitor (10SN100M) is acceptable. It has an ESR rating of 90 mΩ
at 100 µF.
Other potential capacitor sources are shown in Table 2.
Table 2. Capacitor Supplies
MANUFACTURER
Sanyo Video Components
PART NUMBER
OS–CON
OS
CO Series
Se es
San Diego, California
Tel: 619–661–6322
Fax: 619–661–1055
TPS
S Se
Series
es
AVX
Sanford, Maine
Tel: 207–282–5111
Fax: 207–283–1941
695D Se
695
Series
es
Sprague
Concord, New Hampshire
Tel: 603–224–1961
input capacitor selection
Since the UCCx9411 family does not require a large decoupling capacitor on the input voltage to operate
properly, a 10-µF cap is sufficient for most applications. Optimum efficiency occurs when the capacitor value
is large enough to decouple the source impedance, this usually occurs for capacitor values in excess of 100 µF.
RESET operation
A reset function is provided to prevent the microprocessor from executing code during undervoltage conditions,
typically during power up or power down. The reset voltage threshold is fixed at 90% of the output voltage for
all versions of the UCCx941x. To prevent erratic operation in noisy environments, a glitch filter is provided.
To allow sufficient time for the microprocessor clock to stabilize, a user-programmable reset period is provided.
The reset period, the time from the output voltage rising above 90% of nominal to RESB going high, is
programmed via an external capacitor connected to the CT pin.
The reset period is defined as:
t
RP
C 1.25
where C is in µF, and tRP is in seconds.
A typical reset profile during power up is shown in Figure 4 and power down in Figure 5.
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9
SLUS245B – MARCH 1999 REVISED JULY 2000
APPLICATION INFORMATION
POWER-DOWN SEQUENCE
POWER-UP SEQUENCE
VOUT
VOUT
RESB
RESB
CT
Figure 5
Figure 4
TYPICAL EFFICIENCY
vs
LOAD CURRENT
TYPICAL EFFICIENCY
vs
LOAD CURRENT
100
100
90
VIN = 3.0 V
90
V
70
V
IN
= 2.4 V
IN
= 1.2 V
= 3.0 V
70
Efficiency - %
Efficiency - %
IN
80
80
60
50
40
30
0
0.025
0.04
0.06
0.0001
0.001
0.01
0.025
Load Current – A
Load Current – A
Figure 6
Figure 7
POST OFFICE BOX 655303
= 1.2 V
UCC39411 @ 3.3 VOUT
L = 22 µH, DO1608-223
20
0
0.01
IN
40
10
0.001
V
50
10
0.0001
VIN = 2.4 V
60
30
UCC39411 @ 3.3 VOUT
L = 22 µH, DO3316-223
20
10
V
• DALLAS, TEXAS 75265
0.04
0.06
SLUS245B – MARCH 1999 REVISED JULY 2000
APPLICATION INFORMATION
TYPICAL EFFICIENCY
vs
LOAD CURRENT
TYPICAL EFFICIENCY
vs
LOAD CURRENT
100
90
100
V
IN
= 3.0 V
90
80
IN
= 3.0 V
80
70
V
VIN = 2.4 V
IN
70
= 1.2 V
Efficiency - %
Efficiency - %
V
60
50
40
30
20
60
50
40
30
UCC39412 L = 22 µH,
DO3316-223
UCC39413 L = 15 µH,
DO3316-153
20
10
10
0
0
0.0001 0.001
0.01
0.02
0.03
0.04
0.06
0.0001
0.001
0.02
Load Current – A
Figure 8
Figure 9
0.03
0.04
TYPICAL EFFICIENCY
vs
LOAD CURRENT
100
100
V
IN
= 3.0 V
90
80
V
IN
= 3.0 V
80
70
70
VIN = 1.2 V
VIN = 2.4 V
Efficiency - %
Efficiency - %
0.01
Load Current – A
TYPICAL EFFICIENCY
vs
LOAD CURRENT
90
VIN = 1.2 V
VIN = 2.4 V
60
50
40
30
20
60
50
40
30
UCC39412 L = 22 µH,
DO1608-223
10
0
0
0.01
0.02
0.03
UCC39413 L = 15 µH,
DO1608-153
20
10
0.0001 0.001
0.04
0.06
VIN = 1.2 V
VIN = 2.4 V
0.0001
0.001
Load Current – A
0.01
0.02
0.03
0.04
Load Current – mA
Figure 10
Figure 11
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
SLUS245B – MARCH 1999 REVISED JULY 2000
APPLICATION INFORMATION
MAXIMUM LOAD CURRENT,
2 CELL APPLICATION
vs
INPUT CURRENT
TYPICAL EFFICIENCY
vs
LOAD CURRENT (TWO CELL
APPLICATION)
100
155
150
95
Efficiency - %
90
IN
VIN = 2.5 V
V
85
V
80
IN
IN
145
= 3.0 V
= 2.0 V
= 1.8 V
Load Current - mA
V
140
135
130
125
UCC39411 @ 3.3 VOUT
L = DO1608-223
120
75
UCC39411 @ 3.3 VOUT
L = DO1608-223
115
70
110
75
100
150
1.8
Load Current – mA
Figure 13
POST OFFICE BOX 655303
2.5
Input Voltage – V
Figure 12
12
2.0
• DALLAS, TEXAS 75265
3.0
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