TI UCC29413

UCC19411/2/3
UCC29411/2/3
UCC39411/2/3
application
INFO
available
Low Power Synchronous Boost Converter
PRELIMINARY
FEATURES
DESCRIPTION
• 1V Input Voltage Operation Start-up
Guaranteed under FULL Load on
Main Output, and Operation Down to
0.5V
The UCC39411 family of low input voltage, single inductor boost
converters is optimized to operate from a single or dual alkaline cell, and
steps up to a 3.3V, 5V, or adjustable output at 200mW. The UCC39411
family also provides an auxiliary 7V output, primarily for the gate drive
supply, which can be used for applications requiring an auxiliary output,
such as 5V, by linear regulating. The primary output will start up under full
load at input voltages typically as low as 0.8V with a guaranteed max of
1V, and will operate down to 0.5V once the converter is operating,
maximizing battery utilization.
• 200mW Output Power at Battery
Voltages as low as 0.8V
• Secondary 7V Supply from a Single
Inductor
• Output Fully Disconnected in
Shutdown
• Adaptive Current Mode Control for
Optimum Efficiency
• High Efficiency over Wide Operating
Range
• 6µA Shutdown Supply Current
• Output Reset Function with
Programmable Reset Period
The UCC39411 family is designed to accommodate demanding
applications such as pagers and cell phones that require high efficiency
over a wide operating range of several milli-watts to a couple of hundred
milli-watts. High efficiency at low output current is achieved by optimizing
switching and conduction losses with a low total quiescent current (50µA).
At higher output current the 0.5Ω switch, and 1.2Ω synchronous rectifier
along with continuous mode conduction provide high power efficiency. The
wide input voltage range of the UCC39411 family can accommodate other
power sources such as NiCd and NimH.
The 39411 family also provides shutdown control. Packages available are
the 8 pin SOIC (D), 8 pin DIP (N or J), and 8 pin TSSOP (PW) to optimize
board space.
SIMPIFIED BLOCK DIAGRAM AND APPLICATION CIRCUIT (UCC39412)
+
22µH
100µF
1V TO 3.5V
SW
1
6
VIN
VGD
8
1.2Ω
VOUT
100µF
START-UP
CIRCUITRY
3.3V 200mW
7
100µF
0.5Ω
MODULATOR CONTROL CIRCUIT
SYNCHRONOUS RECTIFICATION CIRCUITRY
ANTI-CROSS CONDUCTION
START-UP
MULTIPLEXING LOGIC
MAX INPUT POWER CONTROL
ADAPTIVE CURRENT CONTROL
SD/FB
2
RESET CONTROL CIRCUIT
GLITCH SUPRESSION
PROGRAMMABLE TIMING
RRES
3
4
5
RESB
CT
GND
CT
Note: Pinout shown is for the TSSOP Package. Consult Package Descriptions for DIP and SOIC configurations.
SLUS245A - MARCH 1999
UDG-98067
UCC19411/2/3
UCC29411/2/3
UCC39411/2/3
CONNECTION DIAGRAMS
ABSOLUTE MAXIMUM RATINGS
VIN Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 10V
SD Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to VIN
VGD Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 14V
SW Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 15V
DIL-8, SOIC-8 (TOP VIEW)
N or J Package, D Package
Currents are positive into, negative out of the specific terminal.
Consult Packaging Section of the Databook for thermal limitations and considerations of packages.
VOUT
1
8
SW
VGD
2
7
GND
VIN
3
6
CT
SD/FB
4
5
RESB
TSSOP-8 (TOP VIEW)
PW Package
VIN
1
8
VGD
SD/FB
2
7
VOUT
RESB
3
6
SW
CT
4
5
GND
ELECTRICAL CHARACTERISTICS: TJ= 0°C to +70°C for the UCC39411/2/3, TJ = –40°C to +85°C for the
UCC29411/2/3, TJ = –55C to +125°C for the UCC19411/2/3, VIN = 1.25V for UCC39411/2, VIN = 2.5V for the UCC39413, TA=TJ.
UCC39411
UCC39412
UCC39413
PARAMETER
TEST CONDITIONS
MIN
UCC19411/2/3
UCC29411/2/3
TYP
MAX
MIN
TYP
MAX UNITS
No External VGD Load, TJ=25°C,
IOUT=60mA (Note 1)
0.8
1
.08
1
V
No External VGD Load, IOUT=60mA
(Note 1)
0.9
1.1
1.2
1.4
V
0.7
V
VIN Section
Minimum Start-up Voltage
Minimum Dropout Voltage
No External VGD Load, IOUT=10mA
(Note 1)
Input Voltage Range
0.5
3.2
V
Quiescent Supply Current
(Note 2)
1.1
6
12
8
16
Supply Current at Shutdown
SD = GND
6
12
8
16
µA
µA
2
3.2
1.3
UCC19411/2/3
UCC29411/2/3
UCC39411/2/3
ELECTRICAL CHARACTERISTICS: TJ= 0°C to +70°C for the UCC39411/2/3, TJ = –40°C to +85°C for the
UCC29411/2/3, TJ = –55C to +125°C for the UCC19411/2/3, VIN = 1.25V for UCC39411/2, VIN = 2.5V for the UCC39413, TA=TJ.
UCC39411
UCC39412
UCC39413
PARAMETER
TEST CONDITIONS
MIN
UCC19411/2/3
UCC29411/2/3
TYP
MAX
15
28
MIN
TYP
MAX UNITS
Output Section
Quiescent Supply Current
(Note 2)
Supply Current at Shutdown
SD = GND
Regulation Voltage (UCC39412) 1V < VIN < 3V
1V < VIN < 3V, 0mA<IOUT<60mA
(Note 1)
Regulation Voltage (UCC39413) 1V < VIN < 5V
1V < VIN < 5V, 0mA<IOUT<60mA
(Note 1)
ADJ Voltage (UCC39411)
1V < VIN < 3V
3
6
5
10
µA
µA
3.2
3.3
3.39
3.15
3.3
3.45
V
3.17
3.3
3.43
3.11
3.3
3.5
V
4.85
5
5.15
4.78
5
5.23
V
4.8
5
5.2
4.71
5
5.3
V
1.212
1.25
1.288
1.194
1.25
1.306
V
µA
µA
20
37
VGD Output Section
Quiescent Supply Current
(Note 2)
20
40
27
55
Supply Current at Shutdown
SD = GND
20
40
27
55
Regulation Voltage
(UCC39411/2)
1V < VIN < 3V
6.3
7
7.7
6.3
7
7.7
V
1V < VIN < 3V, 0mA<IOUT<10mA
(Note 1)
6.3
7
7.7
6.3
7
7.7
V
7.7
8.5
9.3
7.7
8.5
9.3
V
7.7
8.5
9.3
7.7
8.5
9.3
V
180
250
300
180
250
300
mA
385
385
550
715
mA
0.6
0.85
Ω
Regulation Voltage (UCC39413) 1V < VIN < 5V
1V < VIN < 5V, 0mA<IOUT<10mA
(Note 1)
Inductor Charging Section (L=22µH)
Peak Discontinuous Current
Operating Range, L=22.1µH
Peak Continuous Current
550
715
Charge Switch RDSON
D Package
0.5
0.75
Current Limit Delay
(Note 1)
50
D Package
1.2
1.8
0.4
0.6
0.8
2
5
15
5
20
50
ns
Synchronous Rectifier Section
Rectifier RDSON
Ω
1.4
2.16
0.2
0.6
0.9
V
2
5
15
µA
20
100
nA
Shutdown Section
Threshold
Input Bias Current
SD = GND
SD = 1.25V
Reset Section
Threshold (UCC39411)
1.08
1.125
1.17
1.07
1.125
1.18
V
Threshold (UCC39412)
2.85
2.97
3.09
2.83
2.97
3.11
V
4.32
4.5
4.68
4.3
4.5
4.7
V
113
188
263
94
188
282
ms
60
µs
1
20
1
20
mA
Threshold (UCC39413)
Reset Period
CT = 0.15µF
VOUT to Reset Delay
VOUT Falling at –1mV/µs (Note 1)
Sink Current
Output Low Voltage
IOUT = 500µA
Output Leakage
60
0.1
0.1
V
0.5
0.5
µA
Note 1 : Guaranteed by design and alternate test methods. Not 100% tested in production.
Note 2: For the UCC39411 FB=1.306V, VGD=7.7V, For the UCC39412 VOUT=3.5V and VGD=7.7V, For the UCC39413
VOUT=5.3V, VGD=9.3V.
3
UCC19411/2/3
UCC29411/2/3
UCC39411/2/3
PIN DESCRIPTIONS
6.3V without interfering with the servicing of the main
output. Below 6.3V, VGD will have the highest priority.
VIN: Input Voltage to supply the IC during start-up. After
the output is running the IC draws power from VOUT or
VGD.
VOUT: Main output voltage (3.3V, 5V, or adjustable)
which has highest priority in the multiplexing scheme, as
long as VGD is above the critical level of 6.3V. Startup at
full load is achievable at input voltages down to 1V.
SW: An inductor is connected between this node and
VIN. The VGD (Gate Drive Supply) flyback diode is also
connected to this pin. When servicing the main output
supply this pin will pull low charging the inductor, then
shut off dumping the energy through the synchronous
rectifier to the output. When servicing the VGD supply
the internal synchronous rectifier stays off and the energy is diverted to VGD through the flyback diode. During
discontinuous portions of the inductor current, a MOSFET resistively connects VIN to SW damping excess circulating energy to eliminate undesired high frequency
ringing.
CT: This pin provides the timer for determining the reset
period. The period is controlled by placing a capacitor to
-6
ground of value C = (0.81e )•T where T is the desired
reset period.
RESB: This pin provides an active low signal to alert the
user when the main output voltage falls below 10% of its
targeted value. The open drain output can be used to reset a microcontroller which may be powered off of the
main output voltage.
VGD: The VGD pin which is coarsely regulated around
7V (8.5V for the UCC39413) is primarily used for the
gate drive supply for the power switches in the IC. This
pin can be loaded with up to 10mA as long as it does not
present a load at voltages below 2V (this ensures proper
start-up of the IC). The VGD supply can go as low as
SD/FB: For the UCC39411, this pin is used to adjust the
output voltage via a resistive divider from VOUT. It also
serves as the shutdown pin for all three versions. Pulling
this pin low provides a shutdown signal to the IC.
GND: Ground of the IC.
APPLICATION INFORMATION
Operation
VGD is insufficient to raise the VGD voltage level enough
to satisfy the voltage loop. Under this condition, multiple
pulses will be supplied to VGD.
Note: when the
UCC39411/2/3 is servicing VGD only, the IC will maintain
a discontinuous mode of operation. After time t4, the
3.3V output drops below its threshold and requests to be
serviced once the VGD cycle has completed, which occurs at time t5.
A detailed block diagram of the UCC39411 is shown in
Figure 1. Unique control circuitry provides high efficiency
power conversion for both light and heavy loads by transitioning between discontinuous and continuous conduction based on load conditions.
Figure 2 depicts
converter waveforms for the application circuit shown in
Figure 3. A single 22µH inductor provides the energy
pulses required for a highly efficient 3.3V converter at up
to 200mW output power
Time t6 represents a transition between light load and
heavy load. A single energy pulse is not sufficient to
force the output voltage above its upper threshold before
the minimum off time has expired and a second charge
cycle is commanded. Since the inductor current does
not reach zero in this case, the peak current is greater
than 250mA at the end of the next charge on time. The
result is a ratcheting of inductor current until either the
output voltage is satisfied, or the converter reaches its
set current limit. At time t7, the gate drive voltage has
dropped below its 7V threshold but the converter continues to service the output because it has higher priority
unless VGD drops below ≈ 6.3V
At time t1 the 3.3V output voltage has dropped below its
lower threshold, and the inductor is charged with an on
time determined by: TON = 5.5µs/VIN. For a 1.25V input
and a 22µH inductor, the resulting peak current is approximately 250mA. At time t2, the inductor begins to
discharge with a minimum off time of approximately 1µs.
Under lightly loaded conditions, the amount of energy
delivered in this single pulse would satisfy the voltage
control loop, and the converter would not command any
more energy pulses until the output again drops below
the lower voltage threshold
Between time t7 and t8, the converter reaches its peak
current limit.
At time t3 the VGD supply drops below its lower threshold, but the output voltage is still above its threshold
point. This results in an energy pulse to the gate drive
supply at t4. In some cases, a single pulse supplied to
Once the peak current is reached, the converter operates in continuous mode with approximately 60mA of in4
2
6
5
VGD
CT
RESET
Figure 1. Low power synchronous boost.
Notes: Switches are shown in the low state.
Pinout as shown is for the 8 pin D, N or J. See Package Descriptions for 8 pin SOIC.
5
2.5V
VOUT
VREF
GOOD
5VGS
VGD
RESET
TIMER
CT
VLOW
VBAT VGD
1.25
REFERENCE
0.66A
MAX
FROM SD
INTERNAL
BIAS
VDD
RISING EDGE
DELAY
TON = 5.5 E-6
VBAT
50nS
R.E.D.
CPUMP
VON
50nS
R.E.D.
VGD
8
3
200kHZ
START-UP
OSCILLATOR
AND
CONTROL
SW
VIN
1µS
R.E.D.
SD
R
Q
Q
1µS RISING
EDGE DELAY
TOFF TIMER
VBAT
VON
R
SD
PRIORITY
ENCODER
D
CLK
FROM SD
VREF GOOD
VGD
Q
4
1
6V (UCC39411/2)
7.5V (UCC39413)
VGD
7
7.5V (UCC39411/2)
8.5V (UCC39413)
VGD
1.25V (UCC39411)
3.3V (UCC39412)
5.0V (UCC39413)
0.5V
SD
1.2Ω
SD/FB
VOUT
UCC19411/2/3
UCC29411/2/3
UCC39411/2/3
APPLICATION INFORMATION (continued)
UDG-98068
UCC19411/2/3
UCC29411/2/3
UCC39411/2/3
APPLICATION INFORMATION (continued)
VGD
RIPPLE
50mV/DIV
7V
80mV P–P
TYPICAL
OUTPUT
RIPPLE
20mV/DIV
3.3V
20mV P–P
TYPICAL
CURRENT
LIMIT
INDUCTOR
CURRENT
t1
t2
t3
t4
t5
t6
t7
LIGHT LOAD CURRENT
t8
HIGH LOAD CURRENT
t9
UDG-98070
Figure 2. Inductor current and output ripple waveforms.
L=10µH TO
100µH
10µF
2
3
8
VIN
SW
VGD
VOUT
1
10µF
R1
6
80nF
CT
SD/FB
100µF
4
VOUT
R2
100kΩ
5
Note:
1-2 CELL ALKALINE
1.0V TO 3.2V
RESET
GND
7
Shown pinout is for the TSSOP package. See Package Descriptions for DIP and SOIC pinouts.
Figure 3. Low power synchronous boost converter ADJ version –200mW.
6
UDG-98069
UCC19411/2/3
UCC29411/2/3
UCC39411/2/3
APPLICATION INFORMATION (continued)
ductor current ripple. At time t8, the 3.3V output is
satisfied and the converter can service the gate drive
voltage, VGD, which occurs at time t9
Output Capacitor Selection
Once the inductor value is selected the capacitor value
will determine the ripple of the converter. The worst case
peak to peak ripple of a cycle is determined by two components, one is due to the charge storage characteristic,
and the other is the ESR of the capacitor. The worst
case ripple occurs when the inductor is operating at max
current and is expressed as follows:
Shutdown Control
Shutdown of the UCC39411/2/3 is controlled via interface with the SD/FB pin. Pulling the SD/FB pin low, for
all versions, causes the IC to go into shutdown. In the
UCC39412/3, the SD/FB pin is used solely as a shutdown function. Therefore, the SD/FB pin for the
UCC39412 and UCC39413 can be directly controlled using conventional CMOS or TTL technology. For the
UCC39411, interface into the SD/FB is slightly more
complicated due to the added feedback function. When
feeding back the output voltage to the SD/FB pin on the
UCC39411, the IC requires a thevenin impedance of at
least 200kΩ (500kΩ for industrial/military applications) to
ground. Then, to accomplish shutdown of the IC, an
open drain device may be used.
∆V =
• ICL = the peak inductor current = 550mA
• ∆V= Output ripple
• VO= Output Voltage
• VI= Input Voltage
• CESR= ESR of the output capacitor.
Component Selection Inductor Selection
A Sanyo OS-CON series surface mount capacitor
(10SN100M) is one recommendation. This part has an
ESR rating of 90mΩ at 100µF .
An inductor value of 22µH will work well in most applications, but values between 10µH to 100µH are also acceptable. Lower value inductors typically offer lower ESR
and smaller physical size. Due to the nature of the
“bang-bang” controllers, larger inductor values will typically result in larger overall voltage ripple, because once
the output voltage level is satisfied the converter goes
discontinuous, resulting in the residual energy of the inductor causing overshoot.
Other potential capacitor sources are shown in Table 2.
MANUFACTURER
Sanyo Video
Components
San Diego, California
Tel: 619-661-6322
Fax: 619-661-1055
AVX
Sanford, Maine
Tel: 207-282-5111
Fax: 207-283-1941
Sprague
Concord, New Hampshire
Tel: 603-224-1961
It is recommended to keep the ESR of the inductor below
0.15Ω for 200mW applications. A Coilcraft DT3316P-223
surface mount inductor is one choice since it has a current rating of 1.5A and an ESR of 84mΩ.
Other choices for surface mount inductors are shown in
Table 1.
MANUFACTURER
Coilcraft
Cary, Illinois
Tel: 708-639-2361
Fax: 708-639-1469
Coiltronics
Boca Raton, Florida
Tel: 407-241-7876
(ICL ) 2 L
+ ICL C ESR
2C (VO − V I )
PART NUMBERS
DT Series
PART NUMBER
OS-CON Series
TPS Series
695D Series
Table 2. Capacitor Suppliers
Input Capacitor Selection
Since the UCC39411 family does not require a large decoupling capacitor on the input voltage to operate properly, a 10µF cap is sufficient for most applications.
Optimum efficiency will occur when the capacitor value is
large enough to decouple the source impedance, this
usually occurs for capacitor values in excess of 100µF.
CTX Series
Table 1. Inductor Suppliers
7
UCC19411/2/3
UCC29411/2/3
UCC39411/2/3
TYPICAL CHARACTERISTICS
Figure 4. Percent Efficiency at VIN = 1.0, VOUT = 3.3V
Figure 6. Percent Efficiency at VIN = 2.5, VOUT = 3.3V
Figure 5. Percent Efficiency at VIN = 1.25, VOUT = 3.3V
Figure 7. Percent Efficiency at VIN = 3.3, VOUT = 3.3V
UNITRODE CORPORATION
7 CONTINENTAL BLVD. • MERRIMACK, NH 03054
TEL. (603) 424-2410 • FAX (603) 424-3460
8