Design Guide for LXT901/907 Ethernet Interface Connection to Motorola MC68EN360 Controller Application Note January 2001 Order Number: 249142-001 As of January 15, 2001, this document replaces the Level One document known as AN035. Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The LXT901/907 Ethernet Interface may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. Copyright © Intel Corporation, 2001 *Third-party brands and names are the property of their respective owners. Application Note Design Guide for LXT901/907 Ethernet Interface Contents 1.0 General Description .................................................................................................. 5 1.1 1.2 2.0 Features ................................................................................................................ 5 Applications ........................................................................................................... 5 LXT90x / QUICC Interface ....................................................................................... 7 2.1 2.2 2.3 Setting QUICC Parameters ................................................................................... 7 External Components............................................................................................ 8 2.2.1 Magnetics .................................................................................................8 Layout Guidelines.................................................................................................. 9 1 2 Typical LXT901/LXT907 Device and MC68EN360 QUICC Connection ............... 6 Typical Full-Duplex 10BASE-T Connection........................................................... 9 1 Pin Connections .................................................................................................... 7 Figures Tables Application Note 3 Design Guide for LXT901/907 Ethernet Interface 4 Application Note Design Guide for LXT901/907 Ethernet Interface 1.0 General Description This application note describes a method for connecting the LXT901 or LXT907 Ethernet Interface Adapter to the Motorola MC68EN360 Quad Integrated Communications Controller (QUICC) with Ethernet capability. The QUICC/LXT901 combination makes designing routers, bridges, print servers and other, similar products simple and fast. The LXT901 and LXT907 devices have advanced features that make design and fabrication faster and cheaper than typical competitors’ products. These two devices meet all of the Motorola QUICC design requirements with minimal external circuitry needed to use the MC68EN360 features. Either of these devices gives the lowest cost, highest performance possible with the Motorola QUICC. 1.1 Features • Glueless interface to the MC68EN360 QUICC controller in 10 Mbps Ethernet/IEEE 802.3 LAN with either twisted- pair connection or AUI transceiver • • • • 1.2 Integrated filters make design faster, fabrication cheaper Integrated LED drivers for operation monitoring Supports full duplex operation Automatic port selection makes choosing between the twisted-pair and AUI options seamless Applications This application note addresses the Ethernet LAN side of the circuit only. Intel also offers a complete line of T1/E1 and XDSL transceivers for WAN connections. Application Note 5 Design Guide for LXT901/907 Ethernet Interface Figure 1. Typical LXT901/LXT907 Device and MC68EN360 QUICC Connection SCCI PROGRAMMIG OPTIONS CLK[1:4] CLK[1:4] TxD RxD RTS CD CTS Parallel I/O LINE STATUS 330 330 CLKI RCLK TCLK TXD RXD TEN CD COL LBK PAUL AUTOSEL NTH STP/DSQE LI MD0 MD1 RJAB RLD RCMPT JAB PLR REMOTE STATUS 330 330 Green Red Red Red 20 MHz LEDL RJ45 1 1 : 1 16 TPIN W 50 W 6 50 TPIP TPONB TPONA LEDC/FDE LEDR LEDT/PDN 0.1 µF 20 pF CLKO LXT901 or LXT907 20 pF MC68EN360 75 W 1% W 1%W 1% 3 14 NOTE: LXT901/907 pin-out varies with IC package design. See Table 1. 5 4 6 1: 2 11 37.5 3 To 10 BASE-T TWISTED-PAIR NETWORK 2 37.5 TPOPA TPOPB 8 W 1% 78 W1 1 D - CONNECTOR to AUI DROP CABLE 75 CIN 9 16 1 9 2 10 CIP 78 DON 2 15 W4 13 3 11 4 12 5 0.1 µF DOP 78 DIN 5 12 W7 10 TEST 13 6 14 7 15 8 DIP +5 V 8 9 W 1% Fuse 12.4 k VCC1 RBIAS + 12 V VCC2 GND1 GND2 Chassis Gnd 0.1 µF 6 Application Note Design Guide for LXT901/907 Ethernet Interface 2.0 LXT90x / QUICC Interface The LXT901 is available in either a 44-pin PLCC or a 64-pin TQFP package. The LXT907 is available in a 44-pin PLCC package. The PLCC package is pin compatible for both devices except for pin 37. This pin is STP (unshielded/shielded twisted-pair select) on the LXT901 and DSQE (Disable SQE) on the LXT907 device. The following pins on the LXT901 or LXT907 device connect to the MC68EN360 SCC1 signals as shown in Table 1. Table 1. Pin Connections LXT901/LXT907 Device PLCC Pin TQFP Pin Signal Motorola QUICC MC68EN360 SCC1 Signal 28 47 RCLK CLK1-41 11 23 TCLK CLK1-41 12 24 TXD TXD 26 45 RXD RXD 13 25 TEN RTS2 27 46 CD CD2 16 28 COL CTS2 22 38 LBK 40 3 PAUI 17 29 AUTOSEL 4 13 NTH 37 (901) 59 STP 37 (907) n/a DSQE Connect these bits to the Parallel I/O bus on the QUICC3 and program as needed. 1. The design must provide separate clocks for TCLK and RCLK. Any of the clocks on the QUICC will do. 2. These signals are active high in this application. 3. Please check the Motorola specification for the connections needed for the desired result. 2.1 Setting QUICC Parameters Refer to the Motorola MC68360 Quad Integrated Communications Controller User’s Manual for the QUICC function settings. The following considerations should be reviewed for an optimized design: • Bypass both the Digital Phase-Locked Loop (DPLL) and Manchester Encoding/Decoding function for Ethernet operation. • The TCI (Time Clock Invert) bit must be High to allow the QUICC to clock the data out to the LXT901 or LXT907 device on the rising edge of the clock pulse. This improves data setup time at the 10 Mbps speed used by Ethernet. TCI is bit 28 of the General SCC Mode Register (GSMR). Application Note 7 Design Guide for LXT901/907 Ethernet Interface • The MODE bits (0:3) must be set to 1, 1, 0, 0 respectively. The Transparent Receiver (TRX) and Transparent Transmitter bits (TTX), bits 43 and 44, must both be 0 (normal operation) or 1 (transparent operation). Do not mix TRX and TTX values. The 0 setting is recommended; in transparent mode, the QUICC does not manipulate protocols in the data stream. • The Transmit FIFO Length (TFL) bit should be 0. TFL is bit 38 in the GSMR. The Receive FIFO Width (RFW) bit, bit 37, should also be 0. • GSMR bits 19 and 20 are the Transmit Preamble Pattern (TPP) bits. For Ethernet operation, set them to 0, 1 to transmit a repeating 10 pattern as a preamble. • Figure 2 shows a typical set up for a full-duplex 10BASE-T LAN connection, using the LXT907 device. This application requires only the TP transformer, two 18 pF capacitors, two 330 Ω resistors, two 24.9 Ω 1% resistors, one 12.4 kΩ 1% resistor, and a green LED. The 20 MHz clock signal is common in all 10BASE-T applications, so no crystal is required. All QUICC parameters remain the same. • This completes the Ethernet/IEEE 802.3 LAN side of the circuit setup. There are other steps in designing a working circuit that go beyond the scope of this application note. 2.2 External Components The application on page 1 requires two DIP transformer packages for isolation and impedance matching on the AUI or twisted-pair transmit and receive lines. Additional components for the connection include: • • • • • • • • • • • 2.2.1 20 MHz crystal (one each, or external 20 MHz clock) 300 Ω, 1% resistor (four each) 50 Ω, 1% resistor (two each) 75 Ω, 1% resistor (two each) 78 Ω, 1% resistor (three each) 37.5 Ω, 1% resistor (two each) 12.4 kΩ, 1% resistor (one each) 0.1 µF capacitor (three each) 20 pF capacitor (two each, required with Xtal only) Red LED (three each, optional) Green LED (one each, optional) Magnetics Refer to Application Note 73, Magnetic Manufacturers for Networking Product Applications, for a list of magnetic manufacturers and part numbers. The latest version is located on the Intel web site, developer.intel.com/design/network/. This listing constitutes a reference only, and is not a recommendation. It is the responsibility of the system designer to ensure that all components, both individually and collectively, are suitable for the intended application. 8 Application Note Design Guide for LXT901/907 Ethernet Interface 2.3 Layout Guidelines Fabricate the circuit as shown in the diagram on page 1. Isolate the bias circuit at RBIAS and locate the resistor as close as possible to the pin. If this resistor is not positioned properly it may act as an antenna and cause erratic performance. Keep it away from other components or signal traces, and do not run any signals under the resistor. Be sure to use a bypass capacitor at each Vcc pin. Figure 2. Typical Full-Duplex 10BASE-T Connection 20 MHz CLK[1:4] CLK[1:4] RCLK TCLK TXD RXD TEN CD COL LBK DSQE TxD RxD SCCI RTS CD CTS CLKI RJ45 CLKO 1 TPIN TPIP TPONA 6 330 Ω NTH 1: 2 11 24.9 Ω 1% 4 3 2 24.9 Ω 1% LXT907 +5 V PAUL AUTOSEL MD0 MD1 14 3 TPOPA 6 5 TPONB LEDC/FDE +5 V 16 100 Ω Parallel I/O 330 Ω 1:1 8 9 To 10 BASE-T TWISTEDPAIR NETWORK MC68EN360 1 TPOPB Green LEDL 12.4 kΩ 1% LI +5 V RBIAS VCC1 VCC2 GND1 GND2 0.1 µF Application Note 9 Design Guide for LXT901/907 Ethernet Interface 10 Application Note