WED8L24514V Asynchronous SRAM, 3.3V, 512Kx24 FEATURES DESCRIPTION 512Kx24 bit CMOS Static The WED8L24514VxxBC is a 3.3V, twelve megabit SRAM constructed with three 512Kx8 die mounted on a multi-layer laminate substrate. With 10 to 15ns access times, x24 width and a 3.3V operating voltage, the WED8L24514V is ideal for creating a single chip memory solution for the Motorola DSP5630x or a two chip solution for the Analog Devices SHARCTM DSP. Random Access Memory Array • Fast Access Times: 10, 12, and 15ns • Master Output Enable and Write Control • Three Chip Enables for Byte Control • TTL Compatible Inputs and Outputs The single or dual chip memory solutions offer improved system performance by reducing the length of board traces and the number of board connections compared to using multiple monolithic devices. • Fully Static, No Clocks Surface Mount Package • 119 Lead BGA (JEDEC MO-163), No. 391 • Small Footprint, 14mmx22mm The JEDEC Standard 119 lead BGA provides a 61% space savings over using three 512Kx8, 400 mil wide SOJs and the BGA package has a maximum height of 110 mils compared to 148 mils for the SOJ packages. • Multiple Ground Pins for Maximum Noise Immunity Single +3.3V (±5%) Supply Operation DSP Memory Solution • Motorola DSP5630x • Analog Devices SHARCTM FIG. 1 PIN CONFIGURATION PIN SYMBOLS 1 A B C D E F G H J K L M N P R T U May 2000 Rev. 1 ECO #12800 NC NC I/012 I/013 I/014 I/015 I/016 I/017 NC I/018 I/019 I/020 I/021 I/022 I/023 NC NC 2 AO A5 NC VCC GND VCC GND VCC GND VCC GND VCC GND VCC A18 A9 A13 3 A1 A6 E2 GND VCC GND VCC GND VCC GND VCC GND VCC GND NC A10 A14 4 A2 E0 NC GND GND GND GND GND GND GND GND GND GND GND NC W G PIN NAMES 5 A3 A7 E3 GND VCC GND VCC GND VCC GND VCC GND VCC GND NC A11 A15 6 A4 A8 NC VCC GND VCC GND VCC GND VCC GND VCC GND VCC A17 A12 A16 A0-18 7 NC NC I/00 I/01 I/02 I/03 I/04 I/05 NC I/06 I/07 I/08 I/09 I/010 I/011 NC NC 1 Address Inputs E Chip Enable W Master Write Enable G Master Output Enable DQ0-23 Common Data Input/Output VCC Power (3.3V ±5%) GND Ground NC No Connection BLOCK DIAGRAM A0-A18 G W E0 E2 E3 19 512K x 24 Memory Array DQ0-7 DQ8-15 DQ16-23 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com WED8L24514V ABSOLUTE MAXIMUM RATINGS Voltage on any pin relative to VSS Operating Temperature TA (Ambient) Commercial Industrial Storage Temperature Power Dissipation Output Current. RECOMMENDED DC OPERATING CONDITIONS -0.5V to 4.6V Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage 0°C to + 70°C -40°C to +85°C -55°C to +125°C 1.5 Watts 50 mA Sym VCC VSS VIH VIL Min 3.135 0 2.2 -0.3 FIG. 2 *Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Typ Max Units 3.3 3.465 V 0 0 V -- VCC+0.3 V -0.8 V FIG. 3 VCC 319Ω Z0 Z0==50Ω 50Ω Q 65 pF RL = 50Ω DOUT AC TEST CONDITIONS 5 pF 353Ω VL = 1.5V Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels Output Load VSS to 3.0V 5ns 1.5V Figure 2 NOTE: For tEHQZ, tGHQZ and tWLQZ see Figure 3. DC ELECTRICAL CHARACTERISTICS Parameter Sym Conditions Max Units 10ns 12-15ns Operating Power Supply Current ICC1 W= VIL, II/O = 0mA, Min Cycle 450 350 mA Standby (TTL) Supply Current ICC2 E > VIH, VIN < VIL or VIN > VIH, f=ØMHz 150 150 mA Full Standby CMOS Supply Current ICC3 90 90 mA Input Leakage Current Output Leakage Current Output High Volltage Output Low Voltage ILI ILO VOH VOL E > VCC-0.2V VIN > VCC-0.2V or VIN < 0.2V VIN = 0V to VCC V I/O = 0V to VCC IOH = -4.0mA IOL = 4.0mA ±10 ±10 ±10 ±10 0.4 0.4 µA µA V V TRUTH TABLE G X H L L L L X X X X Min E0 H L L L H H L L H H E2 H L L H L H L H L H E3 H L L H H L L H H L W X H H H H H L L L L Mode Standby Output Deselect Read (24 bit) Read Read Read Write (24 bit) Write Write Write Output High Z High Z DOUT DQ0-7 DQ8-15 DQ16-23 DIN DQ0-7 DQ8-15 DQ16-23 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com Power ICC2,ICC3 ICC1 ICC1 ICC1 ICC1 ICC1 ICC1 ICC1 ICC1 ICC1 2 2.4 CAPACITANCE (f=1.0MHz, VIN=VCC or VSS) Parameter Address Lines Data Lines Write & Output Enable Lines Chip Enable Lines Sym CA CD/Q W, G EØ, E2, E3 Max 8 10 8 8 Unit pF pF pF pF These parameters are sampled, not 100% tested. May 2000 Rev. 1 WED8L24514V AC CHARACTERISTICS READ CYCLE Symbol JEDEC Alt. Parameter tRC 10ns Min Max 12ns Min Max 15ns Min Max 10 12 15 Read Cycle Time tAVAV Address Access Time tAVQV tAA 10 12 15 Chip Enable Access Time tELQV tACS 10 12 15 Chip Enable to Output in Low Z (1) tELQX tCLZ Chip Disable to Output in High Z (1) tEHQZ tCHZ Output Hold from Address Change tAVQX tOH Output Enable to Output Valid tGLQV tOE Output Enable to Output in Low Z (1) tGLQX tOLZ Output Disable to Output in High Z(1) tGHQZ tOHZ 3 3 5 3 6 0 5 0 6 ns ns ns 7 0 ns ns 7 3 5 ns 3 6 3 Units ns ns 7 ns NOTE 1: Parameter is guaranteed, but not tested. FIG. 4 READ CYCLE 1 - W HIGH, G, E LOW tAVAV A ADDRESS 1 ADDRESS 2 tAVQV tAVQX Q FIG. 5 DATA 1 DATA 2 READ CYCLE 2 - W HIGH tAVAV A tAVQV E tEHQZ tELQV tELQX G tGLQV tGHQZ tGLQX Q May 2000 Rev. 1 3 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com WED8L24514V AC CHARACTERISTICS WRITE CYCLE Parameter Write Cycle Time Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Data Hold Time Write to Output in High Z (1) Data to Write Time Output Active from End of Write (1) Symbol JEDEC Alt. tAVAV tWC tELWH tCW tELEH tCW tAVWL tAS tAVEL tAS tAVWH tAW tAVEH tAW tWLWH tWP tWLEH tWP tWHAX tWR tEHAX tWR tDH tWHDX tEHDX tDH tWLQZ tWHZ tDVWH tDW tDVEH tDW tWHQX tWLZ Min 10 8 8 0 0 8 8 8 8 0 0 0 0 0 5 5 3 10ns Max 5 12ns Min Max 12 9 9 0 0 9 9 10 10 0 0 0 0 0 6 6 6 3 15ns Min Max 15 9 9 0 0 10 10 11 11 0 0 0 0 0 7 7 7 3 Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns NOTE 1: Parameter is guaranteed, but not tested. FIG. 6 WRITE CYCLE 1 - W CONTROLLED tAVAV A tAVWH tELWH tWHAX E tAVWL tWLWH W tDVWH D DATA VALID tWLQZ tWHQX HIGH Z Q White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com tWHDX 4 May 2000 Rev. 1 WED8L24514V FIG. 7 WRITE CYCLE 2 - E CONTROLLED tAVAV A tAVEH tELEH tEHAX E tAVEL tWLEH W tDVEH D tEHDX DATA VALID HIGH Z Q ORDERING INFORMATION Commercial (0°C to +70°C) Industrial (-40°C to +85°C) Part Number Speed (ns) 10 12 15 WED8L24514V10BC WED8L24514V12BC WED8L24514V15BC PACKAGE NO. 391 119 LEAD BGA JEDEC MO-163 Part Number Package No. 391 391 391 7.62 (0.300) TYP WED8L24514V12BI WED8L24514V15BI Speed (ns) 12 15 0.110 MAX 14.00 (0.551) TYP Package No. 391 391 R 1.52 (0.062) MAX (4x) A B A1 CORNER C D E F 1.27 (0.050) TYP G H 20.32 (0.800) TYP 22.00 (0.866) TYP J K L M N P R T U 0.711 (0.028) MAX 1.27 (0.050) TYP ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES May 2000 Rev. 1 5 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com