ETC EDI9F416512C-BN

EDI9F416512C
White Electronic Designs
4x512Kx16 Static RAM CMOS, Module
FEATURES
DESCRIPTION
n
4x512Kx16 bit CMOS Static
n
Random Access Memory
n
•
Access Times 70 thru 100ns
•
Data Retention Function (EDI9F416512LP )
•
TTL Compatible Inputs and Outputs
•
Fully Static, No Clocks
A low power version with data
(EDI9F416512LP) is also available.
retention
All inputs and outputs are TTL compatible and operate
from a single +5V supply. Fully asynchronous, the
EDI9F416512C requires no clocks or refreshing for
operation.
High Density Packaging
•
n
The EDI9F416512C is a 32Mb CMOS Static RAM based
on eight 512Kx8 Static RAMs mounted on a multi-layered epoxy laminate (FR-4) substrate.
80 Pin SIMM, No. 372
Single +5V (±10%) Supply Operation
FIG. 1:
PIN CONFIGURATIONS AND BLOCK DIAGRAM
Vss
Vcc
NC
G
WH
WL
NC
E
1
2
3
4
5
6
7
8
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
E3
E2
E1
E0
Vss
NC
NC
NC
NC
NC
NC
NC
NC
A18
A17
A16
A15
A14
A13
A12
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
October 2001 Rev. 2
ECO #14609
PIN NAMES
A11
A10
A9
A8
A7
A6
A5
A4
41
42
43
44
45
46
47
48
AØ-A18
Address Inputs
EØ-E3
Chip Enable
G
Output Enables
A3
A2
A1
A0
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
Vss
Vss
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQØ
NC
Vcc
NC
Vss
NC
Vss
Vss
NC
NC
Vss
WH-WL
Write Enables
E
Chip Select
DQØ-DQ15
Data Input/Output
VCC
Supply 5 Volts
VSS
Ground
NC
No Connect
AØ-A18
E
G
WH
WL
128K
x8
128K
x8
128K
x8
128K
x8
128K
x8
128K
x8
128K
x8
128K
x8
EØ
E1
E2
E3
1
DQ8-DQ15
DQØ-DQ7
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com
EDI9F416512C
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS*
Voltage on any pin relative to VSS
Operating Temperature TA (Ambient)
Commercial
Industrial
Storage Temperature
Plastic
Power Dissipation
Output Current
RECOMMENDED DC OPERATING CONDITIONS
-0.5V to 7.0V
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
0°C to +70°C
-40°C to +85°C
-55°C to +125°C
1 Watt
20 mA
*Stress greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these
or any other conditions greater than those indicated in the
operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may
affect reliability.
Sym
VCC
VSS
VIH
VIL
Min
4.5
0
2.2
-0.3
Typ
5.0
0
–
–
Max
5.5
0
6.0
0.8
Units
V
V
V
V
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
70ns
85-120ns
VSS to 3.0V
5ns
1.5V
1TTL = 30pF
1TTL, CL =100pF
(NOTE: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)
DC ELECTRICAL CHARACTERISTICS
Parameter
Operating Power
Supply Current
Standby (TTL) Power
Supply Current
Full Standby Power
Supply Current
CMOS
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Sym
ICC1
ICC2
ICC3
ILI
ILO
VOH
VOL
Conditions
W, E = VIL, II/O = 0mA,
Min Cycle
E ³ VIH, VIN £ VIL
VIN ³ VIH
E ³ VCC-0.2V
VIN ³ VCC-0.2V or
VIN £ 0.2V
VIN = 0V to VCC
V I/O = 0V to VCC
IOH = -1.0mA
IOL = 2.1mA
E
H
L
L
L
W
X
H
H
L
Mode
Standby
Output Deselect
Read
Write
Output
High Z
High Z
DOUT
DIN
Typ
100
Max
158
Units
mA
–
5
35
mA
25
150
mA
µA
±10
±10
–
0.4
µA
µA
V
V
–
–
–
–
2.4
–
–
–
–
–
CAPACITANCE
TRUTH TABLE
G
X
H
L
X
C
LP
Min
–
(F=1.0MHZ, VIN=VCC OR VSS)
Parameter
Address Lines
Data Lines
Chip Enable Line
Write and Output Enable Lines
Power
ICC2, ICC3
ICC1
ICC1
ICC1
White Electronic Designs Corporation • Westborough MA • (508) 366-5151
2
Sym
CI
CD/Q
CC
CW
Max
60
50
25
60
Unit
pF
pF
pF
pF
EDI9F416512C
White Electronic Designs
AC CHARACTERISTICS READ CYCLE
Symbol
JEDEC
Alt.
Parameter
70ns
Min
Max
TAVAV
TRC
Address Access Time
TAVQV
TAA
70
85
100
Chip Enable Access Time
TELQV
TACS
70
85
100
Chip Enable to Output in Low Z (1)
TELQX
TCLZ
Chip Disable to Output in High Z (1)
TEHQZ
TCHZ
Output Hold from Address Change
TAVQX
TOH
Output Enable to Output Valid
TGLQV
TOE
TGLQX
TOLZ
Output Disable to Output in High Z(1)
TGHQZ
TOHZ
FIG. 2
85
100ns
Min
Max
Read Cycle Time
Output Enable to Output in Low Z (1)
70
85ns
Min
Max
5
100
5
30
3
35
40
0
0
ns
40
ns
50
ns
ns
0
35
ns
ns
3
45
30
ns
5
3
Units
ns
40
ns
READ CYCLE 1 - W HIGH, G, E LOW
TAVAV
A
ADDRESS 1
ADDRESS 2
TAVQV
TAVQX
Q
DATA 1
DATA 2
9F416128C Rd Cyc1
FIG. 3 READ CYCLE 2 - W HIGH
TAVAV
A
TAVQV
E
TELQV
TEHQZ
TELQX
G
TGLQV
TGHQZ
TGLQX
Q
9F416128C Rd Cyc2
3
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com
EDI9F416512C
White Electronic Designs
AC CHARACTERISTICS WRITE CYCLE
Parameter
Write Cycle Time
Chip Enable to End of Write
Address Setup Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
Data Hold Time
Write to Output in High Z (1)
Data to Write Time
Output Active from End of Write (1)
Symbol
JEDEC
TAVAV
TELWH
TELEH
TAVWL
TAVEL
TAVWH
TAVEH
TWLWH
TWLEH
TWHAX
TEHAX
TWHDX
TEHDX
TWLQZ
TDVWH
TDVEH
TWHQX
70ns
Min
70
65
65
0
0
65
65
65
65
0
0
0
0
0
30
30
5
Alt.
TWC
TCW
TCW
TAS
TAS
TAW
TAW
TWP
TWP
TWR
TWR
TDH
TDH
TWHZ
TDW
TDW
TWLZ
Max
30
85ns
Min
85
70
70
0
0
70
70
70
70
0
0
0
0
0
35
35
5
Max
35
100ns
Min
100
80
80
0
0
80
80
80
80
0
0
0
0
0
40
40
5
Note 1: Parameter guaranteed, but not tested. *Advance Information
FIG. 4 WRITE CYCLE 1 - W CONTROLLED
TAVAV
A
E
TELWH
TWHAX
TAVWH
TWLWH
W
TAVWL
TDVWH
D
TWHDX
DATA VALID
TWHQX
TWLQZ
HIGH Z
Q
9F416128C Write Cyc1
White Electronic Designs Corporation • Westborough MA • (508) 366-5151
4
Max
40
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
EDI9F416512C
White Electronic Designs
FIG. 5 WRITE CYCLE 2 - E CONTROLLED
TAVAV
A
TAVEL
TELEH
E
TAVEH
TEHAX
TWLEH
W
TDVEH
D
TEHDX
DATA VALID
HIGH Z
Q
9F416128C Write Cyc2
DATA RETENTION CHARACTERISTICS
Characteristic
Data Retention Voltage
Data Retention Quiescent Current
Sym
VDD
ICCDR
Chip Disable to Data Retention Time(1)
Operation Recovery Time (1)
TCDR
TR
Test Conditions
VDD = 0.2V
E ž VDD -0.2V
VIN ž VDD -0.2V
or VIN ­ 0.2V
VDD
Min
2
Typ
–
Max
3V
–
0
5
8
–
–
100
–
–
Unit
V
µA
µA
ns
ms
FIG. 6 DATA RETENTION - E CONTROLLED
DATA RETENTION MODE
4.5V
VCC
4.5V
VDD
TCDR
E
TR
E ≥ VDD-0.2V
9F416128C Data Retent.
5
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com
White Electronic Designs
EDI9F416512C
ORDERING INFORMATION
Part Number
Standard Power
EDI9F416512C70BNC
EDI9F416512C85BNC
EDI9F416512C100BNC
Low Power
EDI9F416512LP70BNC
EDI9F416512LP85BNC
EDI9F416512LP100BNC
Speed
(ns)
Package
No.
70
85
100
372
372
372
70
85
100
372
372
372
NOTE: To order an Industrial grade product substitute the letter C in
the Suffix with the letter I, eg. EDI9F416512C70BNC becomes
EDI9F416512C70BNI.
PACKAGE DESCRIPTION
PACKAGE NO. 372: 80 LEAD SIMM ANGLED
4.655 MAX. (NOTE 2)
4.384
.250
P1
.725
.400 MAX.
179 REV #
NOTE 3
.170
MAX.
.125 DIA (2x)
.250
.050 TYP.
.225
MIN.
4.150
2.192
2.245
.062 R
.050
+.004
-.003
NOTES:
1. U1-U8 = SRAM
2. Maximum dimension to be measured without including the breakaway area.
3. The revision level on both the substrate and the bill of materials should match.
White Electronic Designs Corporation • Westborough MA • (508) 366-5151
6