MICROCIRCUIT DATA SHEET Original Creation Date: 02/10/99 Last Update Date: 09/08/99 Last Major Revision Date: MNCLC406A-X REV 0A0 WIDEBAND, LOW POWER MONOLITHIC OP AMP General Description The CLC406 is a wideband monolithic operational amplifier designed for low-gain applications where power and cost are of primary concern. Operating from +5V supplies, the CLC406 consumes only 50mW of power yet maintains a 160MHz small signal bandwidth and a 1500V/us slew rate. Benefitting from Comlinear's current feedback architecture, the CLC406 offers a gain range of + 1 to + 10 while providing stable, oscillation free operation without external compensation, even at unity gain. With its exceptional differential gain and phase, typically 0.02% and 0.02 degrees at 3.58MHz, the CLC406 is designed to meet the performance and cost requirements of high volume composite video applications. The CLC406's large signal bandwidth, high slew rate and high drive capability are features well suited for RGB video applications. Providing a 12ns settling time to 0.05% (1/2 LSB in 10-bit systems) and -68/-75dBc 2nd/3rd harmonic distortion (2Vpp at 10MHz, Rl = 1kOhms), the CLC406 is an excellent choice as a buffer or driver for high speed A/D and D/A converter systems. Commercial remote sensing applications and battery powered radio transceivers requiring a high performance, low power amplifier will find the CLC406 to be an attractive, cost-effective solution. Industry Part Number NS Part Numbers CLC406A CLC406AJ-QML Prime Die UB1373C Controlling Document 5962-9200401MPA Processing Subgrp Description 1 2 3 4 5 6 7 8A 8B 9 10 11 MIL-STD-883, Method 5004 Quality Conformance Inspection MIL-STD-883, Method 5005 1 Static tests at Static tests at Static tests at Dynamic tests at Dynamic tests at Dynamic tests at Functional tests at Functional tests at Functional tests at Switching tests at Switching tests at Switching tests at Temp ( oC) +25 +125 -55 +25 +125 -55 +25 +125 -55 +25 +125 -55 MICROCIRCUIT DATA SHEET MNCLC406A-X REV 0A0 Features - 160MHz small signal bandwidth 50mW power (+5V supplies) 0.02%/0.02degrees differential gain/phase 12ns settling to 0.05% 1500V/us slew rate 2.2ns rise and fall time (2Vpp) 70mA output current Applications - Video distribution amp HDTV amplifier Flash A/D driver D/A transimpedance buffer Pulse amplifier Photodiode amp LAN amplifier 2 MICROCIRCUIT DATA SHEET MNCLC406A-X REV 0A0 (Absolute Maximum Ratings) Supply voltage (Vcc) (Note 1) +7 V dc Output current (Io) +70 mA Common mode input voltage (Vcm) +Vcc Differential input voltage +10 V dc Maximum Power Dissipation (Pd) (Note 2) 1.2W Lead Temperature (soldering, 10 seconds) +300C Junction temperature (Tj) +175C Storage temperature range -65C to +150C Thermal Resistance Junction -to-ambient (ThetaJA) Ceramic DIP (Still Air) (500 LFPM) Junction -to-case (ThetaJC) Ceramic DIP Package Weight (typical) Ceramic DIP ESD Tolerance ESD Rating (Note 3) Note 1: Note 2: Note 3: TBD TBD TBD TBD 2000V Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA) / ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. Human body model, 100 pF discharged through 1.5K Ohms. Recommended Operating Conditions Supply voltage (Vcc) +5 V dc Gain Range +1 to +10 Ambient Operating Temperature Range (Ta) -55C to +125C 3 MICROCIRCUIT DATA SHEET MNCLC406A-X REV 0A0 Electrical Characteristics AC/DC PARAMETERS (The following conditions apply to all the following parameters, unless otherwise specified.) DC: Rl = 100 Ohms, Vcc = +5 V dc, Av = +6, Rf (feedback resistor) = 500 Ohms, Rg (gain resistor) = 100 Ohms, -55C < Ta < +125C (note 3) SYMBOL Ibn DIBN Ibi DIBI Vio PARAMETER Input bias current, average temperature coefficient, noninverting Input bias currrent, average temperature coefficient, inverting Supply current no load -Io +Vo -Vo Power supply rejection ratio Output current Output current Output voltage range Output voltage range 4 MAX UNIT SUBGROUPS uA 1, 2 -24 24 uA 3 1 -50 50 nA/C 2 1 -125 125 nA/C 3 -15 15 uA 1 -20 20 uA 2 -23 23 uA 3 1 -50 50 nA/C 2 1 -100 100 nA/C 3 -6 6 mV 1 -12 12 mV 2 -10 10 mV 3 -60 60 uV/C 2, 3 6.0 mA 1, 2 6.4 mA 3 1 -Vcc = -4.5 V to -5.0 V, +Vcc = +4.5 V to +5.0 V MIN 12 Input offset voltage Icc PINNAME -12 Input bias current, inverting Input offset voltage, average temperature coefficient +Io NOTES Input bias current, noninverting DVIO PSRR CONDITIONS 2 46 dB 1, 3 2 44 dB 2 1 45 mA 1, 2 1 25 mA 3 1 -45 mA 1, 2 1 -25 mA 3 2.7 V 1, 2 2.0 V 3 -2.7 V 1, 2 -2.5 V 3 MICROCIRCUIT DATA SHEET MNCLC406A-X REV 0A0 Electrical Characteristics AC/DC PARAMETERS(Continued) (The following conditions apply to all the following parameters, unless otherwise specified.) DC: Rl = 100 Ohms, Vcc = +5 V dc, Av = +6, Rf (feedback resistor) = 500 Ohms, Rg (gain resistor) = 100 Ohms, -55C < Ta < +125C (note 3) SYMBOL Rin CMRR SSBW LSBW GFPL PARAMETER CONDITIONS NOTES Noninverting input resistance Common mode rejection ratio Small signal bandwidth Large signal bandwidth Gain flatness peaking 1 Vcm = +1.0 V -3 dB bandwidth, Vout < 5 Vpp . Gain flatness peaking LPD Gain flatness rolloff 300 1 45 Ohms dB 4, 6 1 43 dB 5 110 MHz 4 2 90 MHz 5 2 110 MHz 6 1 95 MHz 4, 6 1 80 MHz 5 0.2 dB 4 0.2 dB 5, 6 0.5 dB 4 0.5 dB 5, 6 1 dB 4 2 1.3 dB 5 2 1 dB 6 1 0.8 Deg 4, 6 1 1.2 Deg 5 Vout < 2 Vpp Linear phase deviation 0.1 MHz to 50 MHz, Vout < 2 Vpp 0.1 MHz to 75 MHz SUBGROUPS 1 2 GFR UNIT Ohms k 3 0.1 MHz to 25 MHz , Vout < 2 Vpp > 25MHz, MAX k 2 GFPH MIN 500 Vout < 2 Vpp . -3 dB bandwidth, PINNAME 1, 2 DG Differential gain Rl = 150 Ohms, 3.58 MHz, 4.43 MHz, Av = +2 1 0.04 % 4, 5, 6 DP1 Differential phase Rl = 150 Ohms, 3.58 MHz, Av = +2 1 0.04 Deg 4, 6 1 0.08 Deg 5 1 0.05 Deg 4, 6 1 0.10 Deg 5 -42 dBc 4 2 -38 dBc 5 2 -42 dBc 6 1 -62 dBc 4, 6 1 -60 dBc 5 DP2 HD2 HD2L Differential phase 2nd harmonic distortion 2nd harmonic distortion Rl = 150 Ohms, 4.43 MHz, Av = +2 2 Vpp at 20 MHz 2 Vpp at 10 MHz, Rl = 1 kOhms 5 MICROCIRCUIT DATA SHEET MNCLC406A-X REV 0A0 Electrical Characteristics AC/DC PARAMETERS(Continued) (The following conditions apply to all the following parameters, unless otherwise specified.) DC: Rl = 100 Ohms, Vcc = +5 V dc, Av = +6, Rf (feedback resistor) = 500 Ohms, Rg (gain resistor) = 100 Ohms, -55C < Ta < +125C (note 3) SYMBOL HD3 HD3L Trs Trl Ts PARAMETER 3rd harmonic distortion 3rd harmonic distortion Rise and fall time Rise and fall time Settling time CONDITIONS NOTES 2 Vpp at 10 MHz, Rl = 1 kOhms 2 V step, Cl < 10 pf, measured between 10% and 90% points 4 V step, Cl < 10 pF, measured between 10% and 90% points Cl < 10 pF, final value 2 V step at 0.05% of the Overshoot 2 V step, SR Slew Rate Vout = 4 V step, measured at +1 V, C1 < 10 pF ICN NCN SNF INV Equivalent input noise, noninverting voltage > 1 MHz Equivalent input noise, inverting current > 1 MHz Equivalent input noise, noninverting current > 1 MHz Equivalent input noise, total noise floor > 1 MHz Equivalent input noise, total integrated noise Note 1: Note 2: MIN 2 Vpp at 20 MHz OS VN PINNAME Cl < 10 pF UNIT dBc 4 2 -42 dBc 5 2 -46 dBc 6 1 -70 dBc 4, 6 1 -65 dBc 5 1 3.0 ns 9, 11 1 3.9 ns 10 1 3.6 ns 9, 11 1 5.0 ns 10 1 18 ns 9, 11 1 20 ns 10 1 15 % 9, 10, 11 1 1200 V/us 4, 6 1 1000 V/us 5 3.4 nV/Sq 4, 6 1 3.8 RtHz nV/Sq 5 1 13.9 RtHz pA/Sq 4, 6 1 15.5 RtHz pA/Sq 5 1 2.6 RtHz pA/Sq 4, 6 1 3.0 RtHz pA/Sq 5 1 -156 RtHz dBm 4, 6 1 -155 (1Hz) dBm 5 1 38 (1Hz) uV 4, 6 1 42 uV Guaranteed, if not tested. This parameter is group A sample tested only and is excluded from final electrical testing, but is guaranteed to the limits specified. 6 SUBGROUPS -46 1 1 MHz to 100 MHz MAX 5 MICROCIRCUIT DATA SHEET MNCLC406A-X REV 0A0 (Continued) Note 3: The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this table. Negative current shall be defined as conventional current flow out of a device terminal. 7 MICROCIRCUIT DATA SHEET MNCLC406A-X REV 0A0 Graphics and Diagrams GRAPHICS# DESCRIPTION 07081HRA3 CERDIP (J), 8 LEAD (B/I CKT) J08ARL CERDIP (J), 8 LEAD (P/P DWG) P000418A CERDIP (J), 8 LEAD (PINOUT) See attached graphics following this page. 8 N/C 1 8 N/C VINV 2 7 +VCC VNON-INV 3 6 VOUT 4 5 N/C -VCC CLC406J 8 - LEAD DIP CONNECTION DIAGRAM TOP VIEW P000418A N MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050 MICROCIRCUIT DATA SHEET MNCLC406A-X REV 0A0 Revision History Rev ECN # 0A0 M0003524 09/08/99 Rel Date Originator Changes Rose Malone Initial MDS Release 9