a High Accuracy anyCAP™ Adjustable 200 mA Low Dropout Linear Regulator ADP3303A FEATURES High Accuracy Over Line and Load: ⴞ0.8% @ +25ⴗC, ⴞ1.4% Over Temperature Ultralow Dropout Voltage: 150 mV Typical @ 200 mA Requires Only CO = 1 F for Stability anyCAP = Stable with All Types of Capacitors (Including MLCC) Current and Thermal Limiting Low Noise Dropout Detector Low Shutdown Current: 1 A 3.2 V to 12 V Supply Range Adjustable 2.2 V to 10 V Output Range –20ⴗC to +85ⴗC Ambient Temperature Range Thermally Enhanced TSSOP-14 Package APPLICATIONS Cellular Telephones Notebook, Palmtop Computers Battery Powered Systems Portable Instruments Post Regulator for Switching Supplies Bar Code Scanners FUNCTIONAL BLOCK DIAGRAM ADP3303A Q1 IN THERMAL PROTECTION ERR OUT CC FB gm DRIVER Q2 SD BANDGAP REF GND ERR ADP3303A VIN IN EOUT R3 330kV VOUT = +5V OUT R1 C1 0.47mF FB SD C2 1mF GND R2 ON OFF SD Figure 1. Typical Application Circuit GENERAL DESCRIPTION The ADP3303A is a member of the ADP330x family of precision low dropout anyCAP voltage regulators. The ADP3303A stands out from conventional LDOs with a novel architecture, an enhanced process and a new package. Its patented design requires only a 1 µF output capacitor for stability. This device is insensitive to output capacitor ESR (Equivalent Series Resistance), and is stable with any good quality capacitor, including ceramic types (MLCC) for space restricted applications. The ADP3303A achieves exceptional accuracy of ± 0.8% at room temperature and ± 1.4% overall accuracy over temperature, line and load variations. The dropout voltage of the ADP3303A is only 150 mV (typical) at 200 mA. In addition to the new architecture and process, ADI’s new proprietary thermally enhanced package (Thermal Coastline) can handle 1 W of power dissipation without an external heat sink or large copper surface on the PC board. This keeps PC board real estate to a minimum and makes the ADP3303A very attractive for use in portable equipment. The ADP3303A operates over an input voltage range of 3.2 V to 12 V and delivers a load current in excess of 200 mA. The output voltage can be adjusted from 2.2 V to 10 V using an external resistor divider. It also features an error flag that signals when the device is about to lose regulation or when the short circuit or thermal overload protection is activated. Other features include shutdown and optional noise reduction capabilities. anyCAP is a trademark of Analog Devices Inc. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 (@ TA = –20ⴗC to +85ⴗC, VIN = 7 V, CIN = 0.47 F, COUT = 1 F, unless otherwise ADP3303A–SPECIFICATIONS noted) 1 Parameter 2, 3, 4 OUTPUT VOLTAGE ACCURACY Symbol Conditions Min VOUT VIN = Nom VOUT +0.5 V to +12 V IL = 1.0 mA to 200 mA TA = +25°C VIN = Nom VOUT +0.5 V to +12 V IL = 1.0 mA to 200 mA Typ Max Units –0.8 +0.8 % –1.4 +1.4 % ∆VO ∆VIN VIN = Nom VOUT +0.5 V to +12 V TA = +25°C 0.01 mV/V ∆VO ∆IL IL = 1.0 mA to 200 mA TA = +25°C 0.005 mV/mA 5 GROUND CURRENT IGND IL = 200 mA IL = 1.0 mA 2.0 0.35 4 0.6 mA mA GROUND CURRENT5 IN DROPOUT IGND VIN = 2.5 V, VOUT = 5.0 V IL = 1.0 mA 1.9 3.0 mA DROPOUT VOLTAGE VDROP VOUT ≤ 98% of VO Nominal IL = 200 mA IL = 10 mA IL = 1 mA 0.15 0.02 0.003 0.4 0.07 0.03 V V V 0.9 0.9 0.3 V V 1 22 µA µA LINE REGULATION LOAD REGULATION SHUTDOWN THRESHOLD VTHSD ON OFF 2.0 SHUTDOWN PIN INPUT CURRENT ISDIN 0 V < VSD ≤ 5 V 5 V ≤ VSD ≤ 12 V @ VIN = 12 V GROUND CURRENT IN5 SHUTDOWN MODE IQ VSD = 0, VIN = 12 V TA = +25°C VSD = 0 V, VIN = 12 V TA = +85°C 1 µA 5 µA IOSD TA = +25°C @ VIN = 12 V TA = +85°C @ VIN = 12 V 2.5 4 µA µA ERROR PIN OUTPUT LEAKAGE IEL VEO = 5 V 13 µA ERROR PIN OUTPUT “LOW” VOLTAGE VEOL ISINK = 400 µA 0.15 0.3 V PEAK LOAD CURRENT ILDPK VIN = Nom VOUT + 1 V 300 mA OUTPUT NOISE @ 5 V OUTPUT VNOISE f = 10 Hz–100 kHz CNR = 0 CNR = 10 nF, CL = 10 µF 100 30 µV rms µV rms OUTPUT CURRENT IN SHUTDOWN MODE NOTES 1 Ambient temperature of +85°C corresponds to a typical junction temperature of +125°C under typical full load test conditions. The formula for Nom V OUT is found in the Output Voltage Selection section. 2 Accuracy guaranteed using external trim pots. 3 For 2.7 V output, the minimum V IN is 3.2 V. 4 Guaranteed by design and characterization. 5 Ground currents include the current through R1, R2. Specifications subject to change without notice. –2– REV. A ADP3303A ABSOLUTE MAXIMUM RATINGS* PIN FUNCTION DESCRIPTIONS Input Supply Voltage . . . . . . . . . . . . . . . . . . . –0.3 V to +16 V Shutdown Input Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V Error Flag Output Voltage . . . . . . . . . . . . . . . –0.3 V to +16 V Noise Bypass Pin Voltage . . . . . . . . . . . . . . . . –0.3 V to +5 V Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited Operating Ambient Temperature Range . . . –55°C to +125°C Operation Junction Temperature Range . . . –55°C to +125°C θJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering 10 sec) . . . . . . . +300°C Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215°C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C *This is a stress rating only; operation beyond these limits can cause the device to be permanently damaged. Pin Mnemonic Function 1–3 4&5 NC OUT 6 FB 7 8 GND SD 9 ERR No Connect. Output of the Regulator. Bypass to ground with a 1 µF or larger capacitor. Pins 4 and 5 must be connected together for proper operation. Feedback. Connect to an external resistor divider that sets the output voltage. Ground. Active Low Shutdown Pin. Connect to ground to disable the regulator output. When shutdown is not used, this pin should be connected to the input pin. Open Collector Output that goes low to indicate that the output is about to go out of regulation. Regulator Input. Pins 10 and 11 must be connected together for proper operation. No Connect. Other Members of anyCAP Family 1 Model Output Current Package Options2 Comments ADP3300 ADP3301 ADP3302 ADP3307 ADP3308 ADP3309 50 mA 100 mA 100 mA 100 mA 50 mA 100 mA SOT-23-6 SO-8 SO-8 SOT-23-6 SOT-23-5 SOT-23-5 High Accuracy High Accuracy Dual Output High Accuracy High Accuracy High Accuracy 10 & 11 IN 12–14 NC NOTES 1 See individual data sheets for detailed ordering information. 2 SO = Small Outline, SOT = Surface Mount Outline. PIN CONFIGURATION NC NC NC OUT OUT FB GND ADP3303A TOP VIEW (Not to Scale) NC NC NC IN IN ERR SD NC = NO CONNECT ORDERING GUIDE Model Voltage Output Package Description Package Option ADP3303AARU-Reel ADJ Thin Shrink Small Outline Package (TSSOP) TSSOP-14 NOTES All devices operate over the ambient temperature range of –20°C to +85°C. Contact the factory for the availability of other output voltage options. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3303A features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. A –3– WARNING! ESD SENSITIVE DEVICE ADP3303A–Typical Performance Characteristics I L = 0mA 3.30025 3.30025 VIN = +7V VOUT = +3.3V VOUT = +3.3V 3.29975 IL = 100mA 3.29950 3.29925 I L = 200mA 3.29900 3.30000 3.29975 3.29950 3.29925 3.29850 3.5 4 5 6 7 8 9 10 11 12 13 14 15 16 INPUT VOLTAGE – Volts Figure 2. Line Regulation: Output Voltage vs. Supply Voltage 3.29875 0 20 40 1.2 0.8 0 0 60 80 100 120 140 160 180 200 OUTPUT LOAD – mA Figure 3. Output Voltage vs. Load Current 2000 1.6 0.4 3.29900 3.29875 VOUT = +3.3V I L = 0mA 2.0 GROUND CURRENT – mA 3.30000 OUTPUT VOLTAGE – Volts OUTPUT VOLTAGE – Volts I L = 10mA 2 4 6 8 10 12 INPUT VOLTAGE – Volts 0.2 3000 0.1 2500 VIN = +7V 1200 1000 IL = 0 TO 200mA 800 600 0.0 I L = 0mA –0.1 –0.2 \ –0.3 GROUND CURRENT – mA 1400 OUTPUT VOLTAGE – % GROUND CURRENT – mA 1600 I L = 200mA 2000 1500 I L = 100mA 1000 20 40 60 80 100 120 140 160 180 200 OUTPUT LOAD – mA Figure 5. Quiescent Current vs. Load Current –0.4 –45 –25 –5 140 120 100 80 60 40 20 0 20 40 60 80 100 120 140 160 180 200 OUTPUT LOAD – mA Figure 8. Dropout Voltage vs. Output Current 4 3 2 R L = 16.5V 1 0 15 35 55 75 95 TEMPERATURE – C 115 135 8.0 VOUT = +3.3V INPUT-OUTPUT VOLTAGE – Volts 160 –5 Figure 7. Quiescent Current vs. Temperature 5 INPUT-OUTPUT VOLTAGE – Volts INPUT-OUTPUT VOLTAGE – mV 0 –25 15 35 55 75 95 115 135 TEMPERATURE – C Figure 6. Output Voltage Variation % vs. Temperature 180 IL = 0mA 500 400 0 16 Figure 4. Quiescent Current vs. Supply Voltage 1800 200 0 14 0 1 2 4 3 2 3 INPUT VOLTAGE – Volts 1 0 Figure 9. Power-Up/Power-Down –4– VIN 7.0 6.0 5.0 4.0 VOUT 3.0 VSD = VIN OR +3V CL = 1mF RL = 16.5V VOUT = +3.3V 2.0 1.0 0 0 20 40 60 80 100 120 140 160 180 200 TIME – ms Figure 10. Power-Up Transient REV. A ADP3303A 5.02 3.310 5.02 VOUT = +5V 5.01 5.00 5.00 4.99 25V, 1mF LOAD Volts 4.98 5kV, 1mF LOAD 3.295 3.290 VIN 7.5 7.0 20 40 60 80 100 120 140 160 180 200 TIME – ms Figure 11. Line Transient Response I (VOUT) 200 10 7.0 0 CL = 1mF 4.98 VIN 7.5 VOUT 3.300 mA Volts 3.305 Volts 5.01 4.99 VOUT = +3.3V VOUT = +5V 0 0 40 80 120 160 200 240 280 320 360 400 TIME – ms Figure 12. Line Transient Response 200 400 600 TIME – ms Figure 13. Load Transient for 10 mA to 200 mA Pulse 3.310 VOUT = +3.3V VOUT 3.300 Volts +3.3V VOUT VOUT 0 3 400 2 CL = 10mF 300 mA 3.290 I (VOUT) mA 200 Volts CL = 10mF, RL = 16.5V 3.295 10 IOUT 200 400 600 TIME – ms 800 0 100 5 3 0 1000 Figure 14. Load Transient for 10 mA to 200 mA Pulse 4 RIPPLE REJECTION – dB 2 VOUT 1 0 5 40 Figure 17. Turn Off REV. A 0 5 –20 –30 VOUT = +3.3V a. 1mF, RL = 33kV b. 1mF, RL = 16.5V c. 10mF, RL = 33kV d. 10mF, RL = 16.5V b –40 –50 d a –60 c –70 b d –80 –90 VSD 20 30 TIME – ms 4 0 –10 3 10 2 3 TIME – sec SD 40 Figure 15. Short Circuit Current C = 1mF R = 16.5V ON +3.3V OUTPUT 0 1 0 CL = 10mF, RL = 3.3kV 1 200 0 0 Volts CL = 1mF, RL = 3.3kV 4 50 –100 10 a c 100 1k 10k 100k FREQUENCY – Hz 1M 10M Figure 18. Power Supply Ripple Rejection –5– 80 120 TIME – ms 160 200 Figure 16. Turn On VOLTAGE NOISE SPECTRAL DENSITY – mV/ Hz Volts 3.305 0 VIN = +7V VIN = +7V +3.3V 3.5 1000 800 10 0.47mF BYPASS PIN 7, 8 TO PIN3 VOUT = 5V, CL = 1mF, IL = 1mA, CNR = 0 1.0 VOUT = 3.3V, CL = 1mF, IL = 1mA, CNR = 0 0.1 0.01 100 VOUT = 2.2-5.0V, CL = 10mF, IL = 1mA, CNR = 10nF 1k 10k FREQUENCY – Hz 100k Figure 19. Output Noise Density ADP3303A THEORY OF OPERATION noise rejection and very high regulator gain, which leads to excellent line and load regulation. An impressive ±1.4% accuracy is guaranteed over line, load and temperature. The new anyCAP LDO ADP3303A uses a single control loop for regulation and reference functions. The output voltage is sensed by a resistive voltage divider consisting of R1 and R2, which is varied to provide the available output voltage options. Feedback is taken from this network by way of a series diode (D1) and a second resistor divider (R3 and R4) to the input of an amplifier. INPUT As the chip’s temperature rises above 165°C, the circuit activates a soft thermal shutdown, indicated by a signal low on the ERR Pin, to reduce the current to a safe level. OUTPUT Q1 COMPENSATION CAPACITOR NONINVERTING WIDEBAND DRIVER Additional features of the circuit include current limit, thermal shutdown and noise reduction. Compared to standard solutions that give warning after the output has lost regulation, the ADP3303A provides improved system performance by enabling the ERR Pin to give warning before the device loses regulation. gm ATTENUATION (VBANDGAP/VOUT) R3 PTAT VOS R1 CLOAD D1 (a) PTAT CURRENT R4 APPLICATION INFORMATION The ADP3303A is very easy to use. The only external component required for stability is a small 1 µF bypass capacitor on the output. If the shutdown feature is not used, the shutdown pin (Pin 8) should be tied to the input pin. RLOAD R2 ADP3303A CAPACITOR SELECTION Bypass Capacitor (C1): connecting a 0.47 µF capacitor from the IN pins (Pins 10 and 11) to ground greatly improves its line transient response and reduces the circuit’s sensitivity to PC board layout. A larger capacitor could be used if line transients of longer duration are expected. GND Figure 20. Functional Block Diagram A very high gain error amplifier is used to control this loop. The amplifier is constructed in such a way that at equilibrium it produces a large, temperature proportional input “offset voltage” that is repeatable and very well controlled. The temperatureproportional offset voltage is combined with the complementary diode voltage to form a “virtual bandgap” voltage, implicit in the network, although it never appears explicitly in the circuit. Ultimately, this patented design makes it possible to control the loop with only one amplifier. This technique also improves the noise characteristics of the amplifier by providing more flexibility on the trade-off of noise sources that leads to a low noise design. Output Capacitor (C2): as will all members of the anyCAP low dropout regulator family, the ADP3303A is stable with any type of output capacitor down to zero ESR. A small 1 µF output capacitor is required for stability. Larger capacitors with low ESR are recommended for improved load transient response. For space limited applications, Multilayer Ceramic Capacitors (MLCC) are a good choice. For low temperature operations OS-CON capacitors offer better performance. Noise Reduction Capacitor (CNR): to reduce the ADP3303A’s low output noise by 6 dB–10 dB, a noise gain limiting capacitor can be connected between the feedback (FB) pin (Pin 6) and the OUT pins as shown in Figure 21. Low leakage capacitors in the 100 pF–500 pF range provide the best performance. Larger capacitors will slow down the output transient response. CNR is not needed in low noise applications where fast load transients are not expected. The R1, R2 divider is chosen in the same ratio as the bandgap voltage to the output voltage. Although the R1, R2 resistor divider is loaded by the diode D1, and a second divider consisting of R3 and R4, the values are chosen to produce a temperature stable output. This unique arrangement specifically corrects for the loading of the divider so that the error resulting from base current loading in conventional circuits is avoided. The patented amplifier controls a new and unique noninverting driver that drives the pass transistor, Q1. The use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sensitivity to the value, type and ESR of the load capacitance. ERR 9 ADP3303A 11 VIN 10 4 IN OUT C1 5 R3 330kV VOUT = +5V R1 CNR 1mF FB 6 SD Most LDOs place strict requirements on the range of ESR values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resistance. Moreover, the ESR value, required to keep conventional LDOs stable, changes depending on load and temperature. These ESR limitations make designing with LDOs more difficult because of their unclear specifications and extreme variations over temperature. 8 R2 7 GND Figure 21. Noise Reduction Circuit OUTPUT VOLTAGE SELECTION The ADP3303A is characterized by having the output voltage divider placed externally. The output voltage will be divided by R1 and R2 and fed back to the FB pin. This is no longer true with the ADP3303A anyCAP LDO. It can be used with virtually any capacitor, with no constraint on the minimum ESR. The innovative design allows the circuit to be stable with just a small 1 µF capacitor on the output. Additional advantages of the pole splitting scheme include superior line In order to have the lowest possible sensitivity of output voltage versus any temperature variation, it is important that the parallel resistance of R1 and R2 is always 44 kΩ. –6– REV. A ADP3303A The proper formula to compute R1 and R2 is: R1 = PRINTED CIRCUIT BOARD LAYOUT CONSIDERATION 44 kΩ ×VSEL 44 kΩ , R2 = 1.189 1.189 1− V SEL Where VSEL is the desired output voltage. The output voltage can be selected from 2.2 V to 10 V. R1 is connected from the OUT pin to the FB pin and R2 is connected from the FB pin to GND. As an example, the Feedback Resistor Selection Table shows the feedback resistor values for 3 V and 5 V output voltages. Table I. Feedback Resistor Selection Table VOUT R1 (1% Resistor) R2 (1% Resistor) 3V 5V 110 kΩ 187 kΩ 73.2 kΩ 57.6 kΩ OUTPUT CURRENT LIMITING Short circuit protection is provided by limiting the pass transistors base drive current. Maximum output current is limited to 200 mA. THERMAL OVERLOAD PROTECTION The ADP3303A is protected against damage due to excessive power dissipation by its thermal overload protection circuit, which limits the die temperature to a maximum of 165°C. Under extreme conditions (i.e., high ambient temperature and power dissipation), where die temperature starts to rise above 165°C, the output current is reduced until the die temperature has dropped to a safe level. The output current is restored when the die temperature is reduced. Current and thermal limit protections are intended to protect the device against accidental overload conditions. For normal operation, device power dissipation should be externally limited so that junction temperatures will not exceed 125°C. CALCULATING JUNCTION TEMPERATURE Device power dissipation is calculated as follows: PD = (VIN – VOUT) ILOAD + (VIN) IGND Where ILOAD and IGND are load current and ground current, VIN and VOUT are input and output voltages, respectively. Assuming ILOAD = 200 mA, IGND = 4 mA, VIN = 5.5 V and VOUT = 3.0 V, device power dissipation is: PD = (5.5 V – 3.0 V ) 0.2 + 5.5 × 0.004 = 0.522 W The proprietary thermal coastline TSSOP-14 package of the ADP3303A, in conjunction with the recommended PCB layout shown in Figure 21, yields a thermal resistance of 96°C/W. As a result, the die temperature rise for the example circuit is: ∆T = TJ – TA = PD × θJA = 0.522 × 96 = 50.1°C If the maximum ambient temperature is 50°C, this yields a maximum junction temperature of TJMAX = 100.1°C, which is below the 125°C maximum operating junction temperature rating. REV. A The rate at which heat is transferred is directly proportional to the temperature differential between the die and PC board. Once heat is transferred to the PC board, it should be dissipated to the air or other medium. Surface mount components rely on the conductive traces or pads to transfer heat away from the device. Appropriate PC board layout technique should be used to remove heat from immediate vicinity of the package. The following general guidelines will be helpful when designing a board layout: 1. PC board traces with larger cross section areas will remove more heat. For optimum results, use PC’s with thicker copper and or wider traces. 2. Increase the surface area exposed to open air so heat can be removed by convection or forced air flow. 3. Do not solder mask or silk screen the heat dissipating traces. Black anodizing will significantly improve heat reduction by means of increased radiation. Figure 22 shows the recommended board layout for the ADP3303A. Although it is not critical, make sure R1 is connected right at the pin or the point you want to regulate in order to realize a proper kelvin connection. This will improve overall precision and stability. The same consideration is valid for the R2 connection to the ground pin, but a short connection is strongly suggested. No other components can be connected to the FB pin except an optional 10 nF–100 nF capacitor (CNR) in parallel to R1 that serves as a noise reduction capacitor. SHUTDOWN MODE Applying a TTL high signal to the shutdown pin, or tying it to the input pin, will turn the output ON. Pulling the shutdown pin down to 0.3 V or below, or tying it to ground, will turn the output OFF. In shutdown mode, quiescent current is reduced to less than 1 µA. INPUT–OUTPUT DROPOUT VOLTAGE AND DROPOUT DETECTOR The ADP3303A maintains a regulated output with an input voltage as low as 150 mV above the nominal output voltage. Input voltage falling below this level will generate an error signal indicating that the error amplifier output is reaching its saturated state and will not be able to drive the pass transistor any harder. Lowering the input voltage any further will result in output voltage reduction and loss of regulation. The input voltage threshold which generates the error output signal depends on the load current. At the rated output current, it is slightly lower than the nominal output voltage plus the dropout voltage. However, the threshold is much lower at lighter loads. APPLICATION CIRCUITS Crossover Switch The circuit in Figure 23 shows that two ADP3303As can be used to form a mixed supply voltage system. The output switches between two different levels selected by an external digital input. Output voltages can be any combination of voltages from the Ordering Guide. –7– ADP3303A Higher Output Current VIN = 5.5V TO 12V The ADP3303A can source up to 200 mA without any heatsink or pass transistor. If higher current is needed, an appropriate pass transistor can be used, as in Figure 24, to increase the output current to 1 A. OUT IN ADP3303A OUTPUT SELECT FB SD 5V 0V VOUT = 5V/3V 187kV GND 57.6kV The circuit in Figure 25 provides high precision with low dropout for any regulated output voltage. It significantly reduces the ripple from a switching regulator while providing a constant dropout voltage, which limits the power dissipation of the LDO to 60 mW. The ADP3000 used in this circuit is a switching regulator in the step-up configuration. TOP OF THE BOARD BOTTOM OF THE BOARD 10mm 10mm OUT IN C1 1.0mF C2 1.0mF 110kV ADP3303A FB SD GND 73.2kV C3328a–2–7/99 Constant Dropout Post Regulator Figure 23. Crossover Switch MJE253* VIN = 6V TO 8V VOUT = 5V @ 1A R1 50V C1 47mF 10mm IN OUT C2 10mF ADP3303A SD 187kV FB GND 57.6kV ERR *AAVOD531002 HEAT SINK IS USED DRAWINGS NOT TO SCALE Figure 24. High Output Current Linear Regulator Figure 22. ADP3303A (TSSOP-14) Recommended Board Layout D1 1N5817 L1 6.8mH ADP3303A OUT IN C1 100mF 10V R1 120V ILIM C2 100mF 10V VIN SW2 GND FB C3 2.2mF SW1 ADP3000-ADJ GND SD R2 30.1kV 1% 3.3V @ 160mA R5 121kV R6 68.1kV Q1 2N3906 FB Q2 2N3906 R3 124kV 1% R4 274kV Figure 25. Constant Dropout Post Regulator OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 14-Lead Thin Shrink Small Outline Package (TSSOP) (RU-14) PRINTED IN U.S.A. VIN = 2.5V TO 3.5V 0.201 (5.10) 0.193 (4.90) 14 8 0.177 (4.50) 0.169 (4.30) 0.256 (6.50) 0.246 (6.25) 1 7 PIN 1 0.006 (0.15) 0.002 (0.05) SEATING PLANE 0.0433 (1.10) MAX 0.0256 (0.65) BSC 0.0118 (0.30) 0.0075 (0.19) 0.0079 (0.20) 0.0035 (0.090) –8– 8° 0° 0.028 (0.70) 0.020 (0.50) REV. A