a FEATURES Low Power 1 mA Supply Current/Amp High Speed 350 MHz, –3 dB Bandwidth (G = +1) 425 V/s Slew Rate Low Cost Low Noise 8 nV/√Hz @ 100 kHz 600 fA/√Hz @ 100 kHz Low Input Bias Current: 750 nA Max Low Distortion –90 dB SFDR @ 1 MHz –65 dB SFDR @ 5 MHz Wide Supply Range: 3 V to 12 V Small Packaging: SOT23-8, SC70-5, and SOIC-8 Low Power 350 MHz Voltage Feedback Amplifiers AD8038/AD8039 CONNECTION DIAGRAMS AD8038 8 DISABLE –IN 2 7 +VS +IN 3 6 VOUT NC 1 –VS 4 5 ADI’s proprietary XFCB process allows low noise operation (8 nV/√Hz and 600 fA/√Hz) at extremely low quiescent currents. Given a wide supply voltage range (3 V to 12 V), wide bandwidth, and small packaging, the AD8038 and AD8039 amplifiers are designed to work in a variety of applications where power and space are at a premium. The AD8038 and AD8039 amplifiers have a wide input commonmode range of 1 V from either rail and will swing within 1 V of each rail on the output. These amplifiers are optimized for driving capacitive loads up to 15 pF. If driving larger capacitive loads, a small series resistor is needed to avoid excessive peaking or overshoot. –VS 2 + – +IN 3 NC 5 +VS 4 –IN SOIC-8 (R) and SOT23-8 (RT)* AD8039 VOUT1 1 8 +VS –IN1 2 7 VOUT2 +IN1 3 6 –IN2 –VS 4 5 +IN2 The AD8039 amplifier is the only dual low power, high speed amplifier available in a tiny SOT23-8 package, and the single AD8038 is available in both a SOIC-8 and a SC70-5 package. These amps are rated to work over the industrial temperature range of –40°C to +85°C. 24 21 G = +10 18 15 GAIN – dB The AD8038 (single) and AD8039 (dual) amplifiers are high speed (350 MHz) voltage feedback amplifiers with an exceptionally low quiescent current of 1.0 mA/amplifier typical (1.5 mA max). The AD8038 single amplifier in the SOIC-8 package has a disable feature. Despite being low power and low cost, the amplifier provides excellent overall performance. Additionally, it offers a high slew rate of 425 V/µs and low input offset voltage of 3 mV max. AD8038 VOUT 1 NC = NO CONNECT APPLICATIONS Battery-Powered Instrumentation Filters A/D Driver Level Shifting Buffering High Density PC Boards Photo Multiplier PRODUCT DESCRIPTION SC70-5 (KS) SOIC-8 (R) G = +5 12 9 G = +2 6 3 G = +1 0 –3 –6 0.1 1 10 FREQUENCY – MHz 100 1000 *Not yet released REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Figure 1. Small Signal Frequency Response for Various Gains, VOUT = 500 mV p-p, VS = ± 5 V One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 AD8038/AD8039–SPECIFICATIONS (T = 25ⴗC, V = ⴞ5 V, R = 2 k⍀, Gain = +1, unless otherwise noted.) A Parameter S L Conditions Min Typ G = 1, VO = 0.5 V p-p G = 2, VO = 0.5 V p-p G = 1, VO = 2 V p-p G = 2, VO = 0.2 V p-p G = 1, VO = 2 V Step, RL = 2 kΩ G = 2, 1 V Overdrive G = 2, VO = 2 V Step 300 350 175 100 45 425 50 18 MHz MHz MHz MHz V/µs ns ns fC = 1 MHz, VO = 2 V p-p, RL = 2 kΩ fC = 1 MHz, VO = 2 V p-p, RL = 2 kΩ fC = 5 MHz, VO = 2 V p-p, RL = 2 kΩ fC = 5 MHz, VO = 2 V p-p, RL = 2 kΩ f = 5 MHz, G = 2 f = 100 kHz f = 100 kHz –90 –92 –65 –70 –70 8 600 dBc dBc dBc dBc dB nV/√Hz fA/√Hz VO = ± 2.5 V 0.5 4.5 400 3 25 70 INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio RL = 1 kΩ VCM = ± 2.5 V 10 2 ±4 67 MΩ pF V dB OUTPUT CHARACTERISTICS DC Output Voltage Swing Capacitive Load Drive RL = 2 kΩ, Saturated Output 30% Overshoot, G = +2 ±4 20 V pF DYNAMIC PERFORMANCE –3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Overdrive Recovery Time Settling Time to 0.1% NOISE/HARMONIC PERFORMANCE SFDR Second Harmonic Third Harmonic Second Harmonic Third Harmonic Crosstalk, Output-to-Output (AD8039) Input Voltage Noise Input Current Noise DC PERFORMANCE Input Offset Voltage Input Offset Voltage Drift Input Bias Current Input Bias Current Drift Input Offset Current Open-Loop Gain POWER SUPPLY Operating Range Quiescent Current per Amplifier Power Supply Rejection Ratio POWER-DOWN DISABLE* Turn-On Time Turn-Off Time Disable Voltage – Part is OFF Disable Voltage – Part is ON Disabled Quiescent Current Disabled In/Out Isolation 400 61 3.0 – Supply + Supply –71 –64 1.0 –77 –70 180 700 +VS – 4.5 +VS – 2.5 0.2 –60 f = 1 MHz Max 3 750 12 1.5 Unit mV µV/°C nA nA/°C ± nA dB V mA dB dB ns ns V V mA dB *Only available in AD8038 SOIC-8 package. Specifications subject to change without notice. –2– REV. B AD8038/AD8039 SPECIFICATIONS (T = 25ⴗC, V = 5 V, R = 2 k⍀ to V /2, Gain = +1, unless otherwise noted.) A Parameter S L S Conditions Min Typ G = 1, VO = 0.2 V p-p G = 2, VO = 0.2 V p-p G = 1, VO = 2 V p-p G = 2, VO = 0.2 V p-p G = 1, VO = 2 V Step, RL = 2 kΩ G = 2, 1 V Overdrive G = 2, VO = 2 V Step 275 300 150 30 45 365 50 18 MHz MHz MHz MHz V/µs ns ns fC = 1 MHz, VO = 2 V p-p, RL = 2 kΩ fC = 1 MHz, VO = 2 V p-p, RL = 2 kΩ fC = 5 MHz, VO = 2 V p-p, RL = 2 kΩ fC = 5 MHz, VO = 2 V p-p, RL = 2 kΩ f = 5 MHz, G = 2 f = 100 kHz f = 100 kHz –82 –79 –60 –67 –70 8 600 dBc dBc dBc dBc dB nV/√Hz fA/√Hz VO = ± 2.5 V 0.8 3 400 3 30 70 INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio RL = 1 kΩ VCM = ± 1 V 10 2 1.0–4.0 65 MΩ pF V dB OUTPUT CHARACTERISTICS DC Output Voltage Swing Capacitive Load Drive RL = 2 kΩ, Saturated Output 30% Overshoot 0.9–4.1 20 V pF DYNAMIC PERFORMANCE –3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Overdrive Recovery Time Settling Time to 0.1% NOISE/HARMONIC PERFORMANCE SFDR Second Harmonic Third Harmonic Second Harmonic Third Harmonic Crosstalk, Output-to-Output Input Voltage Noise Input Current Noise DC PERFORMANCE Input Offset Voltage Input Offset Voltage Drift Input Bias Current Input Bias Current Drift Input Offset Current Open-Loop Gain 59 POWER SUPPLY Operating Range Quiescent Current per Amplifier Power Supply Rejection Ratio POWER-DOWN DISABLE* Turn-On Time Turn-Off Time Disable Voltage – Part is OFF Disable Voltage – Part is ON Disabled Quiescent Current Disabled In/Out Isolation 3 –65 0.9 –71 210 700 +VS – 4.5 +VS – 2.5 0.2 –60 f = 1 MHz *Only available in AD8038 SOIC-8 package. Specifications subject to change without notice. REV. B 340 –3– Max 3 750 12 1.5 Unit mV µV/°C nA nA/°C ± nA dB V mA dB ns ns V V mA dB AD8038/AD8039 2.0 ABSOLUTE MAXIMUM RATINGS* MAXIMUM POWER DISSIPATION – W Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . See Figure 2 Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ± 4 V Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +125°C Operating Temperature Range . . . . . . . . . . . –40°C to +85°C Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The maximum safe power dissipation in the AD8038/AD8039 package is limited by the associated rise in junction temperature (TJ) on the die. The plastic encapsulating the die will locally reach the junction temperature. At approximately 150°C, which is the glass transition temperature, the plastic will change its properties. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8038/AD8039. Exceeding a junction temperature of 175°C for an extended period of time can result in changes in the silicon devices, potentially causing failure. 1.0 SC70-5 0.5 PD = (VS × IS ) + (VS / 4) / RL 2 In single-supply operation with RL referenced to VS–, worst case is VOUT = VS / 2. Airflow will increase heat dissipation effectively reducing JA. Also, more metal directly in contact with the package leads from metal traces, through holes, ground, and power planes, will reduce the JA. Care must be taken to minimize parasitic capacitances at the input leads of high speed op amps as discussed in the board layout section. Figure 2 shows the maximum safe power dissipation in the package versus the ambient temperature for the SOIC-8 (125°C/W), SC70-5 (210°C/W), and SOT23-8 (160°C/W) package on a JEDEC standard four-layer board. JA values are approximations. OUTPUT SHORT CIRCUIT PD = quiescent power + (total drive power – load power) [ 125 If the RMS signal levels are indeterminate, then consider the worst case, when VOUT = VS / 4 for RL to midsupply: The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (VS) multiplied by the quiescent current (IS). Assuming the load (RL) is referenced to midsupply, then the total drive power is VS / 2 × IOUT, some of which is dissipated in the package and some in the load (VOUT × IOUT). The difference between the total drive power and the load power is the drive power dissipated in the package. ] 5 35 65 95 AMBIENT TEMPERATURE – ⴗC RMS output voltages should be considered. If RL is referenced to VS–, as in single-supply operation, then the total drive power is VS IOUT. TJ = TA + (PD × θ JA ) PD = VS × IS + (VS / 2) × (VOUT / RL ) – VOUT / RL 2 –25 Figure 2. Maximum Power Dissipation vs. Temperature for a Four-Layer Board The still-air thermal properties of the package and PCB (JA), ambient temperature (TA), and total power dissipated in the package (PD) determine the junction temperature of the die. The junction temperature can be calculated as follows: ] [ SOIC-8 SOT23-8 0 –55 MAXIMUM POWER DISSIPATION [ 1.5 Shorting the output to ground or drawing excessive current from the AD8038/AD8039 will likely cause a catastrophic failure. ] ORDERING GUIDE Model Temperature Range Package Description Package Outline AD8038AR AD8038AR-REEL AD8038AR-REEL7 AD8038AKS-REEL AD8038AKS-REEL7 AD8039AR AD8039AR-REEL AD8039AR-REEL7 AD8039ART-REEL* AD8039ART-REEL7* –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 5-Lead SC70 5-Lead SC70 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOT23 8-Lead SOT23 SO-8 SO-8 SO-8 KS-5 KS-5 SO-8 SO-8 SO-8 RT-8 RT-8 Branding Information HUA HUA HYA HYA *Under development. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8038/AD8039 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. –4– WARNING! ESD SENSITIVE DEVICE REV. B Typical Performance Characteristics–AD8038/AD8039 (Default Conditions: ⴞ5 V, CL = 5 pF, G = +2, RG = RF = 1 kΩ, RL = 2 kΩ, VO = 2 V p-p, Frequency = 1 MHz, TA = 25ⴗC.) 7 7 24 VS = ⴞ1.5V G = +10 21 6 G = +5 5 9 G = +2 6 3 G = +1 0 –3 –6 0.1 1 10 100 FREQUENCY – MHz TPC 1. Small Signal Frequency Response for Various Gains, VOUT = 500 mV p-p 3 1 1 1 10 100 FREQUENCY – MHz 0 0.1 1000 4 RL = 1k⍀ 3 2 1 0 0.1 1 10 100 FREQUENCY – MHz TPC 4. Small Signal Frequency Response for Various RLOAD, VS = 5 V, VOUT = 500 mV p-p 5 4 3 RL = 1k⍀ 1 RL = 1k⍀ 0 0.1 100 1 10 FREQUENCY – MHz 2 VOUT = 200mV CL = 15pF 1 VOUT = 1V 5 CL = 10pF 100 TPC 6. Large Signal Frequency Response for Various RLOAD, VOUT = 4 V p-p, VS = ± 5 V 7 3 3 1 1 10 FREQUENCY – MHz RL = 500⍀ 4 2 CL = 15pF 4 1000 RL = 2k⍀ 5 2 TPC 5. Large Signal Frequency Response for Various RLOAD, VOUT = 3 V p-p, VS = 5 V 5 10 100 FREQUENCY – MHz 6 RL = 500⍀ 0 0.1 1000 1 7 GAIN – dB GAIN – dB RL = 500⍀ RL = 1k⍀ 8 6 5 RL = 500⍀ TPC 3. Small Signal Frequency Response for Various RLOAD, VS = ± 5 V, VOUT = 500 mV p-p RL = 2k⍀ 7 6 3 2 8 RL = 2k⍀ 4 2 TPC 2. Small Signal Frequency Response for Various Supplies, VOUT = 500 mV p-p 7 GAIN – dB 4 0 0.1 1000 5 VS = ⴞ5V GAIN – dB 12 GAIN – dB GAIN – dB 15 RL = 2k⍀ 6 VS = ⴞ2.5V 18 0 3 0 –1 CL = 5pF CL = 10pF 1 –1 –2 GAIN – dB 1 GAIN – dB GAIN – dB 2 –1 –2 VOUT = 500mV –3 CL = 5pF VOUT = 2V –4 –3 –3 –5 –4 –5 –5 1 10 100 FREQUENCY – MHz 1000 TPC 7. Small Signal Frequency Response for Various CLOAD, V OUT = 500 mV p-p, V S = ± 5 V, G = +1 REV. B 1 10 100 FREQUENCY – MHz 1000 TPC 8. Small Signal Frequency Response for Various CLOAD, VOUT = 500 mV p-p, VS = 5 V, G = +1 –5– –6 0.1 1 10 100 FREQUENCY – MHz 1000 TPC 9. Frequency Response for Various Output Voltage Levels AD8038/AD8039 (Default Conditions: ⴞ5 V, CL = 5 pF, G = +2, RG = RF = 1 kΩ, RL = 2 kΩ, VO = 2 V p-p, Frequency = 1 MHz, TA = 25ⴗC.) 80 9 180 –50 70 6 PHASE 90 40 30 GAIN 20 45 10 GAIN – dB 50 PHASE – Degrees OPEN-LOOP GAIN – dB HARMONIC DISTORTION – dBc 135 60 –40ⴗC +25ⴗC 3 +85ⴗC 0 0 0 –10 –20 0.01 0.1 –3 0.1 –45 1000 1 10 100 FREQUENCY – MHz –45 –60 –65 –70 RL = 2k⍀ HD3 RL = 2k⍀ HD2 –80 –70 –75 RL = 2k⍀ HD3 RL = 2k⍀ HD2 –80 –85 1000 1 2 3 9 8 4 5 6 7 FREQUENCY – MHz 10 TPC 12. Harmonic Distortion vs. Frequency for Various Loads, VS = ± 5 V, VOUT = 2 V p-p, G = +2 –50 G = +1 HD2 HARMONIC DISTORTION – dBc RL = 500⍀ HD3 –75 –65 G = +1 HD2 HARMONIC DISTORTION – dBc HARMONIC DISTORTION – dBc 10 100 FREQUENCY – MHz –50 RL = 500⍀ HD2 –50 RL = 500⍀ HD3 –60 –90 1 TPC 11. Frequency Response vs. Temperature, Gain = +2, VS = ± 5 V, VOUT = 2V p-p TPC 10. Open-Loop Gain and Phase, VS = ± 5 V –55 RL = 500⍀ HD2 –55 G = +2 HD2 –60 –70 G = +2 HD3 –80 –90 G = +1 HD3 G = +2 HD2 –60 –70 G = +2 HD3 –80 G = +1 HD3 –90 –85 –90 –100 1 2 3 8 4 5 6 7 FREQUENCY – MHz 9 10 TPC 13. Harmonic Distortion vs. Frequency for Various Loads, VS = 5 V, VOUT = 2 V p-p, G = +2 1 2 3 8 4 5 6 7 FREQUENCY – MHz 9 –100 10 TPC 14. Harmonic Distortion vs. Frequency for Various Gains, VS = ± 5 V, VOUT = 2 V p-p 2 3 8 4 5 6 7 FREQUENCY – MHz 9 10 TPC 15. Harmonic Distortion vs. Frequency for Various Gains, VS = 5 V, VOUT = 2 V p-p 1000 –45 –40 1 –50 5MHz HD2 10MHz HD3 –60 5MHz HD3 –70 1MHz HD3 –80 1MHz HD2 –90 –100 1 2 3 AMPLITUDE – V p-p TPC 16. Harmonic Distortion vs. VOUT Amplitude for Various Frequencies, VS = ± 5 V, G = +2 4 –55 10MHz HD3 VOLTAGE NOISE – nV/ Hz 10MHz HD2 HARMONIC DISTORTION – dBc HARMONIC DISTORTION – dBc 10MHz HD2 5MHz HD2 5MHz HD3 –65 –75 –85 –95 1.0 1MHz HD3 1MHz HD2 100 10 1 1.5 2.0 2.5 AMPLITUDE – V p-p 3.0 TPC 17. Harmonic Distortion vs. Amplitude for Various Frequencies, VS = 5 V, G = +2 –6– 10 100 1k 10k 100k 1M 10M 100M FREQUENCY – Hz TPC 18. Input Voltage Noise vs. Frequency REV. B AD8038/AD8039 (Default Conditions: ⴞ5 V, CL = 5 pF, G = +2, RG = RF = 1 kΩ, RL = 2 kΩ, VO = 2 V p-p, Frequency = 1 MHz, TA = 25ⴗC.) 100000 RL = 2k⍀ NOISE – fA/ Hz RL = 500⍀ RL = 500⍀ RL = 2k⍀ 10000 1000 50mV/DIV 100 10 100 1000 10000 100000 FREQUENCY – Hz TPC 19. Input Current Noise vs. Frequency 5ns/DIV 50mV/DIV 5ns/DIV 1M TPC 20. Small Signal Transient Response for Various RLOAD, VS = 5 V CL = 25pF WITH RSNUB = 19.6⍀ CL = 25pF WITH RSNUB = 19.6⍀ TPC 21. Small Signal Transient Response for Various RLOAD, VS = ± 5 V RL = 500⍀ RL = 2k⍀ 2.5V CL = 5pF CL = 5pF CL = 10pF CL = 10pF 500mV/DIV 50mV/DIV 5ns/DIV TPC 22. Small Signal Transient Response for Various Capacitive Loads, VS = 5 V 50mV/DIV 5ns/DIV 5ns/DIV TPC 23. Small Signal Transient Response for Various Capacitive Loads, VS = ± 5 V TPC 24. Large Signal Transient Response for Various RLOAD, VS = 5 V CL = 10pF RL = 500⍀ RL = 2k⍀ CL = 25pF CL = 5pF 2.5V 1V/DIV CL = 5pF 5ns/DIV 500mV/DIV TPC 25. Large Signal Transient Response for Various RLOAD, VS = ± 5 V REV. B 5ns/DIV TPC 26. Large Signal Transient Response for Various Capacitive Loads, VS = 5 V –7– 500mV/DIV 5ns/DIV TPC 27. Large Signal Transient Response for Various Capacitive Loads, VS = ± 5 V AD8038/AD8039 (Default Conditions: ⴞ5 V, CL = 5 pF, G = +2, RG = RF = 1 kΩ, RL = 2 kΩ, VO = 2 V p-p, Frequency = 1 MHz, TA = 25ⴗC.) VS = ⴞ5V G = +2 VOUT = 2V p-p 2mV/DIV IN IN OUT ERROR VOLTAGE +0.1% 0 OUT 2V/DIV INPUT 1V/DIV OUTPUT 2V/DIV 50ns/DIV TPC 28. Input Overdrive Recovery, Gain = +1 0.5V/DIV 1000 –20 –30 100 IMPEDANCE – ⍀ –30 –40 –50 CMRR – dB CROSSTALK – dB 5ns/DIV TPC 30. 0.1% Settling Time VOUT = 2 V p-p –10 –20 VIN 50ns/DIV TPC 29. Output Overdrive Recovery, Gain = +2 –10 SIDE B –60 –70 SIDE A VS = +5V –40 –50 VS = ⴞ5V –60 10 1 –80 VS = ⴞ5V –70 –90 VS = +5V –80 –100 0.1 1 10 100 FREQUENCY – MHz 1 1000 10 100 0.1 0.01 1000 0.1 FREQUENCY – MHz 1 10 100 FREQUENCY – MHz TPC 32. CMRR vs. Frequency, VIN = 1 V p-p TPC 33. Output Impedance vs. Frequency 10 9 1.25 0 8 TPC 31. AD8039 Crosstalk, VIN = 1 V p-p, Gain = +1 –10 –PSRR VOUT – p-p –40 +PSRR –50 5 4 VS = +5V 3 –60 –70 2 –80 1 0.01 SUPPLY CURRENT – mA 6 –30 –90 0.001 VS = ⴞ5V 7 –20 PSRR – dB t=0 –0.1% 1 10 100 FREQUENCY – MHz TPC 34. PSRR vs. Frequency 1000 1000 1.00 0.75 0.50 0.25 0 0 0 100 200 300 RLOAD – ⍀ 400 500 TPC 35. Output Swing vs. Load Resistance –8– 0 2 4 6 8 SUPPLY VOLTAGE – V 10 12 TPC 36. AD8038 Supply Current vs. Supply Voltage REV. B AD8038/AD8039 Input Capacitance 0 Along with bypassing and ground, high speed amplifiers can be sensitive to parasitic capacitance between the inputs and ground. A few pF of capacitance will reduce the input impedance at high frequencies, in turn increasing the amplifiers’ gain, causing peaking of the frequency response, or even oscillations if severe enough. It is recommended that the external passive components that are connected to the input pins be placed as close as possible to the inputs to avoid parasitic capacitance. The ground and power planes must be kept at a distance of at least 0.05 mm from the input pins on all layers of the board. –10 ISOLATION – dB –20 –30 –40 –50 –60 –70 –80 –90 0.1 1.0 10 100 FREQUENCY – MHz Output Capacitance 1000 To a lesser extent, parasitic capacitances on the output can cause peaking of the frequency response. There are two methods to minimize this effect. TPC 37. AD8038 Input-Output Isolation (G = +2, RL = 2 kΩ, VS = ± 5V 1. Put a small value resistor in series with the output to isolate the load capacitor from the amp’s output stage; see TPCs 7, 8, 22, and 23. LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS Disable 2. Increase the phase margin with higher noise gains or add a pole with a parallel resistor and capacitor from –IN to the output. The AD8038 in the SOIC-8 package provides a disable feature. This feature disables the input from the output (see TPC 37 for input-output isolation) and reduces the quiescent current from typically 1 mA to 0.2 mA. When the DISABLE node is pulled below 4.5 V from the positive supply rail, the part becomes disabled. In order to enable the part, the DISABLE node needs to be pulled up to above 2.5 V below the positive rail. Input-to-Output Coupling The input and output signal traces should not be parallel to minimize capacitive coupling between the inputs and outputs, avoiding any positive feedback. APPLICATIONS Low Power ADC Driver Power Supply Bypassing Power supply pins are actually inputs, and care must be taken so that a noise-free stable dc voltage is applied. The purpose of bypass capacitors is to create low impedances from the supply to ground at all frequencies, thereby shunting or filtering a majority of the noise. 1k⍀ 0.1F 10F 3V 0.1F 1k⍀ Decoupling schemes are designed to minimize the bypassing impedance at all frequencies with a parallel combination of capacitors. 0.01 µF or 0.001 µF (X7R or NPO) chip capacitors are critical and should be as close as possible to the amplifier package. Larger chip capacitors, such as the 0.1 µF capacitor, can be shared among a few closely spaced active components in the same signal path. A 10 µF tantalum capacitor is less critical for high frequency bypassing and, in most cases, only one per board is needed at the supply inputs. 3 10F 8 REF 50⍀ 1 VIN VINA 2 0V 1k⍀ 1k⍀ AD9203 AD8039 1k⍀ 1k⍀ 6 7 5 VINB 50⍀ 4 1k⍀ 0.1F Grounding A ground plane layer is important in densely packed PC boards to spread the current minimizing parasitic inductances. However, an understanding of where the current flows in a circuit is critical to implementing effective high speed circuit design. The length of the current path is directly proportional to the magnitude of parasitic inductances, and thus the high frequency impedance of the path. High speed currents in an inductive ground return will create an unwanted voltage noise. –5V 10F 1k⍀ Figure 3. Schematic to Drive AD9203 with the AD8039 Differential A/D Driver The AD9203 is a low power (125 mW on a 5 V supply) 40 MSPS 10-bit converter. This represents a breakthrough in power/speed for ADCs. As such, the low power, high performance AD8039 is an appropriate choice of amplifier to drive it. The length of the high frequency bypass capacitor leads are most critical. A parasitic inductance in the bypass grounding will work against the low impedance created by the bypass capacitor. Place the ground leads of the bypass capacitors at the same physical location. Because load currents flow from the supplies as well, the ground for the load impedance should be at the same physical location as the bypass capacitor grounds. For the larger value capacitors, which are intended to be effective at lower frequencies, the current return path distance is less critical. REV. B 2.5V +5V In low supply voltage applications, differential analog inputs are needed to increase the dynamic range of the ADC inputs. Differential driving can also reduce second and other even-order distortion products. The AD8039 can be used to make a dc-coupled, single-ended-to-differential driver for one of these ADCs. Figure 3 is a schematic of such a circuit for driving an AD9203, a 10-bit, 40 MSPS ADC. –9– AD8038/AD8039 The AD9203 works best when the common-mode voltage at the input is at the midsupply or 2.5 V. The output stage design of the AD8039 makes it ideal for driving these types of ADCs. In this circuit, one of the op amps is configured in the inverting mode, while the other is in the noninverting mode. However, to provide better bandwidth matching, each op amp is configured for a noise gain of +2. The inverting op amp is configured for a gain of –1, while the noninverting op amp is configured for a gain of +2. Each has a very similar ac response. The input signal to the noninverting op amp is divided by 2 to normalize its voltage level and make it equal to the inverting output. The outputs of the op amps are centered at 2.5 V, which is the midsupply level of the ADC. This is accomplished by first taking the 2.5 V reference output of the ADC and dividing it by 2 with a pair of 1 kΩ resistors. The resulting 1.25 V is applied to each op amp’s positive input. This voltage is then multiplied by the gain of the op amps to provide a 2.5 V level at each output. RF 1k⍀ 680pF +2.5V 10F 0.1F R1 200k⍀ VIN R4 49.9k⍀ R2 499k⍀ R3 49.9k⍀ C1 100pF AD8038 C3 33pF –2.5V VOUT R5 49.9k⍀ 0.1F 10F Figure 4. Low-Pass Filter for Video Figure 5 shows the frequency response of this filter. The response is down 3 dB at 6 MHz, so it passes the video band with little attenuation. The rejection at 27 MHz is 45 dB, which provides more than a factor of 100 in suppression of the clock components at this frequency. 10 Low Power Active Video Filter Some composite video signals derived from a digital source contain clock feedthrough that can limit picture quality. Active filters made from op amps can be used in this application, but they will consume 25 mW to 30 mW for each channel. In power-sensitive applications, this can be too much, requiring the use of passive filters that can create impedance matching problems when driving any significant load. 0 GAIN – dB –10 The AD8038 can be used to make an effective low-pass active filter that consumes one-fifth of the power consumed by an active filter made from an op amp. Figure 4 shows a circuit that uses an AD8038 to create a single ± 2.5 V supply, three-pole Sallen-Key filter. This circuit uses a single RC pole in front of a standard two-pole active section. –20 –30 –40 –50 –60 0.1 1 10 FREQUENCY – MHz 100 Figure 5. Video Filter Response –10– REV. B AD8038/AD8039 OUTLINE DIMENSIONS Dimensions shown in inches and (mm) Dimensions shown in inches and (mm) 5-Lead SC70 (KS-5) 8-Lead Plastic Surface Mount (RT-8)* 0.087 (2.20) 0.071 (1.80) 0.053 (1.35) 0.045 (1.15) 4 5 1 2 3 0.122 (3.10) 0.110 (2.80) 0.094 (2.40) 0.071 (1.80) 8 PIN 1 0.016 (0.40) 0.004 (0.10) 0.026 (0.65) BSC 0.039 (1.00) 0.031 (0.80) 0.004 (0.10) 0.000 (0.00) SEATING PLANE 6 5 2 3 4 0.112 (2.80) PIN 1 0.043 (1.10) 0.031 (0.80) 0.012 (0.30) 0.006 (0.15) 7 0.071 (1.80) 0.059 (1.50) 0.077 (1.95) BSC 0.012 (0.30) 0.004 (0.10) 0.007 (0.18) 0.004 (0.10) 0.051 (1.30) 0.035 (0.90) 0.057 (1.45) 0.035 (0.90) 0.006 (0.15) 0.000 (0.00) 0.015 (0.38) 0.009 (0.22) *Not yet released. Dimensions shown in millimeters and (inches) 8-Lead Plastic SOIC (R-8) 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 8 5 1 4 6.20 (0.2440) 5.80 (0.2284) PIN 1 0.50 (0.0196) ⴛ 45ⴗ 0.25 (0.0099) 1.27 (0.0500) BSC COPLANARITY 0.25 (0.0098) 0.10 (0.0040) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) SEATING 0.33 (0.0130) PLANE 8ⴗ 0.25 (0.0098) 0ⴗ 1.27 (0.0500) 0.40 (0.0157) 0.19 (0.0075) CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MS-012 AA REV. B 0.026 (0.65) BSC –11– 0.009 (0.23) 0.003 (0.08) SEATING PLANE 10ⴗ 0ⴗ 0.022 (0.55) 0.014 (0.35) AD8038/AD8039 Revision History Location Page 5/02–Data Sheet changed from REV. A to REV. B. Changes to Product Title . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Changes to PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Changes to CONNECTION DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Update to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 C02951–0–5/02(B) Add part number AD8038 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UNIVERSAL Update to MAXIMUM POWER DISSIPATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Update to OUTPUT SHORT CIRCUIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Update to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Change to FIGURE 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Change to TPC 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Change to TPC 18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Change to TPC 27 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Change to TPC 29 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Change to TPC 30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Change to TPC 31 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Added TPC 36 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Added TPC 37 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Edits to Low Power Active Video Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Change to Figure 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Data Sheet changed from REV. 0 to REV. A. Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Update SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2, 3 PRINTED IN U.S.A. Edits to TPC 19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 –12– REV. B